School of computer science

Georgia Institute of Technology

CS4290/CS6290HPCA Fall 2011

Overview
This assignment is composed of two parts: Part 1: building the simulator, Part 2: simulation and analysis

Part 1(100 pts): Building a Branch Predictor (60 points) and Deeper Pipeline (40 points)

You will extend your Lab #1 pipeline design. We provide add_me.txt file. Please add the code at appropriate places. userknob.h and simknob.h files have been updated, please use the updated files.

From this assignment, you are building a much higher level of simulator. So, you don't need to maintain cycle accurate latch values.

Implement a g-share branch predictor

Add a g-share branch predictor in the FE stage.

When a processor fetches a conditional branch instruction (cf_type must be CF_CBR), it accesses the branch predictor. All other branch types, we assume that they are correctly predicted. There are no pipeline bubbles for other branches.
If a branch is mispredicted, the processor should not fetch instructions from the correct path. i.e., the processor should not call the get_op function. Instead, it should stall the pipeline until the branch instruction is resolved. After the branch is resolved in the EX stage, in the following cycle the correct PC address is forwarded to the PC latch. From the next cycle the processor can start to fetch instructions from the correct path. Note that in real hardware, the processor will keep fetching wrong-path instructions until a branch is resolved.
Once a misprediction is discovered, the processor flushes the pipeline and starts to fetch instructions from the correct path. Since we are building a trace-driven simulator, we cannot send wrong-path instructions into the pipeline. That's why we are stalling the FE stage to model the time delay between a branch prediction and branch resolution.
To simplify the problem, after a branch is predicted in the FE stage, you also update the branch predictor including BHR with the correct value at the same cycle. In real hardware, the branch predictor is speculatively updated with predicted values. When a branch misprediction is detected, the BHR value is recovered. However, since we do not fetch wrong-path instructions, this step is unnecessary. The 2bit counters in the PHT table are initialized with "10b (2)", weekly taken. In the op field, actually_taken field provides the correct branch prediction. So you can check whether a branch prediction is correct or not by comparing actually_taken value.
Note that, in a real hardware, when a branch misprediction is detected, the processor cannot start to rename until all correct path instructions are retired. Again, to simplify the simulator, the processor starts to resume as soon as the correct-path PC value is available.


Implement a deeper pipeline processor
Now, you convert your 5-stage pipeline into a much deeper pipeline machine. Similar to the previous execution stage (multi-cycle execution stages), you can have multiple cycles in FE, ID, WB We will not check the contents of the latches in this assignment, so you don't have to maintain the correct latch information. Please note that you are not adding additional pipeline stages in your simulator. Each pipeline stage can take more than one cycle.

KNOBS

New KNOBS

KNOB_GHR_LENGTH: It decides the length of GHR. The number of gshare predictor entry is 2^(KNOB_GHR_LENGTH). The maximum value of KNOB_GHR_LENGTH is 20. KNOB_DEBUG_PRINT: print a debug message. (0: no debug message 1: print debug message )

KNOB_FE_DEPTH: It sets the number of pipeline stages in the FE stage

KNOB_ID_DEPTH: It sets the number of pipeline stages in the ID stage

KNOB_WB_DEPTH: It sets the number of pipeline stage in the WB stage

KNOBS from Assignment #1
KNOB_OUTPUT_FILE: set the output filename of the print_stats function

KNOB_TRACE_NAME: set the input trace file name

KNOB_READ_TRACE: (1): read trace and execute the simulator (0): execute the binary

You should not set 1 for both KNOB_WRITE_TRACE and KNOB_READ_TRACE. Only one of them has to be 1.

KNOB_MAX_SIM_COUNT: set the maximum cycle_count for the simulation

KNOB_MAX_INST_COUNT: set the maximum inst_count for the simulation

KNOB_PRINIT_PIPE_FREQ: set the frequency of calling print_pipeline() function



Grading

class date_c{
	public:
	void get_coffee();
};
class weekday_c: public date_c{
	public:
	void get_coffee();
}
class Saturday_c:public date_c{
	public:
	void get_coffee();
}
class Sunday_c:public date_c{
	public:
	void get_coffee();
}


void TutoTh_c::get_coffee(){
// beginning of the function body starts at 0x800
	If (time >= 7 am && time < 8 am) printf("go to Seattle's Best\n");  // br: pc 0x801
	else if (time >= 8 am && time < 1pm ) printf ("go to CCB \n"); // br: pc 0x807
	else if (time < 6 pm ) printf ("go to IIB \n");  // br: pc 0x80a
	else if (time <=10 pm) printf("go to StarBucks\n");  // br: pc 0x815 
	else printf("sorry. No more coffee\n"); 
}

void MF_c::get_coffee(){
// beginning of the function body starts at 0x820
	If (time >= 7 am && time < 8 am) printf("go to Seattle's Best\n");  // br: pc 0x821
	else if (time >= 8 am && time < 1pm ) printf ("go to CCB \n"); // br: pc 0x827
	else if (time < 5 pm ) printf ("go to IIB \n");  // br: pc0x82a
	else if (time <=10 pm) printf("go to StarBucks\n");  // br: pc 0x825 
	else printf("sorry. No more coffee\n"); 
}

void Sa_c::get_coffee() {
// beginning of the function body starts at 0x900
	if (time >= 7 am && time < 10 pm) printf(\"go to Starbucks \n"); // br: pc 0x902
	else printf("sorry, No more coffee\n"); 

}
void Su_c::get_coffee(){
// beginning of the function body starts at 0xa00
	if (time> =10 am && time < 6 pm) printf("go to Starbucks \n"); // br: pc 0xa03
	else printf("sorry,  No more coffee\n"); 
}

main()
{
// initialize code. // week array is initialized 
for (today= Thursday ; today <= Sunday; today++) { // br: pc 0x100 : NT: Loop exit 
	date_c *date = week[today];
       for (time = 7 am ; time < 5 pm; time = time + 6) {  // br: pc 0x102, NT Loop exit
           date->get_coffee(); // indirect branch at PC 0x110: indirect branch X 
      }
}