CS4290/CS6290 High Performance Computer Architecture

Fall 2011



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Reading List

Please use LibX GT Web Localizer to access ACM/IEEE/Synthesis lecture series

Basic Superscalar architecture Instruction Scheduling Branch predictor and predication Cache and Memory
Synthesis Lecture Series

Prefetching GPU architecture Intel Larrabee Memory schedulers Power Heterogeneous architectures Interconnect Cell and Power 5
  • [CELL1] Introduction to the Cell Multiprocessor
  • [CELL2] Synergistic Processing in Cell's Multicore Architecture, IEEE Micro, Vol. 26, No. 2, March-April 2006, pp.10-24.
  • IBM Power5 Chip: A Dual-Core Multithreaded Processor. Ronald N. Kalla, Balaram Sinharoy, and Joel M. Tendler. IEEE Micro. 24(2), 2004