ECE Fundamental Concepts

1. Overview

What's in this section? 

In this section, we provide you with a review of basic concepts necessary to understand circuit design. This section will cover combinational logic and sequential logic, and will provide examples where useful. If you already feel comfortable with these concepts, you may want to skip to the next section (Setting up LogicWorks)*include link* and use this section as reference.

For additional information, the following links may be useful: SR Flip Flop and Adding Binary Numbers.

As well as the following books:

Collins, Thomas R., et al. ECE 2031 Laboratory Manual. North Chelmsford: Erudition Books, 2003.

Kime, Charles R., and M. Morris Mano. Logic and Computer Design Fundamentals. New Jersey: Prentice Hall, 2001.

2. Boolean Algebra

Boolean Algebra is a fundamental concept for understanding both combinational and sequential logic. Here we provide a rough outline. For our purposes, we will work with 1's and 0's.

AND 

The AND operation takes in inputs A and B, and returns the ANDed result. It is often denoted by AB.

Example: 0 AND 1 = 0.

OR 

The OR operation takes in inputs A and B, and returns the ORed result. It is often denoted by A+B.

Example: 0 OR 1 = 1

NOT 

3) The NOT operation takes in input A, and returns the NOTed result. It is often denoted by NOT(A).

NOT(0) = 1

NOT(1) = 0

NAND 

The NAND operation takes in inputs A and B, and returns the NANDed result.

Example: 0 NAND 1 = NOT(0 AND 1) = NOT(0) = 1

NOR 

The NOR operation takes in inputs A and B, and returns the NORed result.

Example: 0 NOR 1 = NOT( 0 OR 1) = NOT( 1 ) = 0

EOR 

The EOR operation (Exclusive-OR) takes in inputs A and B, and returns the EORed result. Also known as XOR (eXclusive-OR).

Example: 0 EOR 1 = 1

Each of these operations has a corresponding gate, and the symbolic representations are detailed in the figure below.

Examples: (AB) + (AC)

And of course, no review of Boolean logic would be complete without DeMorgan's Theorem:

1) NOT(A OR B) = NOT(A) AND NOT(B)

2) NOT(A AND B) = NOT(A) OR NOT(B)

3. Simple but Useful Digital Circuits

Here we outline 4 building blocks of digital circuitry that are fundamental to combinational logic.

Half Adder 

A half adder takes in two inputs A and B, adds, and returns the resulting sum S and a carry out C. Its logic table and circuit diagram are shown below.

Full Adder 

A full adder is more powerful than a half adder. Unlike a half adder, it can also take in a carry-in bit, and uses that in a calculation. A full adder takes in three inputs, Cin, A, and B, adds, and outputs the resulting sum S, and a carry out Cout. Its logic table and circuit diagram are shown below.

We note that full adders can be used to add any two n-bit numbers. An illustration for addition of 4-bit numbers is given below.

Here, we simulate addition as we would do on paper. We add the least significant bit, feed the resulting carry-out to the carry-in slot for the next significant bit, and perform the addition again. We repeat the procedure sequentially until we have completed the addition on the most significant bit.

Multiplexer 

A multiplexer (MUX) takes in multiple inputs X1, X2, ..., Xn, and a selector input A. From the value of A, the multiplexer selects the corresponding Xj to output. The logic table and the circuit for a 2-multiplexer are given below.

De-multiplexer 

A decoder/de-multiplexer (DMUX) takes in two inputs, a selector A, and an input IN. The value of A will decide which output Oi gets the value for X. The logic table and the circuit for a 2-demultiplexer are given below.

4. Sequential Logic

Overview 

While it is possible to accomplish simple operations with combinational logic, to accomplish more complex and dynamic tasks it must be possible to store information between operations. Circuits with that capability are called sequential logic circuits (Kime 183).

Data Latches 

A binary value can be stored in a structure called a D latch. The structure of a latch can be seen below (Kime 190).

Important: The problem with a D Latch is that the previously stored value can appear as an output while the C input is still triggered.

In the diagram, D is the data input, C is the control, and Q is the output. The value stored in the latch only changes when the C input is set to 1, and the latch will then continue to output to Q the value that was previously on D when C reverts to 0. The problem with this design is that on a transition the previously stored value can appear as an output while the C input is still triggered. This is solved through the use of a D flip flop, which is basically two latches chained together, as shown next.

Data Flip Flop 

The inputs are labeled in the same manner as the D latch. With this design the second latch will always contain the value the first latch had during the end of the previous cycle (Kime 192).

Clocking 

In order for these storage mechanisms to be useful there must be a consistent control mechanism to coordinate cycles. A clock which alternates between high and low states is used, and the signal from the clock is the control signal to the flip flops. When using a clock with flip flops the flip flops are "triggered" at a certain point in each cycle. There are positive edge triggers, negative edge triggers, and level sensitive triggers.

Edge Triggering 

Positive edge triggered flip-flops capture the data when the clock "goes high", transitioning from its low state to its high state. Negative edge triggered flip-flops do the reverse, capturing the data when the clock "goes low", transitioning from its high state to low state. Level sensitive triggered flip-flops capture the data when the clock is in its high state, but do not begin outputing the new data till the clock transitions back to low (Collins 79).

Edge Triggering Example 

The following is an example of a negative edge triggered flip-flop hooked up to an LED with an input. The D flip-flop in the example starts off containing the value 0.

The LED is off, the input starts off as 1 and the clock starts off low. Because the clock is low the flip-flop ignores the input and continues to output 0.

The clock goes high. Because this is a negative edge triggered flip-flop the flip-flop does not capture the input value when the clock goes high, and the LED remains off.

During the high state the flip-flop does not capture the value and the LED remains off.

When the clock goes low the flip flop captures the data and latches, outputting 1. This turns the LED on.

Now that the clock is low, the flip-flop continues to output 1, the value it captured when triggered by the negative edge.

Here the input has been changed to 0, but the flip-flop will continue to output 1 until the next clock transition from high to low.