; ; 3-Apr-98 ; ; RCS: $Id$ ; Lecture notes for Friday, 3-Apr-98 This lecture was the first of two reviewing digital logic basics. These lectures follow the flow of topics in Appendix B of the text pretty closely. 1. Gates. Simple basic gates include NOT, AND and OR. [Someone mentioned NAND which is "universal" because you can synthesize NOT, AND and OR from NAND gates] [same with NOR]. What's inside a gate?... We don't care! Our basic abstraction is a gate and as long as we obey the rules of the abstraction, we don't care how it is implemented. The implementation could be electrical, optical, hydralic, iguanas on roller skates, whatever. Peeking inside for a moment, though, the technologies commonly used for gates today are electrical and make use of transistors which are wired as switches. Logic values 0 and 1 are typically represented as 0 volts and 5 volts. Along with the logical wires in a circuit, then, there are always power supply wires representing 0 volts and 5 volts. The internals of a gate include at least two transistor switches: one to connect the output to the 0 volt rail when the output is a logical 0 and another to connect the output to the 5 volt rail when the output is to be a logical 1. ... ------------------ ... 5 volt power supply rail | \ | \ | \ A ------| >O------ Y NOT gate (Y = NOT(A)) | / | / | / ... ------------------ ... ground (0 volt) power supply rail 2. Combinational logic. Combinational logic means simple gates and any *acyclic* circuits constructed from simple gates. The logical function of a block of combinational logic may be specified in several equivalent ways. ____________ | | A ------| | | C.L. |------ Y B ------| | | |------ Z C ------| | |____________| a. you can draw the circuit in gates b. you can write the function as a boolean equation, e.g. Y = A * B * C Z = A * (B + NOT(C)) c. you can specify the function as a truth table, e.g. for the equations above: A B C | Y Z ------+---- 0 0 0 | 0 0 0 0 1 | 0 0 0 1 0 | 0 0 0 1 1 | 0 0 1 0 0 | 0 1 1 0 1 | 0 0 1 1 0 | 0 1 1 1 1 | 1 1 There are other representations, like Karnaugh maps, which is a useful twist on a truth table. Given that these representations are equivalent, a natural question is how to translate between the representations (hopefully as mechanically as possible). Here were some answers. gates -> equations: just read the gates & write down the equations. equations -> truth table: evalute the equation for each input combination in the truth table. That direction was pretty easy, the other is more fun. truth table -> equations: in digital logic, you spend time figuring out how to produce minimal circuits (that's what Karnaugh maps are for, for instance). Often minimization of logic isn't as important as minimization of design time. A completely mechanical way to convert a truth table into an equation is to write out a product term for each row in the truth table and then sum the product terms (a "sum of products" form). For example, for part of the the truth table above: Z = ( NOT(A) * NOT(B) * NOT(C) * 0 + NOT(A) * NOT(B) * C * 0 + NOT(A) * B * NOT(C) * 0 + NOT(A) * B * C * 0 + A * NOT(B) * NOT(C) * 1 + A * NOT(B) * C * 0 + A * B * NOT(C) * 1 + A * B * C * 1) equations -> gates: Equations and gates are easy to translate between, so one option is to go buy a bucketful of gates and wire them up into the circuit specified by your equation. Inspecting the unoptimized, sum-of-products form for Z, above, however, notice that almost all of the circuit (everything but the constants on the right) will be the same for any 3-input function. Instead of buckefuls of gates, someone could make a circuit that has everything-but-the-constants wired into it and sell you that. They do; it's called a ROM (read-only-memory). There are actually several such products, which the book discusses (ROMs, PLAs, PALs) [In a nutshell, ROMs have *every* possible product term implemented. You can always implemente any equation in a ROM. PLAs and PALs use some cleverness that reduces the circuitry tremendously while limiting the equations that are representable slightly. Ordinarily, one thinks of ROMs as "memory" and PLAs as "circuits", but it's useful to recognize that the two are entierly interchangable; PLAs are often used for on-chip microcode store, for instance, because they're smaller than ROMs.] 3. Timing. The one piece of timing information (that we care about anyway) associated with a block of combinational logic is its propagation delay, Tpd. Tpd is always a worst-case measure, so when you compose a circuit out of multiple blocks of combinational logic, the composite Tpd must account for the worst-case path through the circuit. With timing, we can come back and nail down the rules for the abstraction of combinational logic. Some call this the "Static Discipline". If you: a. Provide inputs that are all valid 1s and/or 0s b. Wait long enough (Tpd) Then the combinational logic circuit will give you an output of valid 1s and/or 0s representing the specified logical function on the inputs. These rules seem simple but there are some subtleties. Foremost, *all* inputs must be valid 1s or 0s. You can't for instance leave the inputs to an electronic circuit unconnected and expect to get a valid answer even if the input left unconnected has no logical effect on the circuit! Some types of circuits have a "default" value, others (notably CMOS) do not. Once you've broken the abstraction, all bets are off. As you may have found, abstractions in programming systems have this property also. 4. Muxes. The short answer on combinational logic is "whatever you want, I can implement with a ROM". However, there are a couple of standard functions worth talking about. One is a multiplexor or mux. [see the discussion & illustrations in Appendix B]. 5. Tri-state buffers. The final piece of combinational logic is one that comes back and breaks, or at least gives you the means to break, the gate abstraction. A "tri-state" buffer has an output that can be a 0, a 1 or "Hi-Z" = "High Impedance" = EE-speak for "unconnected". Since current, transistor-based gates use transistor switches to connect the output of the gate to either 0 volts for a logical 0 or +5 volts for a logical 1, you can imagine that it's easy to make a tri-state buffer by contriving to activate neither switch. |\ A ---| >----- Y E | Y |/ ----- | 0 | Hi-Z E ----/ 1 | A A tri-state buffer sounds a little wierd since one by itself breaks the digital abstraction. The assumption is that you never use one by itself, but always in multiples with their outputs tied together where one (any _only_ one) is enabled at any one time. There are a couple of useful things you can then do, e.g. a. Build a mux [homework problem]. The resulting multiplexor (especially if it's a big one) uses many fewer transistors than a conventional multiplexor. b. Build a "reversible" signal wire between boxes A & B (i.e it can be and output from A and an input to B *OR* an output from B and an input to A. --------- --------- | | | | | A |<------------->| B | | | | | --------- --------- 6. Circuits with state. Combinational logic is defined to be acyclic. What happens if you add cycles? Havoc, most likely. But cycles are useful because they can be used to store state. The conventional solution is to very tightly encapsulate the use of cycles into some well-defined primitives and work exclusively with those primitives. I illustrated a simple cycle with cross-coupled NAND (an RS flip-flop), then proceeded to two higher-level devices that are more useful, the D-latch and the D-flip-flop (or register). I'm going to talk about all these again on Wednesday, though, so I'll cut this note short here.