;
;                                                       21-Apr-98
;
; RCS: $Id$
; Lecture notes for Monday, 20-Apr-98

Quiz Wednesday (the full hour)

--> closed book
--> one side-of-one-sheet-of 8.5"-by-11" paper of notes

Topics:

1. Combinational logic, i.e. ROMs, Muxes, Tri-states
2. Sequential logic, i.e. registers and particularly FSMs
3. Instruction sets.
4. Stacks & Procedure-calling.
5. Computation with combinational logic and single-bus circuits.

In a little more detail:

1. Combinational logic.

   Combinational logic is represented by gates, by boolean equations
   or by a truth table.  You can implement truth tables directly in
   ROMs (or MUXes).

   Tri-state buffers are buffers with an "enable" input.  Unlike any
   other kind of gate we've seen, you can tie the *outputs* of
   tri-state buffers together with the caveat that exactly one of the
   buffers is enabled at any particular time.  This is a useful way to
   make a sort of MUX.

   A good quiz question would be to convert a combinational logic
   circuit from one form to another, e.g. implement a ROM with MUXes.

2. Sequential logic.

   Circuits with state can be hard to reason about, so we (and most
   designers) add a lot of restrictions to how they can be used.  For
   our purposes:

	-- all state is stored in clocked registers
	-- all the registers receive the clock from the same, global
	   clock signal (a square wave).

   The Finite-State Machine (FSM) idea is useful for structuring
   circuits with a small amount of state.  The internal action of an
   FSM is represented by a state-transition diagram which shows how
   the state evolves as a function of the inputs and current state.
   The outputs of the FSM (for our purposes) are restricted to be a
   function of the current state, so each state bubble in the
   state-transition diagram may be labelled with the output values for
   that state.

   Classic FSM questions: here's a state-transition diagram, show me
   the (a) circuit and (b) truth-table for the combinational logic blocks
   (ROMs) in the circuit; what's the minimum clock period of the FSM
   in terms of the Tpd, Tsetup and Thold of the circuit elements.

   Also, how many states can you represent with N bits?  How many bits
   does it take to represent M states?

3. Instruction sets.

   I didn't say much about instruction sets on Monday.  The LC
   instruction set is "interesting" (read "twisted") compared to MIPS
   because it's missing a bunch of things you take for granted.  What
   would have to change in the machine instruction encoding to add,
   say, an immediate mode, e.g. an ADDI instruction?

4. Stacks & Procedure-calling.

   State local to a procedure is conventionally stored on a stack
   since the dynamic call graph of a program is conventionally a
   tree.

   Stacks can grow up or down in memory.

5. Computation.

   So far we've talked about two ways to perform computation of simple
   equations: completely combinational circuits and single-bus
   circuits.  Given an equation, e.g. Y = X^5 (where X and Y are
   binary numbers of some given width, like 32 bits), you ought to be
   able to construct combinational and single-bus circuits.

   The combinational circuit to compute Y = X^5 would have several
   multipliers in it, wired together.

   The single-bus circuit would have exactly one multiplier plus one
   bus connecting multiplier, input and output ports through tri-state
   buffers and registers, plus an FSM for controlling the tri-state
   buffers and the registers.  The FSM outputs in the FSM's
   state-transition diagram may be labelled with "bus operations"
   (e.g. "A <- X") since there's a straightforward translation between
   these symbolic operations and the underlying control signals (DrX,
   LdA).

   Good questions would be, given an equation, sketch a circuit or,
   given a single-bus circuit, draw out the states of the FSM.

   Last Friday we started talking about using a single-bus circuit to
   implement the LC but we didn't really get too far with it, so don't
   worry about the details for the quiz.