Students (Past):

Introduction:

The primary objective of the Beehive project is in contributing towards ``Ubiquitous Parallel Computing''. We focus on a cluster of workstations to exploit their low cost, hardware scalability, flexibility through software components for aiding parallel computing, and inherent amenability to supporting high-availability and reconfiguration. On the application's side we target newer domains which stand to gain through parallel computing and can be seen as ``enabling applications'' to be responsible for pervasiveness of parallel computing to everyday life. The ``applications driven'' story is that the inefficiencies caused by the distributed nature of the platform mandate using the flexibility of software components to more closely match the ``systems support'' to application requirements. This should buy us performance and scalability and we intend to do so without sacrificing the ``ease of use''.

The Beehive prototype is built on top of Solaris uni- and multi- processor boxes here in the HPPCE laboratory. The networks interconnecting them in the lab are Myrinet, ATM and High-speed Ethernet. Beehive relies on commodity hardware and software components and provides user-level systems support across the cluster for:

• a global address space abstraction for sharing state with a configurable access granularity
• a thread based model supporting multi-threading to distribute computation
• a flexible memory system which adapts to application needs by incorporating novel notions of coherence and consistency, and provides explicit communication primitives to aggressively share data for performance enhancement
• basic support for high availability and reconfiguration to survive soft and hard failures

A writeup is available (PostScript) (PDF) explaining the architecture of Beehive.

Publications:

• High Availability for Software DSM, Eighth Workshop on Scalable Shared Memory Multiprocessors held in conjunction with the 26th Annual International Symposium on Computer Architecture, Atlanta, May 1999.
  V. Vellanki, N. Harel, N. Jeong, J. Lee, U. Ramachandran.

• Beehive: Application-driven Systems Support for Cluster Computing, PhD Thesis, College of Computing, Georgia Institute of Technology, September 1997.
  Aman Singla

• Design and Evaluation of a Cooperative Technique for High Availability in Distributed Shared Memory Systems, Technical Report GIT-CC-97/19, College of Computing, Georgia Institute of Technology, August 1997.
  A. Singla and U. Ramachandran

• Temporal Notions of Synchronization and Consistency in Beehive (PostScript) (PDF)
  , Proceedings of the Ninth Annual ACM Symposium on Parallel Algorithms and Architectures, June 1997
  A. Singla, U. Ramachandran and J. Hodgins

• Timepatch: A Novel Technique for the Parallel Simulation of Multiprocessor Caches (PostScript) (PDF)
  Technical Report GIT-CC-96-24, June 1996.
  U. Ramachandran and G. Shah and I. Yanasak and Richard Fujimoto.

• The Quest for a Zero Overhead Shared Memory Parallel Machine (PostScript) (PDF)
  Proceedings of the 1995 International Conference on Parallel Processing, August 1995
  G. Shah, A. Singla and U. Ramachandran

• Architectural Mechanisms for Explicit Communication in Shared Memory Multiprocessors (PostScript) (PDF)
  Proceedings of Supercomputing 95, December 1995
  U. Ramachandran, G. Shah, A. Sivasubramaniam, A. Singla and I. Yanasak

• Cache-based Synchronization is Shared Memory Multiprocessors
  Journal of Parallel and Distributed Computing, 1995.
  U. Ramachandran and J. Lee.

• Timepatch: A Novel Technique for the Parallel Simulation of Multiprocessor Caches
  Fourth Workshop on Scalable Shared Memory Multiprocessors, April 1994
  G. Shah, R. Fujimoto and U. Ramachandran.

• OBee: An architecture to integrate optics into a shared memory multiprocessor
  Technical Report GIT-CC-93-15, July 1993.
  M. Davis Jr. and U. Ramachandran.

• Techniques for Software-assisted Cache Coherence on Beehive
  Third Workshop on Scalable Shared Memory Multiprocessors, May 1993
  G. Shah and U. Ramachandran.

• A Distributed Hardware Barrier in an Optical Bus-based Distributed Shared Memory Multiprocessor.
  In Proceedings of the 21st International Conference on Parallel Processing. August 1992.
  M. H. Davis, Jr. and U. Ramachandran.

• Towards Exploiting the Architectural Features of Beehive.
  Technical Report GIT-CC-91/51. Georgia Institute of Technology. November 1991.
  G. Shah and U. Ramachandran.

• Architectural Primitives for a Scalable Shared Memory Multiprocessor.
  In Proceedings of the 3rd Annual ACM Symposium on Parallel Algorithms and Architectures. July 1991.
  J. Lee and U. Ramachandran.

• Locks, Directories, and Weak Coherence - A Recipe for Scalable Shared Memory Multiprocessors
  Scalable Shared Memory Multiprocessors, Dubois and Thakkar (Editors), Kluwer Academic Publishers, 1991.
  J. Lee and U. Ramachandran.

• Synchronization with Multiprocessor Caches.
  In Proceedings of the 17th International Symposium on Computer Architecture. May 1990.
  J. Lee and U. Ramachandran.

Contacts:

Please send all correspondence regarding general College of Computing programs and admissions (including requests for admissions packets, electronic applications, etc.) to the Admissions addresses under The College of Computing Education Page.

Send all correspondence regarding this page to Namgeun Jeong (namgeun@cc.gatech.edu)