CS6760: Pipelined and Parallel Computer Architecture


Benchmark Status



Using SuperDLX Cache Simulator



Lecture Notes

Lecture 2: Instruction Set Architecture

Lecture 3: Performance and Cost

Lecture 4: Timing, Book Examples, Basic Pipelining

Lecture 5: Pipelining (cont.)

Lecture 7: Multiple Issue, Scoreboarding, Tomasulo's Algorithm

Other handouts: Explanation of Scoreboard Algorithm, Explanation of Tomasulo's Algorithm,
Blank templates for scoreboard, Tomasulo (revised)

Project Suggestions

Homework 2

Midterm Review

Lecture 10: Review of Caches

Homework 3: Basic Caches

Lecture 11: Improving Cache Performance

Homework 4: Virtual Memory, Physical Memory

Lecture 12: Caches, Instruction Traffic

Lecture 13: Memory Technology, Virtual Memory

Lecture 14: I/O, Disk Arrays

Lecture 15: I/O

Writing Advice

Introductory Material on RAID (can't view individual pages with ghostview)

Full Paper (long) on RAID (can't view individual pages with ghostview)

Lecture 16: Vector Processors

Lecture 17: Multiprocessors

Review for Final


SPEC benchmarks

Directory containing SPEC benchmarks:

/net/projects/groups/spec95/benchspec

Peter Wan is giving the members of the class group permission to access these benchmarks.
We will be getting information from Bill Applebe's group about which benchmarks have already been run on SuperDLX.

SuperDLX simulator

Superdlx documentation can be found in the following directories:

Original version of superdlx simulator is in: ~zhou/6760/superdlx
Documentation is in this directory as SuperDLX.ps

Revised version with new features is in: ~reid/superdlx/
with documentation under ~reid/superdlx/.documentation