Jianli Shen
Shirley

　

College of Computing, Georgia Tech

801 Atlantic Drive, Atlanta, GA 30332-0280

 

 

 

 

 

Email:         

jianli [AT] cc dot gatech dot edu

[Research] [Courses] [Schedule] [Education] [Experience] [HomeTown]

After received my masters’ degree in Aug, 2006, I decided to search for an industry job that can extend my research/study work in school in the real world application. I believe I will continue learning and solving challenge problem in my position. I will make an impact in the future technology.

Research

Research Areas

   I am currently working in the Computer Architecture area. We use state of art simulators to simulate/research the behaviors of different architecture components as for branch prediction, scalable load/store queue for memory disambiguation and memory security.

Conferences in Focus

    ISCA'05(Due: 11/11,18), Micro-37'04 (12/4-8), ASPLOS-XI'04(10/9-13), PLDI'05(6/12-15), HPCA'05(2/12-16), PACT, ISPASS'05(3/20-22), CASES, JILP, ISLPED, HotChips

    News:
      I win the CRA travel expense for CRA-W/CDC Computer Architecture Summer Workshop at Princeton University, July 19-21, 2006. I will do a presentation of my work on low overhead architecture support for memory protection.

Research Resource

Architecture Groups: UIUC (IMPACT,iACOMA), WISC, Purdue, Stanford_SUIF, NCSU
Who's who in Computer Architecture
Simulator  Trimaran  SimpleScalar  SESC
Benchmark  SPEC
Ani-Ani Web

Courses

Spring 2006

CS8803 Advanced Issues in Computer Architecture
CS6240 Database System Concept and Design
　

Fall 2005
CS6250 - Computer Network by Prof. Mostafa Ammar
CS6235 - Embeded and Real Time Systems   by Prof. Calton Pu
CS8803 - Advanced Micro-architecture      by Prof. Gabriel Loh  

Spring 2005

·        CS6230 - High Performance Parallel Comp by Matthew Wolf

Fall 2004

·        ECE7102 RISC Architecture  by Prof. Hsien-Hsin S. Lee

Courses at Missouri

Winter 2003

Fall 2003

  • CS303 Design and Analysis of Algorithms I
  • CS486 Parallel and Distributed Processing
    • Project1: Migration System Developing     
    • Project2: Replication System Developing   
    • Presentation: Distributed Object Based System: CORBA

  Schedule

schedule for Spring 2005

 

M

T

W

R

 F

10:00-11:00

　

 

　

 

 

11:00-12:00

 

 

　

 

  Grp Mtg

12:00-1:00

　

　

   CERCS

　

Arch-beer

1:00-2:00

　

 

Adv. Mtg

 

TA Meeting

 2:00-3:00

CS6230

 

CS6230

 

   CS6230  

 3:00-4:25

Office Hour

　

Office Hour

 

 

4:35-5:55

CS6241

　

CS6241

　

 

schedule for Fall 2004

 

M

T

W

R

 F

10:00-11:00

　

 

  

 

 

11:00-12:00

 

 

　

 

  

12:00-1:00

SPARC Seminar

ECE6100

   

ECE6100

Arch-beer

1:00-2:00

 

 

 

 

 

 2:00-3:00

 

 

 

 

     

 3:00-4:25

ECE7102 RM457

meeting with advisor

ECE7102

 

 

4:05-5:55

GTA

4:35 CS7001

 

4:35 CS7001

 

 Education

M.S. (2004.8 – 2006.8 )
College of Computing

Ph.D. Student (2003.8 - 2004.7 )

Dept. of Computer Science
University of Missouri-Columbia

B.E. & M.E. (1996.9 - 2003.6)
Dept. of Computer Science & Technology

  Experience

Software Engineer (2002.2 - 2003,3 )
Working on the iDEN international Group (co-worked with Florida Branch) at NanJing Software Center

Software Testing Engineer (2003.3- 2003.6)
Working on DSL product in Broadband Network Department at Shanghai

RA works at Missouri

　

　

　

　
  • Research work with advisor Yi Shang (2003.8-2003.7)
  • Localization and coverage issues in Wireless Sensor Network. See: A New Density Control Algorithm for WSNs at (LCN'04)
  • Task Allocation and Path Planning for UAVs (Unmanned Aerial Vehicles). Algorithm: Greedy, Local Search, MILP (Mixed-Integer Linear Programming), ACO (Ant-Colony-Optimization) etc. Tools: Matlab, AMPL, CPLEX
    This work is contracted with Raytheon.

 

RA works at Gatech

　

　

　

　

　

　

　

　

　

　

　

　

　

　

Research on advanced computer architecture issues, using a cycle-accurate event-driven superscalar simulator (SESC) implemented in C++.

·         Architecture Support for User Level Memory Protection

Modified Doug-Lea’s Memory allocation library to provide separate permission for heap meta-data and heap data. Simulated a small on-chip cache to store the permission information of heap memory at different granularity.

·         Fast L0 Like Cache Structure for Memory Disambiguation

Designed a fast direct mapped load-store queue (LSQ) that can perform approximate store-load forwarding with low latency compared to the traditional unscalable fully associated LSQ. Further improved the percentage of store/load forwarding by letting an older store sit in the new LSQ after retire.

·         Hybrid Memory Prefetching to Tolerate Long Memory Access Latency

Designed a perceptron arbiter to adjustably learn and predict a better prefetching scheme to achieve both high coverage and high accuracy on prefetching.

·         Branch Prediction with Perceptrons

   Implemented branch predictors using normal perceptron and fast path-based perceptron. Tested various hybrid approaches to utilize the two predictors to achieve better prediction accuracy.

 HomeTown   

I was born and raised in a town belong to the heaven of SuZhou, China.

Pot

Suzhou Garden