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GRE CS Subject Test Contents by Links
- Software System and Methodology - 35%
- Data organization
- Data types
- Data structures and implementation techniques
- File organization (e.g. sequential, indexed, multilevel)
- Program control
- Iteration and recursion
- Functions, procedures, and exception handlers
- Communication and synchronization
- Programming languages and notation
- Constructs for data organization and program control
- Scope, binding, and parameter passing
- Dynamic Type Checking vs. Static Type Checking:
- Dynamic scoping elminates the possibility of static type checking
- Error checking can be done at two different times:
Dynamic checking requires the program to be executed.
Static checking happens before runtime.
- Evaluation: Static checking is preferable for two reasons
runtime efficiency
completeness (static checking does not exclude run-time errors! but it excludes run-time errors due to type misuse.)
- Subprograms, argument passing (general) (.html)
- Parameter Passing (general) (.html)
- Pass-by-Name (clearly explained) (.html)
- Scoping: Static vs. Dynamic (.html)
- static scoping: A subprogram is called in the environment of its definition.
- dynamic scoping: A subprogram is called in the environment of its caller
- No extra space swap
- i = i - j; j = i + j; i = j - i;
- Expression evaluation
- Systems
- Compilers and interpreters
- Operating Systems, including resource management and
protection/security
- Job Scheduling
- Mutual Exclusion
- Semaphore and P V operations
- Other topics about OS
- Operating system = resource manager (most important function)
- reentrant: A reentrant program is one which does
not alter in the course of execution; in other words, it consists
entirely of pure (read-only) code. Reentrancy is important
whenever asynchronous execution is possible; for example, a
non-reentrant program may not be safe to call from a signal handler. In
systems with multiple threads of control, a non-reentrant program must
be called only within interlocks. (Macro is reentrant)
- Multi-threading: has own stack and context (control of flow), but
shares other resources such as same memory space, data, and files (loaded
into memory).
- interrupt: IO, page fault, task switching (?), definitely no cache
missing.
- Networking and distributed systems
- System development tools
- System performance
- Computer Organization and Architecture, Operating System - 20%
- A. Logic Design
- Implementation of combinational and sequential circuits
- combinational circuits: no flip-flop, memoryless
- sequential circuits: has flip-flop, has memory, must be
controlled by an external clock(?), may have feed back.
- Functional properties of digital integrated circuits
- Processors and control units
- Instruction sets
- Register and ALU organization
- Number representation
- Control sequencing
- Microinstruction: An instruction that controls data
flow and instruction-execution sequencing in a
processor at a more fundamental level than machine instructions. Note: A
series of microinstructions is necessary to perform an individual
machine instruction. (CPU internal logic, different from CPU instruction, related to how
CPU instruction opcode, but not related to CPU instruction address.)
- instruction interpretation:
- fetch
- defer (for indirect addressing)
- execute
- Data paths
- Memories and their hierarchies
- Speed, capacity, cost, allocation
- Garbage collection:
- not suited for reclaiming cyclic structures
- incurs additional space overhead for each memory cell
- an alternative to mark-and-sweep garbage collection
- time to reclaim could be linear in the number of cells to be
reclaimed.
- Cache, main, secondary storage
- Virtual memory, paging, segmentation
- Farthest in the future: Optimal but unpractical, all practical
paging algorithm gather info from the history.
- FIFO: First In Last Out
- LIFO: Last In First Out
- LRU: Least Recently Used
- LFU: Least Frequently Used
- Communication
- Bus, switch, and network structures and protocols
-
Hamming distance: It can be shown that to detect n bit
errors, a coding scheme requires the use of codewords with a Hamming
distance of at least n + 1. It can also be shown that to correct
n bit errors requires a coding scheme with at least a Hamming
distnace of 2n + 1 between the codewords
- Packet switch network: eg. TCP/IP: the packets of the same message
may arrive out of order.
- complete interconnected network: n(n-1)/2 links
- ring network: n links, provide 2 distinct paths between any two
processors.
- I/O
- Synchronization
- High-performance architectures
- Pipelining
- Multiprocessors
- Vector processors
- Theory - 20%
- Automata and language theory
- Models of computation (finite automata, pushdown automata, Turing machines)
- Formal languages (regular languages, context free language)
- Decidability
- Design and analysis of Algorithms and computational complexity
- Exact or asymptotic analysis of the best, worst, or average case for the time and space complexity of specific algorithms
- Upper and lower bounds on the complexity of specific problems
- NP-completeness
- Correctness of programs
- Formal specifications and assertions (Hoare's triple, loop invariant)
- Verification techniques
- Methematical Background - 20%
- Discrete structures
- Mathematical logic
- Elementary combinatorics, including graph theory and counting arguments
- Elementary discrete mathematics, including number theory, discrete probability, recurrence relations
- Numerical mathematics, Numerical analysis
- Computer arithmetic, including number representations, roundoff, overflow and underflow
- Classical numerical algorithms
- Linear algebra
- Advanced Topics - 5%
- Topics including modeling and simulation, information retrieval artificial
intelligence, computer graphics, data communicatioins, databases, VLSI.
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