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<documents>
  <document>
    <docID>0954310</docID>
    <docDate>September 1, 2009</docDate>
    <docSource></docSource>
    <docText>EAGER: Autonomous Data Partitioning Using Data Mining for High End Computing

   Query response time and system throughput are the most important metrics when it comes to database and file access performance. Because of data proliferation, efficient access methods and data storage techniques have become increasingly critical to maintain an acceptable query response time and system throughput. One of the common ways to reduce disk I/Os and therefore improve query response time is database clustering, which is a process that partitions the database/file vertically (attribute clustering) and/or horizontally (record clustering). To take advantage of parallelism to improve system throughput, clusters can be placed on different nodes in a cluster machine.       This project develops a novel algorithm, AutoClust, for database/file clustering that dynamically and automatically generates attribute and record clusters based on closed item sets mined from the attributes and records sets found in the queries running against the database/files. The algorithm is capable of re-clustering the database/file in order to continue achieving good system performance despite changes in the data and/or query sets.  The project then develops innovative ways to implement AutoClust using the cluster computing paradigm to reduce query response time and system throughput even further through parallelism and data redundancy.  The algorithms are prototyped on a Dell Linux Cluster computer with 486 compute nodes available at the University of Oklahoma.  For broader impacts, performance studies are conducted using not only the decision support system database benchmark (TPC-H) but also real data recorded in database and file formats collected from science and healthcare applications in collaboration with domain experts, including scientists at the Center for Analysis and Prediction of Storms (CAPS) at the University of Oklahoma. The project also makes important impacts on education as it provides training for graduate and undergraduate students working on this project in the areas of national critical needs: database and file management systems, and high-end computing and applications.  The developed algorithm and prototype, real datasets and performance evaluation results are made available to the public at the Website: http://www.cs.ou.edu/~database/AutoClust.html.</docText>
    <keyword>algorithms</keyword>
    <division>CCF</division>
    <directorate>CSE</directorate>
    <award-instr>Standard Grant</award-instr>
    <programreferencecode>HPCC</programreferencecode>
    <programreferencecode>9218</programreferencecode>
    <progmgr>Almadena Y. Chtchelkanova</progmgr>
    <fieldofapplication>0000912 Computer Science</fieldofapplication>
    <keyword>education</keyword>
    <keyword>database</keyword>
    <programreferencecode>9150</programreferencecode>
    <keyword>data mining</keyword>
    <organization>University of Oklahoma Norman Campus</organization>
    <state>OK</state>
    <amount>125000</amount>
    <program>HECURA</program>
    <programelementcode>7952</programelementcode>
    <program>HIGH-PERFORMANCE COMPUTING</program>
    <programelementcode>7942</programelementcode>
    <programreferencecode>7916</programreferencecode>
    <pi>Gruenwald, Le</pi>
  </document>
  <document>
    <docID>0953994</docID>
    <docDate>September 1, 2009</docDate>
    <docSource></docSource>
    <docText>SHF: EAGER: Closing the gap in Controller Synthesis

   Automatic controller synthesis algorithms hold the promise of producing  correct-by-construction systems, obviating the need for costly post facto  verification.  However, there is currently a gap between theoretical foundations of controller synthesis  and their practical implementations on hardware and software platforms. This project addresses challenges in closing the gap in control synthesis.  In particular, we consider two fundamental problems.  First, we consider the problem of implementation complexity of controllers.  While theoretical results have focused on the optimal memory requirements for controllers,  in practice, a controller implementation may have several other optimality requirements  such as the size of the implementing (combinational and sequnetial) circuit,  the complexity and frequency of computing the control action,  and the sensing and actuation bandwidth.  Accordingly, we study algorithms for the construction of optimal controllers under these metrics.  Second, we consider the problem of fault tolerance in controllers,  in which we consider effects of (possibly stochastic) errors in controller implementations.  While traditional fault tolerance techniques such as error-correcting codes and redundancy can be  applied directly, our thesis is that a closer interaction of fault tolerance  with controller synthesis algorithms can lead to fault tolerant designs at costs lower than  traditional techniques.  For example, by distinguishing the ``importance' of signals to the control objective, the costs  associated with error-correction and redundancy can be decreased while having a negligible effect  on the control objective.  The research performed in this project is prerequisite for a more widespread adoption of correct-by-construction  techniques.    The tools and techniques developed in this project  have the potential to significantly enhance our ability to produce robust cyber-physical systems,  thus affecting several large-scale application areas beyond the computer science and control engineering domains.  Practically, the results of the research will lead to better controller synthesis tools.  Theoretically, the research will bring together cross-cutting techniques, ranging from theoretical foundations  in logics and algorithms for control, to optimization techniques, real-time systems, and  hardware and software synthesis.  In addition, by fostering collaboration between software foundations, control foundations,  and hardware synthesis foundations, the project will train graduate and undergraduate students in the emerging  and important domain of formal techniques for cyber-physical systems.</docText>
    <keyword>algorithms</keyword>
    <division>CCF</division>
    <directorate>CSE</directorate>
    <award-instr>Standard Grant</award-instr>
    <programreferencecode>HPCC</programreferencecode>
    <keyword>verification</keyword>
    <programreferencecode>9218</programreferencecode>
    <state>CA</state>
    <fieldofapplication>0000912 Computer Science</fieldofapplication>
    <organization>University of California-Los Angeles</organization>
    <amount>200000</amount>
    <program>SOFTWARE ENG &amp; FORMAL METHODS</program>
    <programelementcode>7944</programelementcode>
    <pi>Majumdar, Rupak</pi>
    <copi>Paulo Tabuada</copi>
    <progmgr>Lenore D. Zuck</progmgr>
    <programreferencecode>7916</programreferencecode>
  </document>
  <document>
    <docID>0953761</docID>
    <docDate>September 1, 2009</docDate>
    <docSource></docSource>
    <docText>EAGER: Automating Correctness Proofs of Transactionalized Data Structures

   In multi-core computing, programmers must write concurrent code to obtain  performance, much harder than sequential code. Transactions are part of the  solution: they reduce concurrent reasoning to sequential reasoning.  But  high-performance data structures require relaxed transactional memory  techniques like open nesting.  This places a tricky correctness burden on the  programmer: identifying which operations on the data structure conflict  (cannot run in simultaneous transactions), and how to undo operations to back  out incomplete transactions.    The proposed solution is to specify what a data structure ought to do, and to  prove that the programmer's conflict and undo specifications are correct. The  project will complete a proof-of-concept tool to demonstrate the feasibility  of the approach.    The intellectual merit includes: a language for specifying data abstractions  as abstract models amenable to the proofs required; a way to describe  conflicts between operations on the data type, and undos; a tool to process  the descriptions and build proofs as satisfiability problems; and algorithms  to prove correctness of abstract locking procotols. The project will be more  successful than general program proving since it works with abstractions, not  implementations, and it deals with specific properties of interest. Future  work can address correctness of implementation.    The broader impact consists in assisting programmers in building safe  high-performance concurrent data structures for multi-core platforms. The  tools and libraries produced will be widely available. Helping solve the  multi-core software problem has huge implications for our economy and society.</docText>
    <keyword>algorithms</keyword>
    <division>CCF</division>
    <directorate>CSE</directorate>
    <award-instr>Standard Grant</award-instr>
    <programreferencecode>HPCC</programreferencecode>
    <state>MA</state>
    <programreferencecode>9218</programreferencecode>
    <fieldofapplication>0000912 Computer Science</fieldofapplication>
    <organization>University of Massachusetts Amherst</organization>
    <pi>Moss, J. Eliot</pi>
    <amount>150000</amount>
    <program>PROGRAMMING LANGUAGES</program>
    <programelementcode>7943</programelementcode>
    <progmgr>Lenore D. Zuck</progmgr>
    <programreferencecode>7916</programreferencecode>
  </document>
  <document>
    <docID>0953155</docID>
    <docDate>June 15, 2009</docDate>
    <docSource></docSource>
    <docText>Collaborative Research: CDI-Type I: Realizing the Ultimate Potential of List Error-Correction: Theory, Practice, and Applications

   Error-correcting codes, studied in a branch of science and engineering known as coding theory, safeguard data against the adverse effects of noise and enable reliable storage and communication of information.  Such codes pervade our daily lives, with applications ranging from computer hard-disks and UPS bar-codes to cell phones and the Internet to deep space communication. One of the most fundamental questions in coding theory is the following: What is the largest possible fraction of errors that a code of information rate R can correct? Recent theoretical breakthroughs provide a complete answer to this question, namely that the ultimate error-correction radius of 1-R can be reached (by codes over sufficiently large alphabets). Moreover, it can be reached constructively with polynomial-time list decoding, via codes closely related to Reed-Solomon codes, which are ubiquitous in practice.    From a practical standpoint, this promises a factor of two improvement over classical error-correction algorithms that are in widespread use today. While this is extremely encouraging, numerous challenges must be overcome in order to bring the theoretical promise of the recent results to practice. This project, led by a multi-disciplinary team, involves an integrated collection of research activities targeted at progress towards the long term goal of attaining the fundamental limit of error-correction. At the theoretical end, the goals include improving the complexity of the decoding algorithms as one approaches the optimal error-correction radius of 1-R, and devising faster algorithms and heuristics for the key steps involved in algebraic list decoding. The project also studies methods to reap the practical benefits of combining the new codes with soft-decision decoding, putting to use the ample amount of probabilistic symbol reliability estimates often available to decoders. Furthermore, the research lays the groundwork for eventual implementation of such algorithms in high-speed/low-power VLSI, thereby enabling the potential deployment of the new codes in a broad range of communication and storage systems. On the education front, the project provides a stimulating research environment for graduate students, encouraging team-work across university boundaries and collaboration across disciplines (computer science, communication theory, and VLSI design).</docText>
    <keyword>algorithms</keyword>
    <division>CCF</division>
    <directorate>CSE</directorate>
    <award-instr>Standard Grant</award-instr>
    <programreferencecode>HPCC</programreferencecode>
    <programreferencecode>9218</programreferencecode>
    <fieldofapplication>0000912 Computer Science</fieldofapplication>
    <state>PA</state>
    <progmgr>Richard Beigel</progmgr>
    <keyword>vlsi</keyword>
    <organization>Carnegie-Mellon University</organization>
    <keyword>ubiquitous</keyword>
    <keyword>education</keyword>
    <pi>Guruswami, Venkatesan</pi>
    <programreferencecode>7752</programreferencecode>
    <program>CDI TYPE I</program>
    <programelementcode>7750</programelementcode>
    <programreferencecode>7721</programreferencecode>
    <amount>313775</amount>
  </document>
  <document>
    <docID>0952279</docID>
    <docDate>November 1, 2009</docDate>
    <docSource></docSource>
    <docText>NSF Travel Grant Support for IEEE International Conference on Computer Communications and Network 2010 Conference

   The 19th IEEE International Conference on Computer Communications and Networks (ICCCN 2010) will be held in ETH Zurich, Switzerland in August, 2010 (http://icccn.org/icccn10/). This proposal requests $15,000 in funding to assist 10-15 United States-based graduate students to attend ICCCN 2010.     Intellectual Merit  ICCCN is one of the leading international conferences for presenting novel ideas and fundamental advances in the fields of computer communications and networks. ICCCN serves to foster communication among researchers and practitioners with a common interest in improving communications and networking through scientific and technological innovation. Technical co-sponsorship is provided by the IEEE Communications Society. In 2009, the number of submissions in response to the CFP was over 400; only 104 regular papers were selected by the Technical Program Committee for presentation at the conference. In 2009, the conference program includes 11 technical tracks, a number of keynote and distinguished speakers and panels. Besides, there are 7 workshops on cutting edge topics. ICCCN 2010 will include similar technical tracks and workshops and continue the tradition of presenting the Best Paper Award.     Broader Impact  Participation in conferences such as IEEE ICCCN is an extremely important part of the graduate students? research and career development, providing the opportunity for them to present their own work, attend panel and keynote speech sessions, interact with peers and more senior researchers, and expose themselves to leading edge work in the field of computer communication and networks. The support requested in this proposal will enable more participation of the US-based graduate students who would otherwise be unable to attend ICCCN 2010.</docText>
    <division>CCF</division>
    <directorate>CSE</directorate>
    <award-instr>Standard Grant</award-instr>
    <programreferencecode>HPCC</programreferencecode>
    <state>MA</state>
    <keyword>network</keyword>
    <programreferencecode>9218</programreferencecode>
    <fieldofapplication>0000912 Computer Science</fieldofapplication>
    <keyword>networking</keyword>
    <amount>15000</amount>
    <progmgr>Eun K. Park</progmgr>
    <organization>University of Massachusetts Lowell</organization>
    <program>NETWORK CODING AND INFO THEORY</program>
    <programelementcode>7937</programelementcode>
    <pi>Luo, Yan</pi>
  </document>
  <document>
    <docID>0952273</docID>
    <docDate>September 1, 2009</docDate>
    <docSource></docSource>
    <docText>EAGER: CA-RAM: Enabling Fast and Versatile Packet Processing for Future Large-Scale Networks

   This exploratory research addresses the increasingly more critical performance, power, and functional requirements of search operations in key inter-networking devices like routers and firewalls. This project will investigate a specialized yet flexible search substrate called CA-RAM (Content Addressable Random Access Memory) that possesses great promise for high search performance at low power consumption. CA-RAM is based on the hashing theory and techniques. By decoupling dense memory array from compute components, CA-RAM achieves high storage density and configurability. This project will focus on how CA-RAM can effectively tackle all major packet processing applications, including packet forwarding, packet filtering, and deep packet inspection, in a scalable and complexity-effective manner. The project will also look at how new emerging memory and chip integration technologies can be used in CA-RAM to further demonstrate the effectiveness of the proposed approach.     Intellectual Merit: This research has the potential for breakthroughs in the design of future inter-networking devices. The expected contributions include a directed exploration of the CA-RAM designs. Additionally, the researchers will gain an understanding of how the emerging 3-D chip integration and Phase-Change Memory technologies will further enhance the capabilities of CA-RAM and the packet processing devices built with CA-RAM.    Broader Impact: This research will impact the design practices of inter-networking devices, a critical and essential infrastructure for our society. This project will help sustain the historical scaling rate of the network and Internet performance. The enhanced Internet will foster new exciting applications and services in global communications, commerce and entertainment, as well as cultural and technical advances. The researchers will document the approaches and findings in detail, and publish them in a timely manner.</docText>
    <division>CCF</division>
    <directorate>CSE</directorate>
    <award-instr>Standard Grant</award-instr>
    <programreferencecode>HPCC</programreferencecode>
    <keyword>network</keyword>
    <programreferencecode>9218</programreferencecode>
    <fieldofapplication>0000912 Computer Science</fieldofapplication>
    <state>PA</state>
    <keyword>networking</keyword>
    <progmgr>Eun K. Park</progmgr>
    <organization>University of Pittsburgh</organization>
    <amount>150000</amount>
    <program>NETWORK CODING AND INFO THEORY</program>
    <programelementcode>7937</programelementcode>
    <program>COMPUTER ARCHITECTURE</program>
    <programelementcode>7941</programelementcode>
    <pi>Cho, Sangyeun</pi>
    <programreferencecode>7916</programreferencecode>
  </document>
  <document>
    <docID>0950678</docID>
    <docDate>August 15, 2009</docDate>
    <docSource></docSource>
    <docText>EAGER:  Towards the Model Checking of the Partitioned Global Address Space (PGAS) Applications

   The requested amount of the revised budget is equal to $95,725.00 and the difference with the original budget will be covered by the cost share of $10,206.00 that Michigan Tech will provide. The total budget includes two months of summer salary for Dr. Ebnenasir and 18 months of graduate student support spanned over 12 months. One graduate student who has been involved in the preliminary investigations of this project during past 4 months will be supported by this project for the entire 12 months. Another PhD student -- who will participate in Task 3 -- will be supported for the final 6 months of the project.</docText>
    <division>CCF</division>
    <directorate>CSE</directorate>
    <award-instr>Standard Grant</award-instr>
    <programreferencecode>HPCC</programreferencecode>
    <state>MI</state>
    <programreferencecode>9218</programreferencecode>
    <fieldofapplication>0000912 Computer Science</fieldofapplication>
    <organization>Michigan Technological University</organization>
    <progmgr>Lenore M. Mullin</progmgr>
    <program>NUM, SYMBOL, &amp; ALGEBRA COMPUT</program>
    <programelementcode>7933</programelementcode>
    <programreferencecode>7916</programreferencecode>
    <pi>Ebnenasir, Ali</pi>
    <copi>Steven Seidel</copi>
    <amount>106652</amount>
  </document>
  <document>
    <docID>0950373</docID>
    <docDate>September 1, 2009</docDate>
    <docSource></docSource>
    <docText>Measuring the Security Posture of Large Financial Enterprises: An EAGER Proposal to NSF CCF

   To develop computer security as a science and engineering discipline, metrics need to be defined to evaluate the safety and security of alternative system designs. Security policies are often specified by large organizations but there are no direct means to evaluate how well these policies are followed by human users. The proposed project explores fundamental means of measuring the security posture of large enterprises. Risk management and risk mitigation requires measurement to assess alternative outcomes in any decision process. The project is intended to devise metrics and measurement methods, and test and evaluate these in a real institution, to evaluate how human users behave in a security context. Financial institutions in particular require significant controls over the handling of confidential financial information and employees must adhere to these policies to protect assets, which are subject to continual adversarial attack by thieves and fraudsters. Hence, financial institutions are the primary focus of the measurement work. The technical means of measuring user actions that may violate security policy is performed in a non-intrusive manner. The measurement system uses specially crafted decoy documents and email messages that signal when they have been opened or copied by a user in violation of policy. The project will develop collaborations with financial experts to devise risk models associated with users of information technology within large enterprises. This line of work extends traditional research in computer security by opening up a new area focused on the human aspect of security.</docText>
    <division>CCF</division>
    <directorate>CSE</directorate>
    <award-instr>Standard Grant</award-instr>
    <programreferencecode>HPCC</programreferencecode>
    <keyword>security</keyword>
    <programreferencecode>9218</programreferencecode>
    <state>NY</state>
    <fieldofapplication>0000912 Computer Science</fieldofapplication>
    <organization>Columbia University</organization>
    <amount>300000</amount>
    <program>SOFTWARE ENG &amp; FORMAL METHODS</program>
    <programelementcode>7944</programelementcode>
    <progmgr>Lenore D. Zuck</progmgr>
    <programreferencecode>7916</programreferencecode>
    <pi>Stolfo, Salvatore</pi>
  </document>
  <document>
    <docID>0950350</docID>
    <docDate>September 1, 2009</docDate>
    <docSource></docSource>
    <docText>Funding for Graduate Student Travel to International Conference on Image Processing 2009, November 7-11, 2009

   Abstract    This project provides travel funds to fifteen graduate students attending US institutions who have authored accepted papers at ICIP 2009. Awardees will receive $1,000 each to help defray their travel expenses.  The 2009 IEEE International Conference on Image Processing (ICIP) will take place in Cairo, Egypt, from November 7 to 11, 2009.   The conference is sponsored by the IEEE Signal Processing Society and is the premier forum for the presentation of technological advances and research results in the fields of theoretical, experimental, and applied image and video processing. ICIP 2009, the sixteenth in the series that has been held annually since 1994, will bring together leading engineers and scientists in image processing from around the world. Research frontiers in fields ranging from traditional image processing applications to evolving multimedia and video technologies are regularly advanced by results first reported in ICIP technical sessions.   The project will lead to enhancements in all fields of image and video processing by enabling a number of young and promising researchers to participate in the discussion and presentation of the latest advances and in theoretical, experimental, and applied image and video processing. Recipients of the travel awards will be selected using the following criteria:  (i) Full-time enrollment in a higher education US institution, (ii) Accepted paper of superior quality as evidenced by the reviews that the submission of the applicant received during the review process, and (iii) Letters of recommendation from academic advisors  commenting about their overall achievements.  No student of any of the selection committee members will receive a travel grant to attend ICIP 2009.</docText>
    <division>CCF</division>
    <directorate>CSE</directorate>
    <award-instr>Standard Grant</award-instr>
    <programreferencecode>HPCC</programreferencecode>
    <organization>University of Minnesota-Twin Cities</organization>
    <state>MN</state>
    <programreferencecode>9218</programreferencecode>
    <progmgr>John Cozzens</progmgr>
    <fieldofapplication>0000912 Computer Science</fieldofapplication>
    <amount>15000</amount>
    <keyword>multimedia</keyword>
    <keyword>education</keyword>
    <pi>Tewfik, Ahmed</pi>
    <program>WIRELESS COMM &amp; SIGNAL PROCESS</program>
    <programelementcode>7939</programelementcode>
  </document>
  <document>
    <docID>0950342</docID>
    <docDate>September 1, 2009</docDate>
    <docSource></docSource>
    <docText>EAGER: Tackling Vulnerabilities in Cognitive Radio Networks:  A Game Theoretic Approach

   Cognitive radio networks (CRNs) operate on secondary spectrum bands, where they opportunistically access and use under-utilized spectrum bands. Though research on CRNs is gaining momentum, there is still little or no understanding of how these networks will fair in the face of attacks. Moreover, the addition of new architectures and protocols bring more vulnerabilities that have not been seen before.    This project will make use of game theoretic techniques to develop pragmatic design methodologies that will lead to more efficient algorithms and protocols for tackling vulnerabilities in cognitive radio networks while maintaining high spectrum usage. The intellectual merit of this project lies in the execution of four tasks. These are 1) devising and solving malicious node detection games where malicious nodes(s) will be detected and isolated by regular nodes, 2) devising mechanisms that will enforce cooperation among cognitive radio nodes such that they use the commonly available spectrum in a co-operative manner, 3) developing rules and policies such that nodes belonging to different networks can co-exist, and 4) studying the performance trade-offs on service guarantees when policies are set in a dynamic manner.    Broader impact of this project will include the dissemination of the research results by means of conference and journal publications. Minority and women students will be recruited as research assistants to assist the PI in his efforts. The PI will not only educate the students at UCF about the vulnerabilities in CRNs but will also help the academic and industrial efforts bring the cognitive radio technology to the market place.</docText>
    <keyword>algorithms</keyword>
    <division>CCF</division>
    <directorate>CSE</directorate>
    <award-instr>Standard Grant</award-instr>
    <programreferencecode>HPCC</programreferencecode>
    <programreferencecode>9218</programreferencecode>
    <fieldofapplication>0000912 Computer Science</fieldofapplication>
    <state>FL</state>
    <amount>100000</amount>
    <progmgr>Dmitry Maslov</progmgr>
    <organization>University of Central Florida</organization>
    <program>NETWORK CODING AND INFO THEORY</program>
    <programelementcode>7937</programelementcode>
    <programreferencecode>7916</programreferencecode>
    <pi>Chatterjee, Mainak</pi>
  </document>
  <document>
    <docID>0949178</docID>
    <docDate>January 1, 2010</docDate>
    <docSource></docSource>
    <docText>Indo-US Workshop on Parallelism and the Future of High-Performance Computing

   This proposal seeks NSF support for a Indo-U.S. Workshop on Parallelism and the  Future of High-Performance Computing that will take place on January 7 and 8, 2010, just before the PPoPP and HPCA Symposia, in Bangalore. Funds are requested to partially cover travel expenses for up to 20 senior US-based researchers and 20 students. In addition to the proposed US participants the workshop attendees will include prominent Indian researchers listed in the proposal. Most of the U.S. workshop team members will be invited speakers and panelists.    The objective of this workshop is to initiate interactions between Indian students, senior researchers, and developers and their US counterparts in the area of parallel programming and computing in order to improve mutual understanding and create opportunities for collaborations. The proposed workshop is expected to result in innovative research directions, due to the participation of the experts in the field. Research ideas resulting from the discussions can have far reaching impact in the way HPC systems are used worldwide.  In the future, international collaborations might produce joint research proposal(s) to funding agencies in India and/or the U.S.</docText>
    <division>CCF</division>
    <directorate>CSE</directorate>
    <award-instr>Standard Grant</award-instr>
    <programreferencecode>HPCC</programreferencecode>
    <programreferencecode>9218</programreferencecode>
    <progmgr>Almadena Y. Chtchelkanova</progmgr>
    <fieldofapplication>0000912 Computer Science</fieldofapplication>
    <organization>University of Illinois at Urbana-Champaign</organization>
    <state>IL</state>
    <pi>Padua, David</pi>
    <keyword>high-performance computing</keyword>
    <amount>90000</amount>
    <program>HIGH-PERFORMANCE COMPUTING</program>
    <programelementcode>7942</programelementcode>
    <program>STRATEGIC TECHNOLOGIES FOR CI</program>
    <programelementcode>7684</programelementcode>
  </document>
  <document>
    <docID>0948907</docID>
    <docDate>September 1, 2009</docDate>
    <docSource></docSource>
    <docText>ProTOMAC: Proactive Transmit Opportunity Detection at the MAC Layer for Cognitive Radio Networks

         The wide proliferation of wireless services and applications with increasing bandwidth needs is rapidly creating a spectrum shortage.  However, the problem is caused primarily by inefficient legacy spectrum allocation and utilization policies, so that even when some applications suffer from lack of bandwidth, there is idle capacity in the band they are using or other bands. This project develops and demonstrates a revolutionary approach for addressing spectrum scarcity and unlocking hidden communication capacity thereby increasing the reach and utility of wireless connectivity. The non-traditional communication technique studied in this research effort detects transmission opportunities that occur when incumbent primary users enjoy signal to noise ratio values that are higher than the minimum value required to maintain their quality of service. It then judicially exploits these opportunities while preserving the current quality of service of the primary users.      The project develops novel change detection methods that fuse goodness of fit tests and density estimation and similarity assessment using information theoretic methods to study network traffic and designs innovative distributed goodness of fit tests and density estimation and similarity assessment techniques implemented over an asynchronous communications network. It compares the performance of the distributed goodness of fit tests and density estimation and similarity assessment techniques with those of a new class of distributed cumulative sum (cumsum) change detection methods that it constructs generalizing cumsum methods that have been proposed in the literature in other application domains. Finally, it demonstrates experimentally the benefit of using these approaches to unlock hitherto hidden communication capacity and quantify the increase in local communication capacity created by using the new schemes.</docText>
    <division>CCF</division>
    <directorate>CSE</directorate>
    <award-instr>Standard Grant</award-instr>
    <programreferencecode>HPCC</programreferencecode>
    <organization>University of Minnesota-Twin Cities</organization>
    <state>MN</state>
    <keyword>network</keyword>
    <keyword>wireless</keyword>
    <programreferencecode>9218</programreferencecode>
    <progmgr>John Cozzens</progmgr>
    <fieldofapplication>0000912 Computer Science</fieldofapplication>
    <amount>300000</amount>
    <program>SIGNAL PROCESSING</program>
    <programelementcode>7936</programelementcode>
    <pi>Tewfik, Ahmed</pi>
    <programreferencecode>7916</programreferencecode>
  </document>
  <document>
    <docID>0948699</docID>
    <docDate>September 1, 2009</docDate>
    <docSource></docSource>
    <docText>Workshop:  Cryptography in the Clouds

   A fast growing worldwide trend is to view computation as a commodity: Instead of maintaining their own computer systems, organizations or individuals may pay specialized providers to carry out the desired computation for them. This trend (often called "Cloud Computing") carries with it great promise in terms of overall computing efficiency, power consumption, and financial flexibility. However, it also opens the door to much more acute security threats than those we have encountered so far: Without additional protection, the client must completely trust the provider to perform the computation correctly, and at the same time keep the secrecy of the clients' most sensitive private data.     Allowing the client to benefit from this service without putting such an unreasonable amount of trust in the provider turns out to be an extremely complex and delicate task. In particular, traditional cryptographic techniques and concepts are of no help here. Indeed, the cryptographic community is recently abuzz with a set of new techniques that are aimed at dealing with such adversarial scenarios. These include exciting new techniques for:     - Computation on encrypted data (often called "fully homomorphic encryption")  - Verifiable Delegated Computation  - Program Obfuscation  - Leakage-Resilient Cryptography  - Circular Encryption  - Searchable and Conditionally Decryptable Encryption    The workshop will bring together researchers that work on different aspects of this problem, allowing for exchange of ideas and coming up with new research directions.</docText>
    <division>CCF</division>
    <directorate>CSE</directorate>
    <award-instr>Standard Grant</award-instr>
    <programreferencecode>HPCC</programreferencecode>
    <organization>Massachusetts Institute of Technology</organization>
    <state>MA</state>
    <keyword>security</keyword>
    <programreferencecode>9218</programreferencecode>
    <fieldofapplication>0000912 Computer Science</fieldofapplication>
    <progmgr>Richard Beigel</progmgr>
    <program>INFORMATION TECHNOLOGY RESEARC</program>
    <programelementcode>1640</programelementcode>
    <keyword>cryptography</keyword>
    <pi>Goldwasser, Shafrira</pi>
    <program>TRUSTWORTHY COMPUTING</program>
    <programelementcode>7795</programelementcode>
    <amount>30053</amount>
  </document>
  <document>
    <docID>0947952</docID>
    <docDate>December 1, 2009</docDate>
    <docSource></docSource>
    <docText>Travel Support for the 42nd International Symposium on Microarchitecture

   This proposal seeks travel support funding for the 42nd International Symposium on Microarchitecture (MICRO-42), a top-tier conference on microprocessor related research, to allow 34 awards (at  least $300 per student).     The requested funds are to be solely used to provide travel support for graduates students to defray the costs of attending and participating in MICRO-42. The priority will be given to those students who will present their research at MICRO-42 or its joint workshops. To broaden the participation, the PI plans to strongly encourage women and members of other under-represented groups to apply for the travel grant.</docText>
    <division>CCF</division>
    <directorate>CSE</directorate>
    <award-instr>Standard Grant</award-instr>
    <programreferencecode>HPCC</programreferencecode>
    <state>NJ</state>
    <programreferencecode>9218</programreferencecode>
    <progmgr>Almadena Y. Chtchelkanova</progmgr>
    <fieldofapplication>0000912 Computer Science</fieldofapplication>
    <amount>15000</amount>
    <organization>Princeton University</organization>
    <pi>Martonosi, Margaret</pi>
    <program>COMPUTER ARCHITECTURE</program>
    <programelementcode>7941</programelementcode>
  </document>
  <document>
    <docID>0947670</docID>
    <docDate>August 1, 2009</docDate>
    <docSource></docSource>
    <docText>EAGER: Algorithmic aspects of molecular circuits and molecular machines

   Project Summary  Proposal #: 0947670  PI: Ashish Goel    We are used to thinking of DNA as a biological molecule. However, DNA, its cousin the RNA, and other associated molecules such as enzymes, are also engineering building blocks. Think of them as ?combinatorial Legos? which fit together and inter-operate not just by mechanics and geometry but also using the chemical sequence imprinted on them. This has many revolutionary potential applications. This also poses many mathematical and algorithmic questions which are both interesting in their own right and also provide a framework to devise useful experimental techniques. The PI proposes to conduct research in the emerging field of ?molecular algorithms?, i.e., algorithms which are meant to be implemented on molecules. This study will proceed in two broad directions: molecular machines and molecular circuits. The two areas are linked both thematically and in terms of techniques. We will constantly consult with practitioners in this field, so that the results of this research are both novel and useful.    Intellectual merit: Molecular algorithms require tools and techniques that are considerably different from traditional algorithms. We can not assume building blocks such as memories, actuators, sensors, transistors, processors etc; rather, these are often the things we are trying to devise using more basic primitives such as DNA hybridization, enzymatic reactions, and migration. Consequently, advances in molecular algorithms are likely to require novel mathematical techniques that will enrich the disciplines of coding theory, combinatorial algorithms, and probabilistic analysis.    Broad impact: Molecular machines have been proposed as sensors, actuators, and drug delivery mechanisms. Molecular circuits have the potential to finely control other molecular processes. Much of the hard work in developing these ideas is being done by experimentalists. However, theoretical tools such as the one we propose to develop also have an important role to play in realizing the full potential of this area and in deciding upon the most promising experimental directions. In addition, molecular algorithms could facilitate sophisticated tasks such as counting, shape recognition, precisely controlled crystal growth etc. at nano-scales.    The PI has developed a class in molecular algorithms which he will update and teach bi-annually. Also, many graduate students will receive valuable research experience in this important area.</docText>
    <keyword>algorithms</keyword>
    <division>CCF</division>
    <directorate>CSE</directorate>
    <award-instr>Standard Grant</award-instr>
    <programreferencecode>HPCC</programreferencecode>
    <programreferencecode>9218</programreferencecode>
    <state>CA</state>
    <fieldofapplication>0000912 Computer Science</fieldofapplication>
    <progmgr>Mitra Basu</progmgr>
    <organization>Stanford University</organization>
    <amount>200000</amount>
    <pi>Goel, Ashish</pi>
    <program>COMPUTATIONAL BIOLOGY</program>
    <programelementcode>7931</programelementcode>
    <programreferencecode>7916</programreferencecode>
  </document>
  <document>
    <docID>0947262</docID>
    <docDate>August 1, 2009</docDate>
    <docSource></docSource>
    <docText>Exponential Complexity of NP-complete Problems

   This project supports research by Paturi, his graduate students and collaborators on foundational questions about the exact complexity of NP-complete problems The core questions addressed concern the difficulty of exhaustive search, and to what extent an exhaustive search may be pruned to improve its effectiveness. The project will study the complexity of algorithms, especially for the fundamental problem of satisfiability, but also for other NP-complete problems such as the traveling salesman problem and k-colorability. The PI and his students will study probabilistic search algorithms that succeed with exponentially small  probability.  They will study self-reducibility among instances of the circuit satisfiability problem as well as the fundamental question of trade-off between time and probability for NP-complete problems.    Research on exact exponential-time algorithms for NP-complete problems not only has the potential to improve our understanding of fundamental limitations of feasible computability, but may possibly lead directly to new algorithms for satisfiability and other combinatorial optimization problems. The project will support graduate student education and research in computer science, especially in algorithms and complexity theory. The PI engages in teaching at the undergraduate and graduate level in computer science that will benefit from his research activities supported by the project.</docText>
    <keyword>algorithms</keyword>
    <division>CCF</division>
    <directorate>CSE</directorate>
    <award-instr>Standard Grant</award-instr>
    <programreferencecode>HPCC</programreferencecode>
    <programreferencecode>9218</programreferencecode>
    <state>CA</state>
    <fieldofapplication>0000912 Computer Science</fieldofapplication>
    <progmgr>Richard Beigel</progmgr>
    <organization>University of California-San Diego</organization>
    <amount>200000</amount>
    <keyword>education</keyword>
    <program>COMPLEXITY &amp; CRYPTOGRAPHY</program>
    <programelementcode>7927</programelementcode>
    <pi>Paturi, Ramamohan</pi>
    <programreferencecode>7916</programreferencecode>
  </document>
  <document>
    <docID>0946718</docID>
    <docDate>September 1, 2009</docDate>
    <docSource></docSource>
    <docText>Workshop Proposal:   Research Issues at the Interface of Computer Science and Economics

   This workshop will provide leading figures in computer science and economics a chance to explore and further develop emerging research opportunities at the interface of the two disciplines.  There is strong interest in both communities in pursuing a joint research agenda.  The workshop will explore a range of issues where there is opportunity for research interaction.  These include models of learning by computational agents in economic settings; research on the role of complex networks in economic systems; the welfare properties and stability of equilibria; the computational tractability of basic economic problems and the design of computationally feasible mechanisms; and the role of information, trust, and reputation in markets. The workshop will be structured to facilitate discussions among people working in different disciplines, who may have different perspectives that can be usefully synthesized in approaching these problems. The workshop will help frame the preparation of a subsequent report articulating significant research directions and applications.    The topics covered by the workshop have the potential to inform design and policy questions on topics of fundamental societal importance. One fundamental application will be to problems of trust, risk, and contagion in financial markets, offering insights into the interconnectedness and fragility of large financial systems. Other fundamental applications will be to problems in emerging online markets; to systems supporting innovation and knowledge creation, including social, economic, and technological aspects; and to markets in the developing world.</docText>
    <division>CCF</division>
    <directorate>CSE</directorate>
    <award-instr>Standard Grant</award-instr>
    <programreferencecode>HPCC</programreferencecode>
    <programreferencecode>9218</programreferencecode>
    <state>NY</state>
    <fieldofapplication>0000912 Computer Science</fieldofapplication>
    <organization>Cornell University</organization>
    <progmgr>Tracy J. Kimbrel</progmgr>
    <amount>50000</amount>
    <program>COMPUT GAME THEORY &amp; ECON</program>
    <programelementcode>7932</programelementcode>
    <copi>Lawrence Blume</copi>
    <copi>David Easley</copi>
    <program>ECONOMICS</program>
    <pi>Kleinberg, Jon</pi>
    <copi>Eva Tardos</copi>
    <programelementcode>1320</programelementcode>
  </document>
  <document>
    <docID>0946601</docID>
    <docDate>August 1, 2009</docDate>
    <docSource></docSource>
    <docText>EAGER: Synthesizing Signal Processing Functions with Biochemical Reactions

         This proposal addresses the synthesis of computations and signal processing operations in a novel context: protein-protein biochemistry where the inputs and outputs are quantities of different types of proteins.  The project will demonstrate that biochemistry can implement simple and powerful digital signal processing (DSP) operations.  Constructs like and decision feedback equalizers will be implemented: given input quantities of proteins, the system performs a decision to deliver a drug or not,  adaptively and autonomously. Also band-pass filtering will be implemented: the quantity of output protein is a highly-tuned function of the frequency of the changes in the quantities of input proteins.  Other DSP functions such as FFTs will be implemented. The design of such DSP functions will be investigated in an abstract framework, as a proof of concept. (At this time, the research will not attempt to address the experimental application of these ideas in vitro or in vivo).        Techniques for analyzing the dynamics of biological systems are well established.  However, synthesizing computation with such mechanisms requires new techniques ? and an entirely new mindset.  Success in this endeavor will open numerous opportunities in fields such as biochemical sensing and drug delivery.  An important goal of the project is to communicate the goals and the impetus for interdisciplinary research to a wide audience.  A new graduate-level course will be developed, titled "Circuits, Computation, and Biology" offered jointly through the ECE Department and the new Biomedical Informatics and Computational Biology Program at the University of Minnesota.</docText>
    <division>CCF</division>
    <directorate>CSE</directorate>
    <award-instr>Standard Grant</award-instr>
    <programreferencecode>HPCC</programreferencecode>
    <organization>University of Minnesota-Twin Cities</organization>
    <state>MN</state>
    <programreferencecode>9218</programreferencecode>
    <fieldofapplication>0000912 Computer Science</fieldofapplication>
    <keyword>computational biology</keyword>
    <progmgr>Sankar Basu</progmgr>
    <amount>200000</amount>
    <pi>Parhi, Keshab</pi>
    <program>DES AUTO FOR MICRO &amp; NANO SYST</program>
    <programelementcode>7945</programelementcode>
    <programreferencecode>7916</programreferencecode>
    <copi>Marc Riedel</copi>
  </document>
  <document>
    <docID>0946375</docID>
    <docDate>September 1, 2009</docDate>
    <docSource></docSource>
    <docText>Workshop:  Intelligent Software:  The Interface Between Algorithms and Machines

   We propose to arrange US participation in the workshop entitled "Intelligent Software: The Interface Between Algorithms and Machines", to be held on October 19-21, 2009 at the University of Edinburgh, hosted by the Centre for Numerical Algorithms and Intelligent Software (NAIS)[1], that will support research in the efficient application of algorithms to next generation computer architectures. The goal of this workshop is to bring together leading US and European researchers at the interface between computational science, applied mathematics, and computer science to discuss algorithms pervasive in the scientific applications community, and their implementation and deployment for evolving target architectures. By bringing together researchers working together across this divide, a scheme will be suggested with the goal of advancing computational science infrastructure so that it can live up to its full potential.</docText>
    <keyword>algorithms</keyword>
    <division>CCF</division>
    <directorate>CSE</directorate>
    <award-instr>Standard Grant</award-instr>
    <programreferencecode>HPCC</programreferencecode>
    <state>MA</state>
    <programreferencecode>9218</programreferencecode>
    <fieldofapplication>0000912 Computer Science</fieldofapplication>
    <keyword>computational science</keyword>
    <organization>Trustees of Boston University</organization>
    <progmgr>Lenore M. Mullin</progmgr>
    <program>NUM, SYMBOL, &amp; ALGEBRA COMPUT</program>
    <programelementcode>7933</programelementcode>
    <pi>Brower, Richard</pi>
    <copi>Claudio Rebbi</copi>
    <amount>44670</amount>
  </document>
  <document>
    <docID>0946273</docID>
    <docDate>September 1, 2009</docDate>
    <docSource></docSource>
    <docText>EAGER: Developing Theoretical Foundation for Cooperative Communications with Network Coding

   The goal of this project is to investigate the impact of network coding on cooperative communications and to lay a theoretical foundation in this new and growing field. In their preliminary results, the PIs found that the use of analog network coding will inevitably introduce new noise during signal extraction at a destination node. Such new noise will directly affect capacity calculation and result in smaller capacity in cooperative communications. That is, the use of network coding may not always benefit cooperative communications, which is against some researchers? belief. Enlightened by this result, the PIs plan to systematically investigate the impact of network coding on cooperative communications in a general multi-session environment.  The intellectual merit includes exploring and understanding various approaches in signal extraction and the potential noise introduced during the signal extraction process. Based on this new knowledge, the PIs also plan to re-visit a number of important problems that employ network coding in cooperative communications and offer new and correct understanding.  Such understanding will not only offer a solid foundation for further research, but also has transformative potential to bring the existing network coding and cooperative communications theories one step closer to practice.  The broader impact of this project includes the development of cross-disciplinary educational materials and courses.  Throughout the PIs? experience with wireless networking research, they have found that advance materials in wireless communications are beyond the typical education for students in networking. An integral part of this project will be to bridge the gap between networking and wireless communications curricula via new cross-disciplinary courses.</docText>
    <division>CCF</division>
    <directorate>CSE</directorate>
    <award-instr>Standard Grant</award-instr>
    <programreferencecode>HPCC</programreferencecode>
    <keyword>network</keyword>
    <keyword>wireless</keyword>
    <programreferencecode>9218</programreferencecode>
    <fieldofapplication>0000912 Computer Science</fieldofapplication>
    <state>VA</state>
    <keyword>networking</keyword>
    <keyword>education</keyword>
    <progmgr>William H Tranter</progmgr>
    <organization>Virginia Polytechnic Institute and State University</organization>
    <amount>150000</amount>
    <program>NETWORK CODING AND INFO THEORY</program>
    <programelementcode>7937</programelementcode>
    <programreferencecode>7916</programreferencecode>
    <pi>Hou, Thomas</pi>
    <copi>Yi Shi</copi>
  </document>
  <document>
    <docID>0945245</docID>
    <docDate>June 10, 2009</docDate>
    <docSource></docSource>
    <docText>TF-SING: Energy-Efficient Design in Wireless Networks Using Cooperative Communication

   This research involves one of the key challenges in wireless networks: how   to take advantage of new advances at the physical layer to push for new   design at the upper layers. The approach used is hitchhiking-based cooperative   communication (CC) that takes advantage of the physical layer design that   facilitates the combining of partial information. A node can receive several   partial signals and combine these signals to retrieve the complete signal.   Through effective use of partial signals, a packet can be delivered with fewer   nodes and/or less transmission power at each node. The investigator proposes   a new weighted graph model that can capture the nature of CC. One key concept   proposed is the new notion of  ?link? and ?path? on which other graph   terminologies can be defined.    Based on this new graph model, the research focuses on two types of   power-efficient design under CC: (1) Power saving protocols that put wireless   nodes into periodical sleep states while maintaining global ?domination? of   active nodes. (2) Power control for transmission energy consumption by   adjusting transmission ranges while maintaining global ?connectivity?.   With these, this research presents a promising and unique way of applying this   graph model to energy-efficient design in wireless networks. This research also   involves the design of a general methodology of localized solutions and applies   it to address various energy-related optimization problems under CC. The central   theme of this research fits well with the objective of the SING program on   fundamental theoretical and algorithmic studies involving coordination and   communication. The insights and results of this research are expected to   provide guidelines for energy-efficiency for a wide range of wireless network   applications.</docText>
    <division>CCF</division>
    <directorate>CSE</directorate>
    <award-instr>Standard Grant</award-instr>
    <programreferencecode>HPCC</programreferencecode>
    <keyword>network</keyword>
    <keyword>wireless</keyword>
    <programreferencecode>9218</programreferencecode>
    <fieldofapplication>0000912 Computer Science</fieldofapplication>
    <organization>Temple University</organization>
    <state>PA</state>
    <program>INFORMATION TECHNOLOGY RESEARC</program>
    <programelementcode>1640</programelementcode>
    <program>THEORETICAL FOUNDATIONS (TF)</program>
    <programelementcode>7351</programelementcode>
    <progmgr>William H Tranter</progmgr>
    <pi>Wu, Jie</pi>
    <amount>260001</amount>
  </document>
  <document>
    <docID>0944044</docID>
    <docDate>August 15, 2009</docDate>
    <docSource></docSource>
    <docText>Parallel Architectures and Compilation Techniques (PACT) 2009 Student Travel Scholarships

   The eighteenth international conference on parallel architectures and compilation techniques (PACT) will be held in Raleigh, North Carolina, September 12-16, 2009. PACT is a multi-disciplinary conference that brings together researchers from hardware and software areas to present ground-breaking research in parallel systems ranging across instruction-level parallelism, thread-level parallelism, multiprocessor parallelism and large scale systems.  This award is to make travel scholarships available to students and universities not typically represented at PACT in order to improve the impact and outreachof this conference.</docText>
    <division>CCF</division>
    <directorate>CSE</directorate>
    <award-instr>Standard Grant</award-instr>
    <programreferencecode>HPCC</programreferencecode>
    <keyword>parallel systems</keyword>
    <programreferencecode>9218</programreferencecode>
    <progmgr>Almadena Y. Chtchelkanova</progmgr>
    <fieldofapplication>0000912 Computer Science</fieldofapplication>
    <programreferencecode>9150</programreferencecode>
    <organization>University of New Mexico</organization>
    <state>NM</state>
    <program>HIGH-PERFORMANCE COMPUTING</program>
    <programelementcode>7942</programelementcode>
    <pi>Arnold, Dorian</pi>
    <amount>10500</amount>
  </document>
  <document>
    <docID>0943726</docID>
    <docDate>August 15, 2009</docDate>
    <docSource></docSource>
    <docText>Travel Support for the Symposium on  Architectures for Networking and Communications Systems

   The second ACM/IEEE Symposium on Architectures for Networking and Communications Systems (ANCS) will be held in Princeton, N.J. on Oct. 19-20, 2009. The ANCS conference has been created to provide a top-tier venue to bring together researchers from the areas of computer systems architecture and networking systems, in order to foster greater collaboration between these increasingly related research areas. The PIs plan to  provide travel support to ANCS for up to 20 US-based students.</docText>
    <division>CCF</division>
    <directorate>CSE</directorate>
    <award-instr>Standard Grant</award-instr>
    <programreferencecode>HPCC</programreferencecode>
    <keyword>architecture</keyword>
    <programreferencecode>9218</programreferencecode>
    <progmgr>Almadena Y. Chtchelkanova</progmgr>
    <fieldofapplication>0000912 Computer Science</fieldofapplication>
    <keyword>networking</keyword>
    <state>MO</state>
    <organization>Washington University</organization>
    <amount>12000</amount>
    <pi>Franklin, Mark</pi>
    <program>COMPUTER ARCHITECTURE</program>
    <programelementcode>7941</programelementcode>
  </document>
  <document>
    <docID>0943479</docID>
    <docDate>September 1, 2009</docDate>
    <docSource></docSource>
    <docText>Collaborative Research:  EAGER:  Novel Theoretical Foundation for Wireless Positioning in Challenging Environments

   Positioning techniques for mobile devices play critical roles in many societal, industrial, and military activities. In current Global Positioning System (GPS), the triangulation and/or trilateration calculation approach dominates, where a system of four or more quadratic equations must be solved, obtained from four or more satellite signals. However, this system does not work in challenging environments such as downtown areas where satellite signals are blocked by skyscrapers.     This work is to develop, analyze and evaluate computational methods that can improve the current GPS in terms of positioning accuracy and time efficiency. The proposed linearization approach in this project is unique in that it provides a closed form solution for quadratic equations in the calculation unit of GPS. The sensitivity analysis is derived to identify positioning error sources. The performance of GPS can then be significantly improved. Additionally, since the vulnerabilities in the positioning procedure are identified, this work is also a useful tool for solving security/privacy related issues. This work is applicable to other wireless environments and can be incorporated with other wireless techniques, such as WiFi and wireless sensor networks (WSNs). Preliminary simulation results show that the performance of the proposed calculation method increases by 30% in terms of accuracy and 50% in terms of execution time complexity.     The fundamental framework and robust positioning techniques developed from this project will have broad impacts on high-tech industries. The transformative research will lead to the development and deployment of a new generation of practical positioning systems that can work effectively and efficiently in various challenging environments. The impact of this project also extends to academia and education through publications and dedicated websites.</docText>
    <division>CCF</division>
    <directorate>CSE</directorate>
    <award-instr>Standard Grant</award-instr>
    <programreferencecode>HPCC</programreferencecode>
    <state>MA</state>
    <keyword>security</keyword>
    <keyword>wireless</keyword>
    <programreferencecode>9218</programreferencecode>
    <fieldofapplication>0000912 Computer Science</fieldofapplication>
    <keyword>simulation</keyword>
    <keyword>education</keyword>
    <progmgr>William H Tranter</progmgr>
    <keyword>privacy</keyword>
    <amount>75000</amount>
    <organization>University of Massachusetts Lowell</organization>
    <program>NETWORK CODING AND INFO THEORY</program>
    <programelementcode>7937</programelementcode>
    <programreferencecode>7916</programreferencecode>
    <pi>Fu, Xinwen</pi>
  </document>
  <document>
    <docID>0943455</docID>
    <docDate>September 15, 2009</docDate>
    <docSource></docSource>
    <docText>Supercomputing on a Cluster of Workstations via Scalable Locality and Scalable Parallelism

   Modern scientific research often includes a substantial computational component, which may use a supercomputer and special software to automatically tune ("optimize") the application for the computer. A cluster of standard workstations can offer similar net processing power at a fraction of the cost, but automatic optimization of some important numerical applications for these systems remains an elusive challenge.  The quest for good performance of parallel applications on clusters of workstations has traditionally employed software techniques that are quite different from those applied to the programming of parallel supercomputers. In particular, static automatic parallelization has been employed on supercomputers (especially for dense matrix codes on shared memory systems) but has not been successful on clusters. The lack of success with static parallelization is due in part to the inability of classic parallelization techniques to expose sufficient memory locality.    The PI proposes to develop compiler techniques that will allow dense matrix problems to run efficiently on clusters of workstations by dramatically increasing locality while respecting the parallelism constraints of the code. The PI plans to  investigate techniques for automatically producing high performance for dense matrix codes executing on clusters of workstations by "tiling" time-skewed loop nests such that they can execute efficiently on a cluster of multicore workstations. This research will enable automatic program optimization for numerical applications. The proposed activity could advance the state of performance models for tiling for clusters.</docText>
    <division>CCF</division>
    <directorate>CSE</directorate>
    <award-instr>Standard Grant</award-instr>
    <programreferencecode>HPCC</programreferencecode>
    <keyword>compiler</keyword>
    <programreferencecode>9218</programreferencecode>
    <progmgr>Almadena Y. Chtchelkanova</progmgr>
    <fieldofapplication>0000912 Computer Science</fieldofapplication>
    <state>PA</state>
    <program>COMPILERS</program>
    <programelementcode>7329</programelementcode>
    <programreferencecode>9229</programreferencecode>
    <organization>Haverford College</organization>
    <pi>Wonnacott, David</pi>
    <amount>123465</amount>
  </document>
  <document>
    <docID>0943452</docID>
    <docDate>September 1, 2009</docDate>
    <docSource></docSource>
    <docText>Collaborative Research:  EAGER:  Novel Theoretical Foundation for Wireless Positioning in Challenging Environments

   Positioning techniques for mobile devices play critical roles in many societal, industrial, and military activities. In current Global Positioning System (GPS), the triangulation and/or trilateration calculation approach dominates, where a system of four or more quadratic equations must be solved, obtained from four or more satellite signals. However, this system does not work in challenging environments such as downtown areas where satellite signals are blocked by skyscrapers.     This work is to develop, analyze and evaluate computational methods that can improve the current GPS in terms of positioning accuracy and time efficiency. The proposed linearization approach in this project is unique in that it provides a closed form solution for quadratic equations in the calculation unit of GPS. The sensitivity analysis is derived to identify positioning error sources. The performance of GPS can then be significantly improved. Additionally, since the vulnerabilities in the positioning procedure are identified, this work is also a useful tool for solving security/privacy related issues. This work is applicable to other wireless environments and can be incorporated with other wireless techniques, such as WiFi and wireless sensor networks (WSNs). Preliminary simulation results show that the performance of the proposed calculation method increases by 30% in terms of accuracy and 50% in terms of execution time complexity.     The fundamental framework and robust positioning techniques developed from this project will have broad impacts on high-tech industries. The transformative research will lead to the development and deployment of a new generation of practical positioning systems that can work effectively and efficiently in various challenging environments. The impact of this project also extends to academia and education through publications and dedicated websites.</docText>
    <division>CCF</division>
    <directorate>CSE</directorate>
    <award-instr>Standard Grant</award-instr>
    <programreferencecode>HPCC</programreferencecode>
    <keyword>security</keyword>
    <keyword>wireless</keyword>
    <programreferencecode>9218</programreferencecode>
    <organization>Purdue University</organization>
    <state>IN</state>
    <fieldofapplication>0000912 Computer Science</fieldofapplication>
    <keyword>simulation</keyword>
    <keyword>education</keyword>
    <progmgr>William H Tranter</progmgr>
    <keyword>privacy</keyword>
    <amount>75000</amount>
    <program>NETWORK CODING AND INFO THEORY</program>
    <programelementcode>7937</programelementcode>
    <programreferencecode>7916</programreferencecode>
    <pi>Yang, Shuhui</pi>
  </document>
  <document>
    <docID>0943386</docID>
    <docDate>September 1, 2009</docDate>
    <docSource></docSource>
    <docText>COLLABORATIVE RESEARCH:   Programming the rhizosphere through highly integrated genetic, spatio-temporal control systems

   The study of gene regulation is central to modern biology. A significant portion of the nascent field of synthetic biology has revolved around building synthetic gene networks to recapitulate regulatory mechanisms found in nature or to engineer novel biological functions. However, artificial gene networks have not approached the sophistication of their natural counterparts in either design or performance. There are several technical and scientific challenges that currently limit the engineering of large-scale integrated synthetic genetic networks. This research centers on developing a framework for automating the process of gene network design by a) obtaining various working "parts" of gene regulatory mechanisms from nature and b) by applying engineering sciences to learn how to compose them reliably into novel systems which have predictable behaviors. The value of this project will be demonstrated through the development of the ?Programmable Rhizosphere?, which is a framework for engineering mutualism between model plant and soil microbe species. The Programmable Rhizosphere will allow control of interactions between disparate organisms, and represents a significant step towards our ability to manipulate complex ecosystems.    Broader impact: This project brings together researchers from top US institutions as well as establishes a collaboration with major universities in the UK. Graduate students and postdoctoral researchers associated with this project will get an opportunity to participate in a multi-institution, multidisciplinary research project. They will have the opportunity to train on a wide variety of techniques in computational and molecular biology. The results of the project will be disseminated to the broader public including middle and high school students through the development of informational materials and hands-on demonstrations designed for educating the public on the technologies and potential impact of synthetic biology.  In addition to the advances in the understanding of engineering synthetic regulatory systems, the Programmable Rhizosphere technology has broad implications for sustainability in agriculture.  In particular, these technologies could be used to engineer beneficial phenomena such as nitrogen fixation in agricultural crops, which would displace petroleum-based fertilizers currently used in agricultural production.</docText>
    <division>CCF</division>
    <directorate>CSE</directorate>
    <award-instr>Standard Grant</award-instr>
    <programreferencecode>HPCC</programreferencecode>
    <keyword>network</keyword>
    <programreferencecode>9218</programreferencecode>
    <fieldofapplication>0000912 Computer Science</fieldofapplication>
    <organization>University of Illinois at Urbana-Champaign</organization>
    <state>IL</state>
    <progmgr>Tatsuya Suda</progmgr>
    <program>BIO COMPUTING</program>
    <programelementcode>7946</programelementcode>
    <program>OFFICE OF MULTIDISCIPLINARY AC</program>
    <programelementcode>1253</programelementcode>
    <program>SANDPIT</program>
    <program>COFFES</program>
    <program>CROSS-EF ACTIVITIES</program>
    <programelementcode>7954</programelementcode>
    <programelementcode>7552</programelementcode>
    <programelementcode>7275</programelementcode>
    <programreferencecode>7954</programreferencecode>
    <pi>Bhalerao, Kaustubh</pi>
    <amount>310054</amount>
  </document>
  <document>
    <docID>0943385</docID>
    <docDate>September 1, 2009</docDate>
    <docSource></docSource>
    <docText>COLLABORATIVE RESEARCH:  Programming the rhizosphere through highly integrated genetic, spatio-temporal control systems

   The study of gene regulation is central to modern biology. A significant portion of the nascent field of synthetic biology has revolved around building synthetic gene networks to recapitulate regulatory mechanisms found in nature or to engineer novel biological functions. However, artificial gene networks have not approached the sophistication of their natural counterparts in either design or performance. There are several technical and scientific challenges that currently limit the engineering of large-scale integrated synthetic genetic networks. This research centers on developing a framework for automating the process of gene network design by a) obtaining various working "parts" of gene regulatory mechanisms from nature and b) by applying engineering sciences to learn how to compose them reliably into novel systems which have predictable behaviors. The value of this project will be demonstrated through the development of the ?Programmable Rhizosphere?, which is a framework for engineering mutualism between model plant and soil microbe species. The Programmable Rhizosphere will allow control of interactions between disparate organisms, and represents a significant step towards our ability to manipulate complex ecosystems.    Broader impact: This project brings together researchers from top US institutions as well as establishes a collaboration with major universities in the UK. Graduate students and postdoctoral researchers associated with this project will get an opportunity to participate in a multi-institution, multidisciplinary research project. They will have the opportunity to train on a wide variety of techniques in computational and molecular biology. The results of the project will be disseminated to the broader public including middle and high school students through the development of informational materials and hands-on demonstrations designed for educating the public on the technologies and potential impact of synthetic biology.  In addition to the advances in the understanding of engineering synthetic regulatory systems, the Programmable Rhizosphere technology has broad implications for sustainability in agriculture.  In particular, these technologies could be used to engineer beneficial phenomena such as nitrogen fixation in agricultural crops, which would displace petroleum-based fertilizers currently used in agricultural production.</docText>
    <division>CCF</division>
    <directorate>CSE</directorate>
    <award-instr>Standard Grant</award-instr>
    <programreferencecode>HPCC</programreferencecode>
    <keyword>network</keyword>
    <programreferencecode>9218</programreferencecode>
    <state>CA</state>
    <fieldofapplication>0000912 Computer Science</fieldofapplication>
    <program>INFORMATION TECHNOLOGY RESEARC</program>
    <programelementcode>1640</programelementcode>
    <organization>University of California-San Francisco</organization>
    <progmgr>Tatsuya Suda</progmgr>
    <program>GENES AND GENOME SYSTEMS</program>
    <programelementcode>1112</programelementcode>
    <program>OFFICE OF MULTIDISCIPLINARY AC</program>
    <programelementcode>1253</programelementcode>
    <program>SANDPIT</program>
    <program>COFFES</program>
    <program>CROSS-EF ACTIVITIES</program>
    <programelementcode>7954</programelementcode>
    <programelementcode>7552</programelementcode>
    <programelementcode>7275</programelementcode>
    <programreferencecode>7954</programreferencecode>
    <pi>El-Samad, Hana</pi>
    <copi>Christopher Voigt</copi>
    <amount>591974</amount>
  </document>
  <document>
    <docID>0943269</docID>
    <docDate>September 1, 2009</docDate>
    <docSource></docSource>
    <docText>COLLABORATIVE RESEARCH: Programming the rhizosphere through highly integrated genetic, spatio-temporal control systems

   The study of gene regulation is central to modern biology. A significant portion of the nascent field of synthetic biology has revolved around building synthetic gene networks to recapitulate regulatory mechanisms found in nature or to engineer novel biological functions. However, artificial gene networks have not approached the sophistication of their natural counterparts in either design or performance. There are several technical and scientific challenges that currently limit the engineering of large-scale integrated synthetic genetic networks. This research centers on developing a framework for automating the process of gene network design by a) obtaining various working "parts" of gene regulatory mechanisms from nature and b) by applying engineering sciences to learn how to compose them reliably into novel systems which have predictable behaviors. The value of this project will be demonstrated through the development of the ?Programmable Rhizosphere?, which is a framework for engineering mutualism between model plant and soil microbe species. The Programmable Rhizosphere will allow control of interactions between disparate organisms, and represents a significant step towards our ability to manipulate complex ecosystems.    Broader impact: This project brings together researchers from top US institutions as well as establishes a collaboration with major universities in the UK. Graduate students and postdoctoral researchers associated with this project will get an opportunity to participate in a multi-institution, multidisciplinary research project. They will have the opportunity to train on a wide variety of techniques in computational and molecular biology. The results of the project will be disseminated to the broader public including middle and high school students through the development of informational materials and hands-on demonstrations designed for educating the public on the technologies and potential impact of synthetic biology.  In addition to the advances in the understanding of engineering synthetic regulatory systems, the Programmable Rhizosphere technology has broad implications for sustainability in agriculture.  In particular, these technologies could be used to engineer beneficial phenomena such as nitrogen fixation in agricultural crops, which would displace petroleum-based fertilizers currently used in agricultural production.</docText>
    <division>CCF</division>
    <directorate>CSE</directorate>
    <award-instr>Standard Grant</award-instr>
    <programreferencecode>HPCC</programreferencecode>
    <keyword>network</keyword>
    <programreferencecode>9218</programreferencecode>
    <state>CA</state>
    <fieldofapplication>0000912 Computer Science</fieldofapplication>
    <organization>Stanford University</organization>
    <amount>300000</amount>
    <program>COMPUTATIONAL BIOLOGY</program>
    <programelementcode>7931</programelementcode>
    <progmgr>Tatsuya Suda</progmgr>
    <program>OFFICE OF MULTIDISCIPLINARY AC</program>
    <programelementcode>1253</programelementcode>
    <program>SANDPIT</program>
    <program>COFFES</program>
    <program>CROSS-EF ACTIVITIES</program>
    <pi>Smolke, Christina</pi>
    <programelementcode>7954</programelementcode>
    <programelementcode>7552</programelementcode>
    <programelementcode>7275</programelementcode>
    <programreferencecode>7954</programreferencecode>
  </document>
  <document>
    <docID>0942936</docID>
    <docDate>July 1, 2009</docDate>
    <docSource></docSource>
    <docText>CIF: SMALL: Explorations and Insights into Adaptive Networks, Animal Flocking Behavior, and Swarm Intelligence

   Abstract         Since the early 1990s, some useful optimization algorithms have emerged from the social and biological sciences in their studies of animal flock behavior and swarm intelligence. It has been observed, for example, that while individual agents in an animal colony are not capable of complex behavior, the combined coordination among multiple agents leads to the manifestation of regular patterns of behavior. Several algorithms have been developed to model the movement of animal flocks. These investigations are proving useful in modeling and understanding complex phenomena and in developing applications in areas ranging from biology to nanotechnology. The research involves investigating interconnections between these studies on swarm intelligence in the biological and social sciences, and more recent studies on adaptive networks in system theory.          Adaptive networks consist of isotropic nodes spread over a geographic domain. The nodes sense the environment and attempt to understand a phenomenon of interest based on their noisy observations and without any node taking a central control role. The nodes cooperate with each other through local interactions and adapt their states, and the network topology, in response to data collected at the nodes and data received from their neighbors. Information arriving at a node propagates throughout the network by means of a diffusive process. The diffusion of information results in a form of collective intelligence as is evidenced by improved learning and convergence behavior relative to non-cooperative networks. A closer study of the dynamics of swarm behavior and adaptive networks can suggest alternative techniques for designing adaptive networks and for understanding flock behavior, with potential impact on the applications that can be motivated from these developments.</docText>
    <keyword>algorithms</keyword>
    <division>CCF</division>
    <directorate>CSE</directorate>
    <award-instr>Standard Grant</award-instr>
    <programreferencecode>HPCC</programreferencecode>
    <keyword>network</keyword>
    <programreferencecode>9218</programreferencecode>
    <progmgr>John Cozzens</progmgr>
    <state>CA</state>
    <fieldofapplication>0000912 Computer Science</fieldofapplication>
    <organization>University of California-Los Angeles</organization>
    <amount>300000</amount>
    <keyword>nanotechnology</keyword>
    <program>SIGNAL PROCESSING</program>
    <programelementcode>7936</programelementcode>
    <pi>Sayed, Ali</pi>
    <programreferencecode>7916</programreferencecode>
  </document>
  <document>
    <docID>0942511</docID>
    <docDate>September 1, 2009</docDate>
    <docSource></docSource>
    <docText>Eastern Great Lakes Theory of Computation Workshop

   The Eastern Great Lakes (EaGL) Theory of Computation workshop provides an opportunity for interaction among the thriving collection of theory of computation (ToC) researchers living within a few hours driving distance to Buffalo.  The community served by the workshop is large and growing: the region's colleges and universities have more than 90 ToC researchers, including at least 14 junior faculty hired since 2004, at institutions ranging from large research universities such as Carnegie Mellon to small colleges such as Oberlin.  The presence of such a large concentration of ToC researchers presents a unique opportunity to gather locally and foster new research collaborations.    The main beneficiaries of the workshop are the graduate students in the area who get an opportunity to interact with leaders in ToC in the region (including three Turing award winners and a MacArthur fellow) in a small, relaxed setting. In addition to featuring six invited speaker talks, the workshop includes shorter talks by a few students who are nearing graduation.    The award will fund the workshop for the years of 2009 and 2010.  This is expected to help it make the transition to an annual meeting.  In 2009, the EaGL Workshop will feature technical talks by the following speakers: Allan Borodin (University of Toronto), Mark Braverman (Microsoft Research), Nick Harvey (University of Waterloo), Dexter Kozen (Cornell University), Katrina Ligett (Cornell University) and Adam Smith (Pennsylvania State University).  Slides as well as video recordings from the talks will be provided freely on the workshop webpage.</docText>
    <division>CCF</division>
    <directorate>CSE</directorate>
    <award-instr>Standard Grant</award-instr>
    <programreferencecode>HPCC</programreferencecode>
    <programreferencecode>9218</programreferencecode>
    <state>NY</state>
    <fieldofapplication>0000912 Computer Science</fieldofapplication>
    <progmgr>Richard Beigel</progmgr>
    <organization>SUNY at Buffalo</organization>
    <keyword>theory of computation</keyword>
    <program>COMPLEXITY &amp; CRYPTOGRAPHY</program>
    <programelementcode>7927</programelementcode>
    <pi>Rudra, Atri</pi>
    <amount>11300</amount>
  </document>
  <document>
    <docID>0941078</docID>
    <docDate>July 15, 2009</docDate>
    <docSource></docSource>
    <docText>Real-Time Coupling of Gene Networks in Single Cells

   PI: Animesh Ray    Real-time coupling of gene networks in single cells   SUMMARY   The complex dynamics of gene regulatory networks underlie a host of fundamental biological questions including the maintenance of normal cellular states, response of cells to internal and external signals, handling of noise inherent in biological systems, and the evolutionary trajectory of organisms. Moreover, cells containing identical gene sets nearly always are heterogeneous in their epigenetic states, where the effects of stochastic fluctuation of a small number of key regulators (intrinsic noise) and general fluctuation in biochemical machinery (extrinsic noise) critically affect network dynamics. Mathematical methods for tackling these processes are not yet fully developed. In this proposal advantage is taken of a novel synthetic biology approach coupled with interaction modeling by stochastic evolutionary game theory. The latter is an ideal modeling framework for noisy interacting systems where the probability distribution of component states influence one another. Two synthetic genetic networks will be designed and implemented within two separate yeast cells that are otherwise genetically identical (except at the mating type locus). Each of these two networks takes as input a common metabolite and outputs one of two fluorescent proteins that will be measured in single cells by real time imaging techniques. The two networks will be coupled to each other by mating the cells and the coupled dynamics will be monitored. The networks are designed such that they have the opportunity to both cooperate and interfere with each other. The coupling coefficients are tunable. A stochastic evolutionary game theoretic model will be devised to determine agreement with experimental results. Both the theory and experiments proposed here are high-risk: 1) Real-time dynamics of coupling of two synthetic genetic circuits in single cells have never been studied before; 2) The particular gene networks proposed here have not been studied, so there is no guarantee that the observed dynamics will reflect simulated dynamics; 3) Imaging mating cells for single cell gene expression dynamics has not yet been attempted (to our knowledge); 4) Stochastic evolutionary game theory is a relatively new area of research in mathematical sciences and its applicability to gene regulatory network dynamics is uncertain. Given these uncertainties, and given the potential for advancing a new way of thinking about biological network dynamics if the project is successful, this project is deemed suitable for an EAGER submission. Insights learned from these studies will be valuable for understanding how networks communicate in a noisy environment and how modally rational entities with stochastic behavior cooperate or compete in communication networks.</docText>
    <division>CCF</division>
    <directorate>CSE</directorate>
    <award-instr>Standard Grant</award-instr>
    <programreferencecode>HPCC</programreferencecode>
    <keyword>network</keyword>
    <programreferencecode>9218</programreferencecode>
    <state>CA</state>
    <fieldofapplication>0000912 Computer Science</fieldofapplication>
    <progmgr>Mitra Basu</progmgr>
    <amount>100000</amount>
    <pi>Ray, Animesh</pi>
    <organization>Keck Graduate Institute</organization>
    <program>COMPUTATIONAL BIOLOGY</program>
    <programelementcode>7931</programelementcode>
    <programreferencecode>7916</programreferencecode>
    <copi>Ali Nadim</copi>
  </document>
  <document>
    <docID>0941058</docID>
    <docDate>August 15, 2009</docDate>
    <docSource></docSource>
    <docText>Student Travel Support for the Requirements Engineering 2009 Doctoral Symposium

   This grant provides support for travel, conference registration fees, and accommodation costs for students selected to attend the Doctoral Symposium being held at the 2009 International Conference on Requirements Engineering (RE?09) in Atlanta, USA, 31 August ? 4 September 2009.  The International Requirements Engineering Conference is sponsored by the IEEE and is the premier academic and industrial event in the field of Requirements Engineering.  The Doctoral Symposium at RE?09 provides a venue for young researchers to access worldwide expertise in software engineering. The Symposium is a one-day closed RE?09 event that provides a forum for Ph.D. students to publicly discuss their research goals, methods, and results at an early stage in their research. The Symposium aims to provide useful guidance to the students from a panel of experts, for completion of the dissertation research and initiation of a research career.</docText>
    <division>CCF</division>
    <directorate>CSE</directorate>
    <award-instr>Standard Grant</award-instr>
    <programreferencecode>HPCC</programreferencecode>
    <state>GA</state>
    <programreferencecode>9218</programreferencecode>
    <keyword>software engineering</keyword>
    <fieldofapplication>0000912 Computer Science</fieldofapplication>
    <progmgr>Sol J. Greenspan</progmgr>
    <organization>Georgia State University Research Foundation, Inc.</organization>
    <amount>7500</amount>
    <program>SOFTWARE ENG &amp; FORMAL METHODS</program>
    <programelementcode>7944</programelementcode>
    <pi>Robinson, William</pi>
  </document>
  <document>
    <docID>0940671</docID>
    <docDate>September 1, 2009</docDate>
    <docSource></docSource>
    <docText>CDI-Type II: Integrating Algorithmic and Stochastic Modeling Techniques for Environmental Prediction

   Predicting biodiversity, i.e., abundance of species, in response to climate change is a goal of environmental change research.  Despite recent valuable advances in understanding biodiversity and climate, the current grasp is limited. There are two widely recognized obstacles: first, because of the complexity of the underlying processes, the existing models intended for understanding and prediction are not (computationally) scalable.  Second, the coarse-scale environment models fail to capture interactions among species, which control biodiversity, and the models based on fine-scale, short-term observations are unable to make long-term predictions.  This project aims to develop a prediction framework that coherently combines broad-scale pattern data with fine-scale data on species interactions and that is computationally scalable.  It focuses on prediction at the geographic scale and in using geographic-scale data to better understanding at the scales where species interactions occur.    The goal is to develop a multiscale modeling framework and to design algorithms that make environmental models computationally scalable.  The approach hinges upon strong interplay of algorithmic and statistical techniques.  Statistical inference brings stochastic modeling sophistication in space and time, yielding improved characterization of the process and the possibility of full inference. Sophisticated algorithms make models and processes scalable and provide trade-offs between accuracy and efficiency.     The project draws on a wide range of topics in computer science and statistics, including geometric algorithms, approximation algorithms, hierarchical specifications within a Bayesian framework, and space-time process modeling. The problem areas address in the proposed prototypical example indicate more broadly applicable consequential challenges for both computer science and statistics. These include maintaining/updating distributions and summaries, dynamic algorithms, data driven algorithms, stochastic optimization, and assessing uncertainty and multi-scale nonlinear interactions in inference. Techniques for obtaining trade-offs between conflicting goals are needed in order to optimize the overall performance of the model.</docText>
    <keyword>algorithms</keyword>
    <division>CCF</division>
    <directorate>CSE</directorate>
    <award-instr>Standard Grant</award-instr>
    <programreferencecode>HPCC</programreferencecode>
    <programreferencecode>9218</programreferencecode>
    <fieldofapplication>0000912 Computer Science</fieldofapplication>
    <state>NC</state>
    <programreferencecode>OTHR</programreferencecode>
    <organization>Duke University</organization>
    <pi>Agarwal, Pankaj</pi>
    <progmgr>Dmitry Maslov</progmgr>
    <programreferencecode>7752</programreferencecode>
    <programreferencecode>7722</programreferencecode>
    <program>CDI TYPE II</program>
    <programelementcode>7751</programelementcode>
    <programreferencecode>7721</programreferencecode>
    <copi>James Clark</copi>
    <copi>Alan Gelfand</copi>
    <amount>1591869</amount>
    <programreferencecode>7751</programreferencecode>
  </document>
  <document>
    <docID>0940512</docID>
    <docDate>August 1, 2009</docDate>
    <docSource></docSource>
    <docText>Travel Support for the First Workshop on Deterministic Multiprocessing (WoDet)

   This proposal requests funding to assist approximately 40 US-based researchers to attend the First Workshop on Deterministic Multiprocessing (WoDet) in Seattle, WA, in the first week of October 2009. The goals of the workshop are to initiate a discussion in the areas of deterministic multiprocessing from languages all the to hardware and tools and to spark funding for new research programs. While there is a growing consensus that determinism would greatly help with the programmability challenges of multicore systems, there is still little consensus on many important questions.   The support requested enables the participation of both academic and industry researchers. The PIs also open the workshop to a select set of students who are already working in the area.</docText>
    <division>CCF</division>
    <directorate>CSE</directorate>
    <award-instr>Standard Grant</award-instr>
    <programreferencecode>HPCC</programreferencecode>
    <programreferencecode>9218</programreferencecode>
    <progmgr>Almadena Y. Chtchelkanova</progmgr>
    <fieldofapplication>0000912 Computer Science</fieldofapplication>
    <organization>University of Washington</organization>
    <state>WA</state>
    <program>COMPILERS</program>
    <programelementcode>7329</programelementcode>
    <amount>30000</amount>
    <pi>Ceze, Luis</pi>
  </document>
  <document>
    <docID>0940003</docID>
    <docDate>August 1, 2009</docDate>
    <docSource></docSource>
    <docText>Careers in High Performance Systems (CHiPS) Mentoring Workshop

   Careers in High Performance Systems (CHiPS) Mentoring Workshop  is a mentoring workshop to attract and encourage women and under-represented minority (URM) computer science undergraduate students (specifically those students in their sophomore and junior years) to obtain a Ph.D. in computer science.    The workshop will engage women and under-represented minority undergraduates specifically interested in HPC research. A  set of mentoring panels will focus on motivating and preparing students to get a Ph.D. A tutorial session on GPU programming techniques taught by leading academic and industry experts is planned. This panel will be hands-on with the students actually doing coding. Researchers from several areas of HPC will hold panels discussing past research and the current state-of-art in HPC, and present a number of future problems that we, as a society, should be prepared to tackle in the coming decade.</docText>
    <division>CCF</division>
    <directorate>CSE</directorate>
    <award-instr>Standard Grant</award-instr>
    <programreferencecode>HPCC</programreferencecode>
    <programreferencecode>9218</programreferencecode>
    <progmgr>Almadena Y. Chtchelkanova</progmgr>
    <fieldofapplication>0000912 Computer Science</fieldofapplication>
    <organization>University of Delaware</organization>
    <state>DE</state>
    <program>EXP PROG TO STIM COMP RES</program>
    <programelementcode>9150</programelementcode>
    <amount>20000</amount>
    <program>HIGH-PERFORMANCE COMPUTING</program>
    <programelementcode>7942</programelementcode>
    <pi>Cavazos, John</pi>
    <copi>David Kaeli</copi>
  </document>
  <document>
    <docID>0939991</docID>
    <docDate>August 1, 2009</docDate>
    <docSource></docSource>
    <docText>EAGER:  Exploratory Research on Gradual Programming

   This EAGER grant explores early concepts of a new approach to computer programming. The semantic gap between what the programmer intends and what the code actually means significantly impedes efforts to improve programmer productivity, software reliability, and execution efficiency.  To address the semantic gap, the project radically rethinks how to develop software. A new programming model, methodology, and system for ?gradual programming? will support the development of programs and programming language semantics in parallel.  The vision advocates developing programs in a family of languages with varying semantics. Then, part of the development process involves nailing down the precise semantics of the program.  A key issue involves the tradeoffs between expressiveness of a programming language and the ability to build tools capable of statically checking for programming errors.  Such a vision is not without significant challenges and possible pitfalls, such as maintaining performance, and entrusting issues of programming language design to programmers.  The project will study the sources of the semantic gap in the Java programming language to understand the problem better and articulate the approach more fully.</docText>
    <division>CCF</division>
    <directorate>CSE</directorate>
    <award-instr>Standard Grant</award-instr>
    <programreferencecode>HPCC</programreferencecode>
    <programreferencecode>9218</programreferencecode>
    <fieldofapplication>0000912 Computer Science</fieldofapplication>
    <organization>University of Colorado at Boulder</organization>
    <state>CO</state>
    <progmgr>Sol J. Greenspan</progmgr>
    <keyword>vision</keyword>
    <program>PROGRAMMING LANGUAGES</program>
    <programelementcode>7943</programelementcode>
    <pi>Siek, Jeremy</pi>
    <programreferencecode>7916</programreferencecode>
    <copi>Amer Diwan</copi>
    <copi>Bor-Yuh Evan Chang</copi>
    <amount>81748</amount>
  </document>
  <document>
    <docID>0939976</docID>
    <docDate>August 15, 2009</docDate>
    <docSource></docSource>
    <docText>Design Automation Summer School

   Proposal ID: CCF - 0939976    Proposal Title: Design Automation Summer School 2009  PI Name: Shang Li       Title: University of Colorado at Boulder       A group of active researchers in the field of Electronic Design Automation is organizing a summer school in the form of a workshop for young researchers in the field. The summer school will be co-located with the annual Design Automation Conference (DAC) to be held in San Francisco in July 2009.  DAC is the main annual event and a major conference in the field that is to be expected to be attended by most active researchers in the field.     The workshop speakers will be mostly established and prominent researchers in the field of microelectronic design automation. The fact that the summer school is co-located will be an added advantage in that the most speakers at the workshop will not need to spend additional effort for their travel.    In the past similar groups have organized very similar events that have been very successful in bringing young generation of researchers up to speed with state of the art tools and techniques in modern electronic design automation.    This workshop is expected to have a similar impact.</docText>
    <division>CCF</division>
    <directorate>CSE</directorate>
    <award-instr>Standard Grant</award-instr>
    <programreferencecode>HPCC</programreferencecode>
    <programreferencecode>9218</programreferencecode>
    <fieldofapplication>0000912 Computer Science</fieldofapplication>
    <organization>University of Colorado at Boulder</organization>
    <state>CO</state>
    <progmgr>Sankar Basu</progmgr>
    <amount>20000</amount>
    <program>DES AUTO FOR MICRO &amp; NANO SYST</program>
    <programelementcode>7945</programelementcode>
    <pi>Shang, Li</pi>
  </document>
  <document>
    <docID>0939187</docID>
    <docDate>September 1, 2009</docDate>
    <docSource></docSource>
    <docText>EAGER:   Collaborative Research: Cross-Domain Knowledge Transformation via Matrix Decompositions

   EAGER: Collaborative Research: Cross-domain Knowledge Transformation via Matrix Decompositions    Traditional data mining algorithms discover knowledge in new domains starting from the scratch, ignoring knowledge learned in other domains.  Knowledge transformation is a transformative paradigm that utilizes previously acquired knowledge in other domains to guide knowledge discovery process in a new domain and is especially useful for large data sets.  In particular, utilizing applicable knowledge in other domains helps to stabilize the unsupervised learning and generate results that we may have preliminary understanding.      The goal of this project is to design and develop cross-domain knowledge transformation mechanisms for knowledge discovery. The transformation mechanisms are based on matrix decompositions where the knowledge been transferred are represented directly and explicitly ? making them easy to comprehend and be utilized in practice. The proposed mechanisms provide a versatile knowledge transformation framework with solid theoretical foundation and enable a new paradigm of unsupervised learning with domain knowledge.     The usefulness of these knowledge transformation mechanisms/systems will be demonstrated for effective information retrieval, consumer recommender systems, and product/online opinion sentiment analysis. The versatility of this transformative metholody will be verified across many domains.</docText>
    <keyword>algorithms</keyword>
    <division>CCF</division>
    <directorate>CSE</directorate>
    <state>TX</state>
    <award-instr>Standard Grant</award-instr>
    <programreferencecode>HPCC</programreferencecode>
    <programreferencecode>9218</programreferencecode>
    <fieldofapplication>0000912 Computer Science</fieldofapplication>
    <keyword>information retrieval</keyword>
    <keyword>data mining</keyword>
    <progmgr>Lenore M. Mullin</progmgr>
    <program>INFO INTEGRATION &amp; INFORMATICS</program>
    <programelementcode>7364</programelementcode>
    <program>NUM, SYMBOL, &amp; ALGEBRA COMPUT</program>
    <programelementcode>7933</programelementcode>
    <organization>University of Texas at Arlington</organization>
    <pi>Ding, Chris</pi>
    <copi>Heng Huang</copi>
    <programreferencecode>7916</programreferencecode>
    <amount>53855</amount>
  </document>
  <document>
    <docID>0939179</docID>
    <docDate>September 1, 2009</docDate>
    <docSource></docSource>
    <docText>EAGER:  Collaborative Research: Cross-Domain Knowledge Transformation via Matrix Decompositions

   EAGER: Collaborative Research: Cross-domain Knowledge Transformation via Matrix Decompositions    Traditional data mining algorithms discover knowledge in new domains starting from the scratch, ignoring knowledge learned in other domains.  Knowledge transformation is a transformative paradigm that utilizes previously acquired knowledge in other domains to guide knowledge discovery process in a new domain and is especially useful for large data sets.  In particular, utilizing applicable knowledge in other domains helps to stabilize the unsupervised learning and generate results that we may have preliminary understanding.      The goal of this project is to design and develop cross-domain knowledge transformation mechanisms for knowledge discovery. The transformation mechanisms are based on matrix decompositions where the knowledge been transferred are represented directly and explicitly ? making them easy to comprehend and be utilized in practice. The proposed mechanisms provide a versatile knowledge transformation framework with solid theoretical foundation and enable a new paradigm of unsupervised learning with domain knowledge.     The usefulness of these knowledge transformation mechanisms/systems will be demonstrated for effective information retrieval, consumer recommender systems, and product/online opinion sentiment analysis. The versatility of this transformative metholody will be verified across many domains.</docText>
    <keyword>algorithms</keyword>
    <division>CCF</division>
    <directorate>CSE</directorate>
    <award-instr>Standard Grant</award-instr>
    <programreferencecode>HPCC</programreferencecode>
    <programreferencecode>9218</programreferencecode>
    <fieldofapplication>0000912 Computer Science</fieldofapplication>
    <state>FL</state>
    <keyword>information retrieval</keyword>
    <keyword>data mining</keyword>
    <progmgr>Lenore M. Mullin</progmgr>
    <organization>Florida International University</organization>
    <program>INFO INTEGRATION &amp; INFORMATICS</program>
    <programelementcode>7364</programelementcode>
    <program>NUM, SYMBOL, &amp; ALGEBRA COMPUT</program>
    <programelementcode>7933</programelementcode>
    <pi>Li, Tao</pi>
    <amount>46000</amount>
    <programreferencecode>7916</programreferencecode>
  </document>
  <document>
    <docID>0939108</docID>
    <docDate>September 1, 2009</docDate>
    <docSource></docSource>
    <docText>CPATH-1: Collaborative Research: a Verification-Driven Learning Model that Enriches CS and Related Undergraduate Programs

   Computer science foundation-building courses at the freshman and sophomore levels pose the greatest stumbling blocks to undergraduate students' learning.  CS student enrollment has declined over 60% nationwide, even though the demand for skilled professionals was increasing.  There is an urgent need for a more effective CS learning model.     The main purpose of this research is to enrich the context of the CS learning process which is important from motivational and educational perspectives.  This project investigates a verification-driven learning model that facilitates students' involvement in real-world computing tasks starting from their early computing courses and continuing throughout their entire studies in computing.  This model can significantly reduce the prerequisites for students to study real-world problems in their early years.  The students are tasked to validate the functionality of software, execute programs, test parts of systems (pre-decomposed subsystems and components), and locate possible errors.  Such seemingly complex high-level tasks can be done by novice students because software verification does not require design and implementation, and can be turned into a learn-by-example process with adequate preparation.  This kind of preparation is wrapped in a Verification-Driven Learning Case, which defines the configuration to support a verification-driven learning activity, and consists of elements such as the justification of the system's existence, the requirement specification, description of the functionality, a set of test cases, and the decomposition of the system.      The foundation of the verification-driven learning model lies in software testing theories and techniques.  Frequent and progressive exercises on verification will prepare the students for formal specifications.  To realize the learning model, this project will produce Learning Cases based on faculty research including computer security, bioinformatics, geographic information systems, database and data mining techniques, remote sensing, and fuzzy set techniques.  The Learning Cases will expose the students to working software systems that serve a real-world purpose in scientific research, engineering development, or social networks.    This project will particularly advocate computer science education in under-represented minority and woman students.  This learning approach will also help adult students who have rich experience in various areas but need to reposition themselves in the work force.  The final goal of this project is to revitalize the CS programs and produce more competent graduates capable of computational thinking.</docText>
    <division>CCF</division>
    <directorate>CSE</directorate>
    <award-instr>Standard Grant</award-instr>
    <programreferencecode>HPCC</programreferencecode>
    <keyword>verification</keyword>
    <keyword>security</keyword>
    <programreferencecode>9218</programreferencecode>
    <fieldofapplication>0000912 Computer Science</fieldofapplication>
    <state>LA</state>
    <keyword>education</keyword>
    <keyword>database</keyword>
    <programreferencecode>9150</programreferencecode>
    <keyword>data mining</keyword>
    <keyword>bioinformatics</keyword>
    <progmgr>Tracy J. Kimbrel</progmgr>
    <organization>University of New Orleans</organization>
    <program>CPATH</program>
    <programelementcode>7640</programelementcode>
    <programreferencecode>7640</programreferencecode>
    <pi>Tu, Shengru</pi>
    <copi>Mahdi Abdelguerfi</copi>
    <copi>Golden Richard</copi>
    <copi>Dongxiao Zhu</copi>
    <amount>194998</amount>
  </document>
  <document>
    <docID>0939102</docID>
    <docDate>September 1, 2009</docDate>
    <docSource></docSource>
    <docText>CPATH-1: Collaborative Research: a Verification-Driven Learning Model that Enriches CS and Related Undergraduate Programs

   Computer science foundation-building courses at the freshman and sophomore levels pose the greatest stumbling blocks to undergraduate students' learning. CS student enrollment has declined over 60% nationwide, even though the demand for skilled professionals was increasing. There is an urgent need for a more effective CS learning model.     The main purpose of this research is to enrich the context of the CS learning process which is important from motivational and educational perspectives. This project investigates a verification-driven learning model that facilitates students' involvement in real-world computing tasks starting from their early computing courses and continuing throughout their entire studies in computing. This model can significantly reduce the prerequisites for students to study real-world problems in their early years. The students are tasked to validate the functionality of software, execute programs, test parts of systems (pre-decomposed subsystems and components), and locate possible errors. Such seemingly complex high-level tasks can be done by novice students because software verification does not require design and implementation, and can be turned into a learn-by-example process with adequate preparation. This kind of preparation is wrapped in a Verification-Driven Learning Case, which defines the configuration to support a verification-driven learning activity, and consists of elements such as the justification of the system's existence, the requirement specification, description of the functionality, a set of test cases, and the decomposition of the system.     The foundation of the verification-driven learning model lies in software testing theories and techniques. Frequent and progressive exercises on verification will prepare the students for formal specifications. To realize the learning model, this project will produce Learning Cases based on faculty research including computer security, bioinformatics, geographic information systems, database and data mining techniques, remote sensing, and fuzzy set techniques. The Learning Cases will expose the students to working software systems that serve a real-world purpose in scientific research, engineering development, or social networks.     This project will particularly advocate computer science education in under-represented minority and woman students. This learning approach will also help adult students who have rich experience in various areas but need to reposition themselves in the work force. The final goal of this project is to revitalize the CS programs and produce more competent graduates capable of computational thinking.</docText>
    <division>CCF</division>
    <directorate>CSE</directorate>
    <award-instr>Standard Grant</award-instr>
    <programreferencecode>HPCC</programreferencecode>
    <keyword>verification</keyword>
    <keyword>security</keyword>
    <programreferencecode>9218</programreferencecode>
    <fieldofapplication>0000912 Computer Science</fieldofapplication>
    <state>LA</state>
    <keyword>education</keyword>
    <keyword>database</keyword>
    <programreferencecode>9150</programreferencecode>
    <keyword>data mining</keyword>
    <keyword>bioinformatics</keyword>
    <progmgr>Tracy J. Kimbrel</progmgr>
    <program>CPATH</program>
    <programelementcode>7640</programelementcode>
    <programreferencecode>7640</programreferencecode>
    <pi>Lang, Raymond</pi>
    <copi>Kun Zhang</copi>
    <organization>Xavier University of Louisiana</organization>
    <amount>44982</amount>
  </document>
  <document>
    <docID>0939097</docID>
    <docDate>September 1, 2009</docDate>
    <docSource></docSource>
    <docText>CPATH-2: Collaborative Research: Building a community to incorporate humanitarian free and open source software into undergraduate computing education

   Free and open source software (FOSS) is software that can be freely shared, modified, and redistributed.  FOSS is developed by collaborative communities and distributed under licenses that permit its sharing and redistribution. Humanitarian FOSS (H-FOSS) is FOSS that is developed specifically to benefit the local and global community.  The key concepts underlying FOSS and H-FOSS are their collaborative development process and community ownership.  These concepts provide the underpinnings for many remarkable software projects, such as free and open repositories of general knowledge (Wikipedia), standard DNA parts (The BioBricks Foundation), and scientific research (PLoS).    This project uses the H-FOSS model to help revitalize undergraduate computing education by getting students engaged in building free and open software that benefits the community.  During the project's first three years, students from Trinity College, Wesleyan University, Connecticut College, and elsewhere have developed H-FOSS in traditional and video-conference courses, independent studies and capstone projects, and in sponsored summer internships. Working collaboratively with FOSS practitioners in real and virtual communities, students have developed software that directly supports a variety of global and local humanitarian efforts, ranging from disaster management to health care delivery to volunteer management to search and rescue operations.  For more details about this work, see http://www.hfoss.org.     During the next two years, this project will have three major goals: (1) to extend the H-FOSS educational community by creating new H-FOSS Chapters at a wide range of undergraduate institutions, including community colleges, women's colleges, and traditionally black schools; (2) to create an H-FOSS Certificate Program that will recognize student achievement in the study and practice of H-FOSS development; and (3) to develop a sustainable infrastructure and funding model, along with industry and community partners, that will enable the H-FOSS effort to be expanded to a national scope.  By getting computing students and faculty involved in building FOSS that serves the community, this project will thereby help transform the nature and enhance the attractiveness of undergraduate computing education itself.</docText>
    <division>CCF</division>
    <directorate>CSE</directorate>
    <award-instr>Standard Grant</award-instr>
    <programreferencecode>HPCC</programreferencecode>
    <programreferencecode>9218</programreferencecode>
    <fieldofapplication>0000912 Computer Science</fieldofapplication>
    <keyword>education</keyword>
    <state>CT</state>
    <progmgr>Tracy J. Kimbrel</progmgr>
    <fieldofapplication>0116000 Human Subjects</fieldofapplication>
    <keyword>computing education</keyword>
    <program>CPATH</program>
    <organization>Wesleyan University</organization>
    <programelementcode>7640</programelementcode>
    <programreferencecode>7640</programreferencecode>
    <pi>Danner, Norman</pi>
    <copi>Danny Krizanc</copi>
    <amount>155489</amount>
  </document>
  <document>
    <docID>0939034</docID>
    <docDate>September 1, 2009</docDate>
    <docSource></docSource>
    <docText>CPATH-2: Collaborative Research: Building a Community to Incorporate Humanitarian Free and Open Source Software into Undergraduate Computing Education

   Free and open source software (FOSS) is software that can be freely shared, modified, and redistributed.  FOSS is developed by collaborative communities and distributed under licenses that permit its sharing and redistribution. Humanitarian FOSS (H-FOSS) is FOSS that is developed specifically to benefit the local and global community.  The key concepts underlying FOSS and H-FOSS are their collaborative development process and community ownership.  These concepts provide the underpinnings for many remarkable software projects, such as free and open repositories of general knowledge (Wikipedia), standard DNA parts (The BioBricks Foundation), and scientific research (PLoS).    This project uses the H-FOSS model to help revitalize undergraduate computing education by getting students engaged in building free and open software that benefits the community.  During the project's first three years, students from Trinity College, Wesleyan University, Connecticut College, and elsewhere have developed H-FOSS in traditional and video-conference courses, independent studies and capstone projects, and in sponsored summer internships. Working collaboratively with FOSS practitioners in real and virtual communities, students have developed software that directly supports a variety of global and local humanitarian efforts, ranging from disaster management to health care delivery to volunteer management to search and rescue operations.  For more details about this work, see http://www.hfoss.org.     During the next two years, this project will have three major goals: (1) to extend the H-FOSS educational community by creating new H-FOSS Chapters at a wide range of undergraduate institutions, including community colleges, women's colleges, and traditionally black schools; (2) to create an H-FOSS Certificate Program that will recognize student achievement in the study and practice of H-FOSS development; and (3) to develop a sustainable infrastructure and funding model, along with industry and community partners, that will enable the H-FOSS effort to be expanded to a national scope.  By getting computing students and faculty involved in building FOSS that serves the community, this project will thereby help transform the nature and enhance the attractiveness of undergraduate computing education itself.</docText>
    <division>CCF</division>
    <directorate>CSE</directorate>
    <award-instr>Standard Grant</award-instr>
    <programreferencecode>HPCC</programreferencecode>
    <programreferencecode>9218</programreferencecode>
    <fieldofapplication>0000912 Computer Science</fieldofapplication>
    <keyword>education</keyword>
    <state>CT</state>
    <progmgr>Tracy J. Kimbrel</progmgr>
    <fieldofapplication>0116000 Human Subjects</fieldofapplication>
    <keyword>computing education</keyword>
    <program>CPATH</program>
    <programelementcode>7640</programelementcode>
    <programreferencecode>7640</programreferencecode>
    <pi>Morelli, Ralph</pi>
    <organization>Trinity College</organization>
    <amount>467636</amount>
  </document>
  <document>
    <docID>0939015</docID>
    <docDate>September 1, 2009</docDate>
    <docSource></docSource>
    <docText>CPATH-1: Collaborative Research: A Verification-Driven Learning Model that Enriches CS and Related Undergraduate Programs

   Computer science foundation-building courses at the freshman and sophomore levels pose the greatest stumbling blocks to undergraduate students' learning. CS student enrollment has declined over 60% nationwide, even though the demand for skilled professionals was increasing. There is an urgent need for a more effective CS learning model.     The main purpose of this research is to enrich the context of the CS learning process which is important from motivational and educational perspectives. This project investigates a verification-driven learning model that facilitates students' involvement in real-world computing tasks starting from their early computing courses and continuing throughout their entire studies in computing. This model can significantly reduce the prerequisites for students to study real-world problems in their early years. The students are tasked to validate the functionality of software, execute programs, test parts of systems (pre-decomposed subsystems and components), and locate possible errors. Such seemingly complex high-level tasks can be done by novice students because software verification does not require design and implementation, and can be turned into a learn-by-example process with adequate preparation. This kind of preparation is wrapped in a Verification-Driven Learning Case, which defines the configuration to support a verification-driven learning activity, and consists of elements such as the justification of the system's existence, the requirement specification, description of the functionality, a set of test cases, and the decomposition of the system.     The foundation of the verification-driven learning model lies in software testing theories and techniques. Frequent and progressive exercises on verification will prepare the students for formal specifications. To realize the learning model, this project will produce Learning Cases based on faculty research including computer security, bioinformatics, geographic information systems, database and data mining techniques, remote sensing, and fuzzy set techniques. The Learning Cases will expose the students to working software systems that serve a real-world purpose in scientific research, engineering development, or social networks.     This project will particularly advocate computer science education in under-represented minority and woman students. This learning approach will also help adult students who have rich experience in various areas but need to reposition themselves in the work force. The final goal of this project is to revitalize the CS programs and produce more competent graduates capable of computational thinking.</docText>
    <division>CCF</division>
    <directorate>CSE</directorate>
    <award-instr>Standard Grant</award-instr>
    <programreferencecode>HPCC</programreferencecode>
    <keyword>verification</keyword>
    <keyword>security</keyword>
    <programreferencecode>9218</programreferencecode>
    <fieldofapplication>0000912 Computer Science</fieldofapplication>
    <state>LA</state>
    <keyword>education</keyword>
    <keyword>database</keyword>
    <programreferencecode>9150</programreferencecode>
    <keyword>data mining</keyword>
    <keyword>bioinformatics</keyword>
    <progmgr>Tracy J. Kimbrel</progmgr>
    <amount>60000</amount>
    <program>CPATH</program>
    <programelementcode>7640</programelementcode>
    <programreferencecode>7640</programreferencecode>
    <pi>Zhang, Wendy</pi>
    <copi>Theresa Beaubouef</copi>
    <organization>Southeastern Louisiana University</organization>
  </document>
  <document>
    <docID>0939002</docID>
    <docDate>September 1, 2009</docDate>
    <docSource></docSource>
    <docText>CPATH-2: Collaborative Research: Building a Community to Incorporate Humanitarian Free and Open Source Software into Undergraduate Computing Education

   Free and open source software (FOSS) is software that can be freely shared, modified, and redistributed.  FOSS is developed by collaborative communities and distributed under licenses that permit its sharing and redistribution. Humanitarian FOSS (H-FOSS) is FOSS that is developed specifically to benefit the local and global community.  The key concepts underlying FOSS and H-FOSS are their collaborative development process and community ownership.  These concepts provide the underpinnings for many remarkable software projects, such as free and open repositories of general knowledge (Wikipedia), standard DNA parts (The BioBricks Foundation), and scientific research (PLoS).    This project uses the H-FOSS model to help revitalize undergraduate computing education by getting students engaged in building free and open software that benefits the community.  During the project's first three years, students from Trinity College, Wesleyan University, Connecticut College, and elsewhere have developed H-FOSS in traditional and video-conference courses, independent studies and capstone projects, and in sponsored summer internships. Working collaboratively with FOSS practitioners in real and virtual communities, students have developed software that directly supports a variety of global and local humanitarian efforts, ranging from disaster management to health care delivery to volunteer management to search and rescue operations.  For more details about this work, see http://www.hfoss.org.     During the next two years, this project will have three major goals: (1) to extend the H-FOSS educational community by creating new H-FOSS Chapters at a wide range of undergraduate institutions, including community colleges, women's colleges, and traditionally black schools; (2) to create an H-FOSS Certificate Program that will recognize student achievement in the study and practice of H-FOSS development; and (3) to develop a sustainable infrastructure and funding model, along with industry and community partners, that will enable the H-FOSS effort to be expanded to a national scope.  By getting computing students and faculty involved in building FOSS that serves the community, this project will thereby help transform the nature and enhance the attractiveness of undergraduate computing education itself.</docText>
    <division>CCF</division>
    <directorate>CSE</directorate>
    <award-instr>Standard Grant</award-instr>
    <programreferencecode>HPCC</programreferencecode>
    <programreferencecode>9218</programreferencecode>
    <fieldofapplication>0000912 Computer Science</fieldofapplication>
    <keyword>education</keyword>
    <state>CT</state>
    <progmgr>Tracy J. Kimbrel</progmgr>
    <fieldofapplication>0116000 Human Subjects</fieldofapplication>
    <keyword>computing education</keyword>
    <program>CPATH</program>
    <programelementcode>7640</programelementcode>
    <programreferencecode>7640</programreferencecode>
    <organization>Connecticut College</organization>
    <pi>Izmirli, Ozgur</pi>
    <copi>Gary Parker</copi>
    <amount>174494</amount>
  </document>
  <document>
    <docID>0938995</docID>
    <docDate>October 1, 2009</docDate>
    <docSource></docSource>
    <docText>CPATH-1:  Asserting Parallel Computational Thinking into Undergraduate 4-year Computer Science Curriculum

   Technological advances enable creation of systems on such large scales that design, analysis, and implementation require expert skills.  These skills must include analytical and algorithmic thinking, the ability to abstract complexity, and the capacity to understand concurrency.  To strengthen these skills in graduates of the computer science undergraduate program offered at University of Puerto Rico - Rio Piedras, and to create professionals that are better equipped to face the new professional and academic realities, our program will be redesigned to incorporate Parallel Computational Thinking (PCT) concepts throughout most of its curriculum.    The seven members of our faculty will undergo development in Computational Thinking (CT) and parallel concepts. This will empower us to redesign CS core courses by infusing PCT concepts. We will develop assessment tools that will measure student aptitudes and attitudes toward PCT.  A parallel computation platform will be implemented locally and access to remote supercomputing centers will be established. Seminars on topics using CT and PCT will be sponsored and open to the general K-20 community. This project represents the first building block for the successful integration of CT into our undergraduate curriculum. Hence it provides a foundation for further growth toward a CT-centric and interdisciplinary Computer Science program.    Our efforts will result in an undergraduate program that reflects current computational practice in academia and in the private sector, and that ultimately produces professionals better equipped to tackle technological and scientific challenges.  All project activities will be documented and made publicly available through external publications and through the department web page.  Therefore our experience will serve as an information source for institutions that consider similar changes to their computer science curricula.</docText>
    <division>CCF</division>
    <directorate>CSE</directorate>
    <programreferencecode>HPCC</programreferencecode>
    <award-instr>Continuing grant</award-instr>
    <programreferencecode>9218</programreferencecode>
    <fieldofapplication>0000912 Computer Science</fieldofapplication>
    <program>INFORMATION TECHNOLOGY RESEARC</program>
    <programelementcode>1640</programelementcode>
    <programreferencecode>9150</programreferencecode>
    <progmgr>Tracy J. Kimbrel</progmgr>
    <programreferencecode>7640</programreferencecode>
    <pi>Musial, Peter</pi>
    <copi>Edusmildo Orozco</copi>
    <copi>Rafael Arce-Nazario</copi>
    <organization>University of Puerto Rico-Rio Piedras</organization>
    <state>PR</state>
    <amount>113976</amount>
  </document>
  <document>
    <docID>0938053</docID>
    <docDate>July 1, 2009</docDate>
    <docSource></docSource>
    <docText>Student Travel Grant for Doctoral Symposium at ICSR-11

   This grant supports student travel to a Doctoral Symposium taking place in conjunction with the International Conference on Software Reuse. The funds will give participants an opportunity to present their current work and get constructive feedback from a panel of faculty volunteers. The forum helps form a community for the next generation of researchers/educators and gives a forum for improving their research results with faculty mentorship beyond their own institution.           Sol J. Greenspan, Ph.D.  Program Director, CISE/CCF</docText>
    <division>CCF</division>
    <directorate>CSE</directorate>
    <award-instr>Standard Grant</award-instr>
    <programreferencecode>HPCC</programreferencecode>
    <programreferencecode>9218</programreferencecode>
    <fieldofapplication>0000912 Computer Science</fieldofapplication>
    <state>VA</state>
    <progmgr>Sol J. Greenspan</progmgr>
    <organization>Virginia Polytechnic Institute and State University</organization>
    <program>SOFTWARE ENG &amp; FORMAL METHODS</program>
    <programelementcode>7944</programelementcode>
    <pi>Kulczycki, Gregory</pi>
    <copi>Jason Hallstrom</copi>
    <amount>7800</amount>
  </document>
  <document>
    <docID>0938045</docID>
    <docDate>September 1, 2009</docDate>
    <docSource></docSource>
    <docText>HECURA: Collaborative Research: QoS-driven Storage Management for High-end Computing Systems

        In today's high-end computing (HEC) systems, the parallel file system (PFS) is at the core of the storage infrastructure. PFS deployments are shared by many users and applications, but currently there are no provisions for differentiation of service - data access is provided in a best-effort manner. As systems scale, this limitation can prevent applications from efficiently utilizing the HEC resources while achieving their desired performance and it presents a hurdle to support a large number of data-intensive applications concurrently. This NSF HECURA project tackles the challenges in quality of service (QoS) driven HEC storage management, aiming to support I/O bandwidth guarantees in PFSs by addressing the following four research aspects: 1. Per-application I/O bandwidth allocation based on PFS virtualization, where each application gets its specific I/O bandwidth share through its dynamically created virtual PFS. 2. PFS management services that control the lifecycle and configuration of per-application virtual PFSs as well as support application I/O monitoring and storage resource reservation. 3. Efficient I/O bandwidth allocation through autonomic, fine-grained resource scheduling across applications that incorporate coordinated scheduling and optimizations based on profiling and prediction. 4. Scalable application checkpointing based on performance isolation and optimization on virtual PFSs customized for checkpointing I/Os.</docText>
    <division>CCF</division>
    <directorate>CSE</directorate>
    <award-instr>Standard Grant</award-instr>
    <programreferencecode>HPCC</programreferencecode>
    <programreferencecode>9218</programreferencecode>
    <progmgr>Almadena Y. Chtchelkanova</progmgr>
    <fieldofapplication>0000912 Computer Science</fieldofapplication>
    <state>FL</state>
    <program>SPECIAL PROJECTS - CISE</program>
    <programelementcode>1714</programelementcode>
    <organization>Florida International University</organization>
    <programreferencecode>hpcc</programreferencecode>
    <pi>Zhao, Ming</pi>
    <amount>384343</amount>
  </document>
  <document>
    <docID>0938018</docID>
    <docDate>September 15, 2009</docDate>
    <docSource></docSource>
    <docText>Collaborative Research: Programming Models and Storage System for High Performance Computation with Many-Core Processors

   A major challenge for future High End Computing (HEC) systems built using many-core chips is the storage system since the available memory and bandwidth per processor core is starting to decline at an alarming rate, with the rapid increase in the number of cores per chip.  Data-intensive applications that require large data sets and/or high input-output bandwidth will be especially vulnerable to these trends.  Historically, the storage architecture of an HEC system has been constrained to a large degree by the filesystem interfaces in the underlying Operating System (OS).  The specific focus of this research is on exploring a new storage model based on write-once tree structures.  This research will explore three programming models for users of the storage system, all of which can inter-operate through shared persistent data: 1) a declarative programming model in which any data structure can be directly made persistent in the storage system, with no programmer intervention, 2) a strongly-typed imperative programming model in which a type system extension will be used to enforce a separation between data structures that can be directly made persistent and those that cannot, and 3) a weakly-typed runtime interface that enables low-level C programs to access the storage system.</docText>
    <division>CCF</division>
    <directorate>CSE</directorate>
    <state>TX</state>
    <award-instr>Standard Grant</award-instr>
    <programreferencecode>HPCC</programreferencecode>
    <keyword>architecture</keyword>
    <programreferencecode>9218</programreferencecode>
    <progmgr>Almadena Y. Chtchelkanova</progmgr>
    <fieldofapplication>0000912 Computer Science</fieldofapplication>
    <keyword>operating system</keyword>
    <amount>300000</amount>
    <organization>William Marsh Rice University</organization>
    <program>SPECIAL PROJECTS - CISE</program>
    <programelementcode>1714</programelementcode>
    <pi>Sarkar, Vivek</pi>
    <programreferencecode>hpcc</programreferencecode>
  </document>
  <document>
    <docID>0937993</docID>
    <docDate>August 15, 2009</docDate>
    <docSource></docSource>
    <docText>Collaborative Research: HECURA: A New Semantic-Aware Metadata Organization for Improved File-System Performance and Functionality in High-End Computing

   Last Modified Date:  06/29/09  Last Modified By:  Almadena Y. Chtchelkanova          Abstract   Existing data storage systems based on the hierarchical directory-tree organization do not meet the scalability and functionality requirements for exponentially growing datasets and increasingly complex metadata queries in large-scale Exabyte-level file systems with billions of files. This project focuses on a new decentralized semantic-aware metadata organization that exploits semantics of file metadata to improve system scalability, reduce query latency for complex data queries, and enhance file system functionality.     The research has four major components: 1) exploit metadata semantic-correlation to organize metadata in a scalable way, 2) exploit the semantic and scalable nature of the new metadata organization to significantly speed up complex queries and improve file system functionality, 3) fully leverage the semantic-awareness of the new metadata organization to optimize storage system designs, such as caching, prefetching, and data de-duplication, and 4) implement the new metadata organization, complex query functions, and system design optimizations in large-scale storage systems. This project has broader impact to data-intensive scientific and engineering applications, graduate and undergraduate education, and K-12 education through its contributions to storage system research and its integration with an existing NSF-REU site award and an NSF-ITEST award.</docText>
    <division>CCF</division>
    <directorate>CSE</directorate>
    <award-instr>Standard Grant</award-instr>
    <programreferencecode>HPCC</programreferencecode>
    <programreferencecode>9218</programreferencecode>
    <progmgr>Almadena Y. Chtchelkanova</progmgr>
    <fieldofapplication>0000912 Computer Science</fieldofapplication>
    <keyword>education</keyword>
    <organization>University of Nebraska-Lincoln</organization>
    <state>NE</state>
    <program>EXP PROG TO STIM COMP RES</program>
    <programelementcode>9150</programelementcode>
    <programreferencecode>9150</programreferencecode>
    <program>HECURA</program>
    <programelementcode>7952</programelementcode>
    <pi>Jiang, Hong</pi>
    <amount>344552</amount>
  </document>
  <document>
    <docID>0937988</docID>
    <docDate>August 15, 2009</docDate>
    <docSource></docSource>
    <docText>Collaborative Research: HECURA: A New Semantic-Aware Metadata Organization for Improved File-System Performance and Functionality in High-End Computing

   Existing data storage systems based on the hierarchical directory-tree organization do not meet the scalability and functionality requirements for exponentially growing datasets and increasingly complex metadata queries in large-scale Exabyte-level file systems with billions of files. This project focuses on a new decentralized semantic-aware metadata organization that exploits semantics of file metadata to improve system scalability, reduce query latency for complex data queries, and enhance file system functionality.     The research has four major components: 1) exploit metadata semantic-correlation to organize metadata in a scalable way, 2) exploit the semantic and scalable nature of the new metadata organization to significantly speed up complex queries and improve file system functionality, 3) fully leverage the semantic-awareness of the new metadata organization to optimize storage system designs, such as caching, prefetching, and data de-duplication, and 4) implement the new metadata organization, complex query functions, and system design optimizations in large-scale storage systems.  This project has broader impact to data-intensive scientific and engineering applications, graduate and undergraduate education, and K-12 education through its contributions to storage system research and its integration with an existing NSF-REU site award and an NSF-ITEST award.</docText>
    <division>CCF</division>
    <directorate>CSE</directorate>
    <award-instr>Standard Grant</award-instr>
    <programreferencecode>HPCC</programreferencecode>
    <programreferencecode>9218</programreferencecode>
    <progmgr>Almadena Y. Chtchelkanova</progmgr>
    <fieldofapplication>0000912 Computer Science</fieldofapplication>
    <keyword>education</keyword>
    <program>EXP PROG TO STIM COMP RES</program>
    <programelementcode>9150</programelementcode>
    <programreferencecode>9150</programreferencecode>
    <program>HECURA</program>
    <programelementcode>7952</programelementcode>
    <pi>Zhu, Yifeng</pi>
    <organization>University of Maine</organization>
    <state>ME</state>
    <amount>363141</amount>
  </document>
  <document>
    <docID>0937973</docID>
    <docDate>September 1, 2009</docDate>
    <docSource></docSource>
    <docText>HECURA: Collaborative Research: QoS-driven Storage Management for High-end Computing Systems

   In today's high-end computing (HEC) systems, the parallel file system (PFS) is at the core of the storage infrastructure. PFS deployments are shared by many users and applications, but currently there are no provisions for differentiation of service - data access is provided in a best-effort manner. As systems scale, this limitation can prevent applications from efficiently utilizing the HEC resources while achieving their desired performance and it presents a hurdle to support a large number of data-intensive applications concurrently. This NSF HECURA project tackles the challenges in quality of service (QoS) driven HEC storage management, aiming to support I/O bandwidth guarantees in PFSs by addressing the following four research aspects: 1. Per-application I/O bandwidth allocation based on PFS virtualization, where each application gets its specific I/O bandwidth share through its dynamically created virtual PFS. 2. PFS management services that control the lifecycle and configuration of per-application virtual PFSs as well as support application I/O monitoring and storage resource reservation. 3. Efficient I/O bandwidth allocation through autonomic, fine-grained resource scheduling across applications that incorporate coordinated scheduling and optimizations based on profiling and prediction. 4. Scalable application checkpointing based on performance isolation and optimization on virtual PFSs customized for checkpointing I/Os.</docText>
    <division>CCF</division>
    <directorate>CSE</directorate>
    <award-instr>Standard Grant</award-instr>
    <programreferencecode>HPCC</programreferencecode>
    <programreferencecode>9218</programreferencecode>
    <progmgr>Almadena Y. Chtchelkanova</progmgr>
    <fieldofapplication>0000912 Computer Science</fieldofapplication>
    <organization>University of Florida</organization>
    <state>FL</state>
    <program>SPECIAL PROJECTS - CISE</program>
    <programelementcode>1714</programelementcode>
    <programreferencecode>hpcc</programreferencecode>
    <pi>Figueiredo, Renato</pi>
    <amount>220426</amount>
  </document>
  <document>
    <docID>0937925</docID>
    <docDate>September 1, 2009</docDate>
    <docSource></docSource>
    <docText>Interleaving Workloads with  Performance Guarantees on Storage Clusters

   This research focuses on the design and implementation of a lightweight, yet, versatile middleware framework that provides effective and scalable solutions to the problem of interleaving storage workloads with a wide spectrum of demands. The framework uses simple and non-intrusive collection of workload statistics such as workload histograms and measures of temporal dependence to provide accurate forecasting of system workload characteristics and their impact on system metrics. The framework maps accurately and swiftly complex processes that exist and interact in storage clusters into robust allocation decisions. Central to the framework is its ability to estimate beforehand the effect of resource allocation policies on system metrics, which enables navigating through multiple possible allocations of system resources and selecting the on that best meets system targets.  This research has the potential to revolutionize autonomic resource management in storage systems and provide methodologies to meet conflicting targets such as discovering trade-offs and dependencies between performance and other metrics including cost, energy consumption, reliability, and availability.  This project enables enhancement of graduate courses on parallel and distributed systems with aspects of emerging paradigms such as data intensive, cloud, and green computing, as well as advances the education of the multiple students directly involved.</docText>
    <division>CCF</division>
    <directorate>CSE</directorate>
    <award-instr>Standard Grant</award-instr>
    <programreferencecode>HPCC</programreferencecode>
    <programreferencecode>9218</programreferencecode>
    <progmgr>Almadena Y. Chtchelkanova</progmgr>
    <fieldofapplication>0000912 Computer Science</fieldofapplication>
    <state>VA</state>
    <organization>College of William and Mary</organization>
    <keyword>education</keyword>
    <keyword>middleware</keyword>
    <amount>700000</amount>
    <program>HECURA</program>
    <programelementcode>7952</programelementcode>
    <programreferencecode>hpcc</programreferencecode>
    <pi>Riska, Alma</pi>
    <copi>Evgenia Smirni</copi>
  </document>
  <document>
    <docID>0937907</docID>
    <docDate>September 15, 2009</docDate>
    <docSource></docSource>
    <docText>Collaborative Research: Programming Models and Storage System for High Performance Computation with Many-Core Processors

   Abstract  A major challenge for future High End Computing (HEC) systems built using many-core chips is the storage system since the available memory and bandwidth per processor core is starting to decline at an alarming rate, with the rapid increase in the number of cores per chip. Data-intensive applications that require large data sets and/or high input-output bandwidth will be especially vulnerable to these trends. Historically, the storage architecture of an HEC system has been constrained to a large degree by the filesystem interfaces in the underlying Operating System (OS). The specific focus of this research is on exploring a new storage model based on write-once tree structures. This research will explore three programming models for users of the storage system, all of which can inter-operate through shared persistent data: 1) a declarative programming model in which any data structure can be directly made persistent in the storage system, with no programmer intervention, 2) a strongly-typed imperative programming model in which a type system extension will be used to enforce a separation between data structures that can be directly made persistent and those that cannot, and 3) a weakly-typed runtime interface that enables low-level C programs to access the storage system.</docText>
    <division>CCF</division>
    <directorate>CSE</directorate>
    <award-instr>Standard Grant</award-instr>
    <programreferencecode>HPCC</programreferencecode>
    <keyword>architecture</keyword>
    <programreferencecode>9218</programreferencecode>
    <progmgr>Almadena Y. Chtchelkanova</progmgr>
    <fieldofapplication>0000912 Computer Science</fieldofapplication>
    <keyword>operating system</keyword>
    <organization>University of Delaware</organization>
    <state>DE</state>
    <program>SPECIAL PROJECTS - CISE</program>
    <programelementcode>1714</programelementcode>
    <pi>Gao, Guang</pi>
    <programreferencecode>hpcc</programreferencecode>
    <amount>299984</amount>
  </document>
  <document>
    <docID>0937879</docID>
    <docDate>August 15, 2009</docDate>
    <docSource></docSource>
    <docText>Active Object Storage to Enable Scalable and Reliable Parallel File Systems

   The increasing performance and decreasing cost of processors has enabled increased system intelligence at peripherals such as disk drives. This computational capability at the disk has led to the development of object-based storage whereby some of the file system functionality is moved to the disk. The computation capability can also enable computation at the storage node in what has been called active disks or active storage.  This active storage computation serves as a mechanism to enable parallel computation using distributed storage nodes.  This research focuses on the use of these active disks for parallel file system and storage management.  A functional active storage system architecture built on the standardized object-storage device specification is being developed.  The architecture supports a variety of execution engines allowing multiple programming languages and models.  Using this active object storage architecture, mechanisms to improve overall scalability and large-scale system reliability are being investigated.  In addition, active and object storage are used to enable customizable and extensible file systems including autonomic (self-configuring and self-managing) storage as well as application aware storage such that the storage can be optimized for application and user needs.</docText>
    <division>CCF</division>
    <directorate>CSE</directorate>
    <award-instr>Standard Grant</award-instr>
    <programreferencecode>HPCC</programreferencecode>
    <keyword>architecture</keyword>
    <programreferencecode>9218</programreferencecode>
    <progmgr>Almadena Y. Chtchelkanova</progmgr>
    <fieldofapplication>0000912 Computer Science</fieldofapplication>
    <keyword>programming languages</keyword>
    <state>CT</state>
    <organization>University of Connecticut</organization>
    <pi>Chandy, John</pi>
    <amount>525000</amount>
    <programelementcode>I159</programelementcode>
    <programreferencecode>hpcc</programreferencecode>
  </document>
  <document>
    <docID>0937877</docID>
    <docDate>September 1, 2009</docDate>
    <docSource></docSource>
    <docText>HECURA: A Dynamic Application-specific I/O Architecture for High End Computing

   Disk I/O on high-end computing machines continues to be a significant performance bottleneck. Parallel file systems have been developed to improve parallel I/O performance. However, most of these methods are application dependent and their performance varies largely from application to application. The performance of parallel I/O can be improved with better understanding of I/O access characteristics at both client and file-server side. There is a great need for research into next-generation intelligent and application-specific I/O architectures to meet the demand of highend computing.  We propose a dynamic application-specific I/O architecture that tailors various parallel I/O optimizations based on I/O characteristics of applications. This architecture is dynamic in the sense that its underlying optimization strategies are able to adapt to the variations in different applications for best performance. The proposed research is twofold: 1) understanding I/O behavior, 2) developing application-specific optimizations for data layout, prefetching, and caching to form an integrated application-specific I/O architecture. Several technical hurdles have been identified, which include I/O access signature, compiler analysis, global-aware coordinated  caching, collective prefetching, data layout optimization and distribution strategies. Solutions are proposed and detailed plans are provided to test these newly proposed solutions and techniques under the PVFS2 parallel file system.</docText>
    <division>CCF</division>
    <directorate>CSE</directorate>
    <award-instr>Standard Grant</award-instr>
    <programreferencecode>HPCC</programreferencecode>
    <keyword>compiler</keyword>
    <keyword>architecture</keyword>
    <programreferencecode>9218</programreferencecode>
    <progmgr>Almadena Y. Chtchelkanova</progmgr>
    <fieldofapplication>0000912 Computer Science</fieldofapplication>
    <state>IL</state>
    <organization>Illinois Institute of Technology</organization>
    <pi>Sun, Xian-He</pi>
    <copi>William Gropp</copi>
    <copi>Rajeev Thakur</copi>
    <programelementcode>I159</programelementcode>
    <programreferencecode>hpcc</programreferencecode>
    <copi>Surendra Byna</copi>
    <amount>738000</amount>
  </document>
  <document>
    <docID>0937860</docID>
    <docDate>September 1, 2009</docDate>
    <docSource></docSource>
    <docText>HECURA: Colaborative: Multidimensional and String Indexes for Streaming Data

   This research project aims to understand and develop systems for  maintaining superlinear indexes for streaming data.  A superlinear  index provides search capability over an abstract space that cannot  easily be linearized (totally ordered). In contrast, a linear index,  typified by a B-tree, supports point and range queries on totally  ordered data.    Examples of superlinear indexes include multidimensional indexes,  which can be over a geometric domain, such as geographic data, or  which can be over multiple linear indexes; and full text queries,  which can include searching for a particular word or substring.    The superlinear indexes found in today's databases cannot support high  rates of insertion.  On traditional mechanical disk drives, the  existing superlinear indexes can only support about one hundred  insertions per second in the worst case.  For many important  applications, that is too slow, and so database users often avoid  superlinear indexing.  Even traditional linear indexes based on  B-trees cannot support the high insertion rates demanded by many  databases.    This research investigates streaming superlinear indexes, that is,  indexes that efficiently support full text or multidimensional  queries, and can be updated at speeds that are related to disk  bandwidth rather than seeks per second.    Among the significant research issues are the following: (1) design  efficient files structures for streaming superlinear indexes; (2)  investigate how streaming superlinear indexes might pave the way to  improved file systems; (3) determine whether cache-oblivious  algorithms technology can enhance streaming superlinear indexes; and  (4) program complex data structures for transactions and recovery.    If successful, this research will show how to build filesystems that  achieve dramatically better performance than today's B-tree-based  filesystems, how to maintain rich geometrical data and  multidimensional nongeographical databases in real time, and how to  maintain full-text searchable databases in real time.  For example,  some of today's file systems try to maintain an full-text index to  find strings in files quickly, but these systems often fall behind at  high data write rates.  A streaming superlinear index would allow such  a file system to keep up, and would improve the usability of both  high-end storage systems and relatively small consumer storage systems  that are nonetheless too large to index with today's indexes.    The researchers are developing course materials on streaming indexing  technology which will be made freely available under the MIT  OpenCourseWare initiative (http://ocw.mit.edu).    Further information on this project may be found at the project  web page:   http://supertech.csail.mit.edu/superlinear-indexes</docText>
    <keyword>algorithms</keyword>
    <division>CCF</division>
    <directorate>CSE</directorate>
    <award-instr>Standard Grant</award-instr>
    <programreferencecode>HPCC</programreferencecode>
    <programreferencecode>9216</programreferencecode>
    <organization>Massachusetts Institute of Technology</organization>
    <state>MA</state>
    <programreferencecode>9218</programreferencecode>
    <fieldofapplication>0000912 Computer Science</fieldofapplication>
    <keyword>database</keyword>
    <amount>600000</amount>
    <program>INFO INTEGRATION &amp; INFORMATICS</program>
    <programelementcode>7364</programelementcode>
    <pi>Leiserson, Charles</pi>
    <copi>Bradley Kuszmaul</copi>
    <progmgr>Frank Olken</progmgr>
  </document>
  <document>
    <docID>0937854</docID>
    <docDate>September 1, 2009</docDate>
    <docSource></docSource>
    <docText>Performance- and Energy-Aware HEC Storage Stacks

   High-End Computing (HEC) systems are designed for performance, not energy efficiency.  In recent years, HEC users have found that as energy costs increase, network and disks have become significant bottlenecks; worse, scientific workloads vary wildly, exercising different parts of HEC clusters, making it impossible to understand where the bottlenecks are and where energy is being wasted.    This project explores the impact of storage-stack configurations on power and performance, using actual cluster configurations and realistic scientific workloads.  The research follows three thrusts: tracing and analysis, adaptive cluster reconfiguration, and new storage software stacks.  (1) Traces are collected and analyzed which combine both performance and energy data on a large set of scientific workloads: I/O-, network-, memory-, and CPU-intensive.  Three popular scientific cluster configurations are investigated, varying many configuration parameters.  (2) Tools are being developed to dynamically adapt a cluster's configurations to a given workload, so as to optimize power and performance prior to running long-term scientific experiments or simulations.  (3) New operating systems software is developed specifically to optimize power and performance for scientific workloads: a new lightweight file system and disk I/O scheduler.    The long-term results of this project help society save energy in computing without unduly hurting performance.</docText>
    <division>CCF</division>
    <directorate>CSE</directorate>
    <award-instr>Standard Grant</award-instr>
    <programreferencecode>HPCC</programreferencecode>
    <keyword>network</keyword>
    <programreferencecode>9218</programreferencecode>
    <state>NY</state>
    <progmgr>Almadena Y. Chtchelkanova</progmgr>
    <fieldofapplication>0000912 Computer Science</fieldofapplication>
    <keyword>operating systems</keyword>
    <organization>SUNY at Stony Brook</organization>
    <pi>Zadok, Erez</pi>
    <programelementcode>I159</programelementcode>
    <programreferencecode>hpcc</programreferencecode>
    <copi>Geoffrey Kuenning</copi>
    <amount>652000</amount>
  </document>
  <document>
    <docID>0937850</docID>
    <docDate>September 1, 2009</docDate>
    <docSource></docSource>
    <docText>RUI: Automatic Identification of I/O Bottleneck and Run-time Optimization for Cluster Virtualization

   Extending virtualization technology into high-performance, cluster platforms generates exciting new possibilities. However, I/O efficiency in virtualized environments, specifically with respect to disk I/O, remains little understood and hardly tested. The objective of this research is to investigate fundamental techniques for virtual clusters that not only facilitate rigorous performance studies, but also identify places where performance is suffering and then optimize the system to lessen the impact of such bottlenecks.   This research will greatly contribute to understanding virtualized I/O, identifying I/O bottlenecks and optimizing I/O, and thus facilitate the cluster systems to most effectively utilize virtualization technology. This project will also contribute to the society through promoting research and engaging under-represented groups that leads students to advancing their careers in science and engineering.</docText>
    <division>CCF</division>
    <directorate>CSE</directorate>
    <award-instr>Standard Grant</award-instr>
    <programreferencecode>HPCC</programreferencecode>
    <programreferencecode>9218</programreferencecode>
    <progmgr>Almadena Y. Chtchelkanova</progmgr>
    <fieldofapplication>0000912 Computer Science</fieldofapplication>
    <state>TN</state>
    <program>EXP PROG TO STIM COMP RES</program>
    <programelementcode>9150</programelementcode>
    <programreferencecode>9150</programreferencecode>
    <program>HECURA</program>
    <programelementcode>7952</programelementcode>
    <programreferencecode>hpcc</programreferencecode>
    <pi>He, Xubin</pi>
    <copi>Stephen Scott</copi>
    <organization>Tennessee Technological University</organization>
    <amount>299049</amount>
  </document>
  <document>
    <docID>0937832</docID>
    <docDate>September 15, 2009</docDate>
    <docSource></docSource>
    <docText>Collaborative Research: Programming Models and Storage System for High Performance Computation with Many-Core Processors

   Abstract  A major challenge for future High End Computing (HEC) systems built using many-core chips is the storage system since the available memory and bandwidth per processor core is starting to decline at an alarming rate, with the rapid increase in the number of cores per chip. Data-intensive applications that require large data sets and/or high input-output bandwidth will be especially vulnerable to these trends. Historically, the storage architecture of an HEC system has been constrained to a large degree by the filesystem interfaces in the underlying Operating System (OS). The specific focus of this research is on exploring a new storage model based on write-once tree structures. This research will explore three programming models for users of the storage system, all of which can inter-operate through shared persistent data: 1) a declarative programming model in which any data structure can be directly made persistent in the storage system, with no programmer intervention, 2) a strongly-typed imperative programming model in which a type system extension will be used to enforce a separation between data structures that can be directly made persistent and those that cannot, and 3) a weakly-typed runtime interface that enables low-level C programs to access the storage system.</docText>
    <division>CCF</division>
    <directorate>CSE</directorate>
    <award-instr>Standard Grant</award-instr>
    <programreferencecode>HPCC</programreferencecode>
    <organization>Massachusetts Institute of Technology</organization>
    <state>MA</state>
    <keyword>architecture</keyword>
    <programreferencecode>9218</programreferencecode>
    <progmgr>Almadena Y. Chtchelkanova</progmgr>
    <fieldofapplication>0000912 Computer Science</fieldofapplication>
    <keyword>operating system</keyword>
    <amount>300000</amount>
    <program>SPECIAL PROJECTS - CISE</program>
    <programelementcode>1714</programelementcode>
    <programreferencecode>hpcc</programreferencecode>
    <pi>Dennis, Jack</pi>
  </document>
  <document>
    <docID>0937829</docID>
    <docDate>September 1, 2009</docDate>
    <docSource></docSource>
    <docText>HECURA: Colaborative: Multidimensional and String Indexes for Streaming Data

   This research project aims to understand and develop systems for  maintaining superlinear indexes for streaming data.  A superlinear  index provides search capability over an abstract space that cannot  easily be linearized (totally ordered). In contrast, a linear index,  typified by a B-tree, supports point and range queries on totally  ordered data.    Examples of superlinear indexes include multidimensional indexes,  which can be over a geometric domain, such as geographic data, or  which can be over multiple linear indexes; and full text queries,  which can include searching for a particular word or substring.    The superlinear indexes found in today's databases cannot support high  rates of insertion.  On traditional mechanical disk drives, the  existing superlinear indexes can only support about one hundred  insertions per second in the worst case.  For many important  applications, that is too slow, and so database users often avoid  superlinear indexing.  Even traditional linear indexes based on  B-trees cannot support the high insertion rates demanded by many  databases.    This research investigates streaming superlinear indexes, that is,  indexes that efficiently support full text or multidimensional  queries, and can be updated at speeds that are related to disk  bandwidth rather than seeks per second.    Among the significant research issues are the following: (1) design  efficient files structures for streaming superlinear indexes; (2)  investigate how streaming superlinear indexes might pave the way to  improved file systems; (3) determine whether cache-oblivious  algorithms technology can enhance streaming superlinear indexes; and  (4) program complex data structures for transactions and recovery.    If successful, this research will show how to build filesystems that  achieve dramatically better performance than today's B-tree-based  filesystems, how to maintain rich geometrical data and  multidimensional nongeographical databases in real time, and how to  maintain full-text searchable databases in real time.  For example,  some of today's file systems try to maintain an full-text index to  find strings in files quickly, but these systems often fall behind at  high data write rates.  A streaming superlinear index would allow such  a file system to keep up, and would improve the usability of both  high-end storage systems and relatively small consumer storage systems  that are nonetheless too large to index with today's indexes.    The researchers are developing course materials on streaming indexing  technology which will be made freely available under the MIT  OpenCourseWare initiative (http://ocw.mit.edu).    Further information on this project may be found at the project  web page:   http://supertech.csail.mit.edu/superlinear-indexes</docText>
    <keyword>algorithms</keyword>
    <division>CCF</division>
    <directorate>CSE</directorate>
    <award-instr>Standard Grant</award-instr>
    <programreferencecode>HPCC</programreferencecode>
    <programreferencecode>9216</programreferencecode>
    <state>NJ</state>
    <programreferencecode>9218</programreferencecode>
    <fieldofapplication>0000912 Computer Science</fieldofapplication>
    <keyword>database</keyword>
    <organization>Rutgers University New Brunswick</organization>
    <program>INFO INTEGRATION &amp; INFORMATICS</program>
    <programelementcode>7364</programelementcode>
    <pi>Farach-Colton, Martin</pi>
    <progmgr>Frank Olken</progmgr>
    <amount>200007</amount>
  </document>
  <document>
    <docID>0937822</docID>
    <docDate>September 1, 2009</docDate>
    <docSource></docSource>
    <docText>HECURA: Colaborative: Multidimensional and String Indexes for Streaming Data

   This research project aims to understand and develop systems for  maintaining superlinear indexes for streaming data.  A superlinear  index provides search capability over an abstract space that cannot  easily be linearized (totally ordered). In contrast, a linear index,  typified by a B-tree, supports point and range queries on totally  ordered data.    Examples of superlinear indexes include multidimensional indexes,  which can be over a geometric domain, such as geographic data, or  which can be over multiple linear indexes; and full text queries,  which can include searching for a particular word or substring.    The superlinear indexes found in today's databases cannot support high  rates of insertion.  On traditional mechanical disk drives, the  existing superlinear indexes can only support about one hundred  insertions per second in the worst case.  For many important  applications, that is too slow, and so database users often avoid  superlinear indexing.  Even traditional linear indexes based on  B-trees cannot support the high insertion rates demanded by many  databases.    This research investigates streaming superlinear indexes, that is,  indexes that efficiently support full text or multidimensional  queries, and can be updated at speeds that are related to disk  bandwidth rather than seeks per second.    Among the significant research issues are the following: (1) design  efficient files structures for streaming superlinear indexes; (2)  investigate how streaming superlinear indexes might pave the way to  improved file systems; (3) determine whether cache-oblivious  algorithms technology can enhance streaming superlinear indexes; and  (4) program complex data structures for transactions and recovery.    If successful, this research will show how to build filesystems that  achieve dramatically better performance than today's B-tree-based  filesystems, how to maintain rich geometrical data and  multidimensional nongeographical databases in real time, and how to  maintain full-text searchable databases in real time.  For example,  some of today's file systems try to maintain an full-text index to  find strings in files quickly, but these systems often fall behind at  high data write rates.  A streaming superlinear index would allow such  a file system to keep up, and would improve the usability of both  high-end storage systems and relatively small consumer storage systems  that are nonetheless too large to index with today's indexes.    The researchers are developing course materials on streaming indexing  technology which will be made freely available under the MIT  OpenCourseWare initiative (http://ocw.mit.edu).    Further information on this project may be found at the project  web page:   http://supertech.csail.mit.edu/superlinear-indexes</docText>
    <keyword>algorithms</keyword>
    <division>CCF</division>
    <directorate>CSE</directorate>
    <award-instr>Standard Grant</award-instr>
    <programreferencecode>HPCC</programreferencecode>
    <programreferencecode>9216</programreferencecode>
    <programreferencecode>9218</programreferencecode>
    <state>NY</state>
    <fieldofapplication>0000912 Computer Science</fieldofapplication>
    <organization>SUNY at Stony Brook</organization>
    <keyword>database</keyword>
    <pi>Bender, Michael</pi>
    <program>INFO INTEGRATION &amp; INFORMATICS</program>
    <programelementcode>7364</programelementcode>
    <amount>199993</amount>
    <progmgr>Frank Olken</progmgr>
  </document>
  <document>
    <docID>0937810</docID>
    <docDate>September 1, 2009</docDate>
    <docSource></docSource>
    <docText>CRAM:   A Congestion-Aware Resource and Allocation Manager for Data-Intensive High-Performance Computing

   This project will develop a job scheduling and resource allocation system for data-intensive high-performance computing (HPC) based on the congestion pricing of a systems' heterogeneous resources.  This extends the concept of resource management beyond processing: it allocates memory, disk I/O, and the network among jobs.  The research will overcome the critical shortcomings of processor-centric resource management, which wastes huge portions of cluster and supercomputer resources for data-intensive workloads, e.g. I/O bandwidth governs the performance of many modern HPC applications but, at present, it is neither allocated nor managed.  The research will develop techniques that (1) recon&amp;#64257;gure the degree of parallelism of HPC jobs to avoid congestion and wastage, (2) support lower-priority, allocation elastic jobs that can be scheduled on arbitrary numbers of nodes to consume unallocated resource fragments, and (3) co-schedule batch-processing workloads that use system resources that are unoccupied due to asymmetric utilization and temporal shifts in the foreground jobs.  These techniques will be implemented and supported for free public use as extensions to an open-source resource-management framework.  If used broadly, the software has the potential to provide much better utilization of the national investment in HPC facilities.</docText>
    <division>CCF</division>
    <directorate>CSE</directorate>
    <programreferencecode>HPCC</programreferencecode>
    <programreferencecode>9215</programreferencecode>
    <award-instr>Continuing grant</award-instr>
    <keyword>network</keyword>
    <state>MD</state>
    <programreferencecode>9218</programreferencecode>
    <progmgr>Almadena Y. Chtchelkanova</progmgr>
    <fieldofapplication>0000912 Computer Science</fieldofapplication>
    <keyword>high-performance computing</keyword>
    <organization>Johns Hopkins University</organization>
    <pi>Burns, Randal</pi>
    <program>HECURA</program>
    <programelementcode>7952</programelementcode>
    <copi>John Griffin</copi>
    <amount>195634</amount>
    <programelementcode>I159</programelementcode>
    <programreferencecode>hpcc</programreferencecode>
  </document>
  <document>
    <docID>0937562</docID>
    <docDate>July 15, 2009</docDate>
    <docSource></docSource>
    <docText>EAGER: Efficient Algorithms for Dimensionality Reduction and Clustering Using Disk-Based Matrices

   EAGER: Efficient Algorithms for Dimensionality Reduction and Clustering Using Disk-Based Matrices   Carlos Ordonez     1. Research and Education Proposal Linear Gaussian models on large data sets computation is characterized by heavy matrix manipulation and iterative methods with slow convergence. Efficiency issues become worse considering the fact that large data sets are stored and retrieved from disk and that in a database system models are manipulated on disk as well. Despite their importance there is scarce research work that attempts to adapt this big family of Gaussian models exploiting database systems techniques. This proposal studies how to improve algorithms for linear Gaussian models to analyze large, high dimensional, data sets, manipulating matrices on secondary storage (i.e. disk), using a small amount of primary storage (i.e. RAM memory). The models studied herein include maximum likelihood factor analysis for dimensionality reduction and mixtures of Gaussian distributions to perform clustering.     The educational component of this proposal involves two main activities. The rst activity is to develop a plan to expose disadvantaged and minority high school students to data mining research and practice in order to encourage them to study computer science. The second activity involves enhancing current research and teaching of data mining at the University of Houston.     2. Intellectual Merit   This research project requires the discovery of common algorithmic principles to perform incremental matrix computations for a family of statistical models, understanding how to summarize large data sets, preserving their statistical properties required by multiple models and proposing new database techniques tailored for such models, capable of performing efficient matrix manipulation   on secondary storage. Incremental computations are difficult to attain because methods for linear Gaussian models require iterations on the entire data set. Summarization requires transforming complex matrix equations considering high dimensionality, large data set size and numerical stability, preserving model accuracy. Developing matrix optimizations combining primary and secondary   storage is quite di erent from optimizing a matrix algorithm that works only on primary storage.     This research work requires mathematical knowledge to generalize, optimize and transform the computation of linear Gaussian models. On the other hand, it needs database systems expertise on how to organize and index diverse matrices on secondary storage for effecient reading and writing.     3. Broader Impact   This proposal will have a broad impact on the analysis of large, complex, high dimensional scientic data sets and enhancing database systems with incremental model computation capabilities. We plan to apply and test our proposed algorithms and techniques on scienti c data sets, including geographical, medical and biological data sets, among others.</docText>
    <keyword>algorithms</keyword>
    <division>CCF</division>
    <directorate>CSE</directorate>
    <state>TX</state>
    <award-instr>Standard Grant</award-instr>
    <programreferencecode>HPCC</programreferencecode>
    <programreferencecode>9218</programreferencecode>
    <fieldofapplication>0000912 Computer Science</fieldofapplication>
    <keyword>education</keyword>
    <keyword>database</keyword>
    <keyword>data mining</keyword>
    <amount>100000</amount>
    <progmgr>Lenore M. Mullin</progmgr>
    <organization>University of Houston</organization>
    <program>NUM, SYMBOL, &amp; ALGEBRA COMPUT</program>
    <programelementcode>7933</programelementcode>
    <programreferencecode>7916</programreferencecode>
    <pi>Ordonez, Carlos</pi>
  </document>
  <document>
    <docID>0937476</docID>
    <docDate>June 1, 2009</docDate>
    <docSource></docSource>
    <docText>Support for the 36th International Symposium on Computer Architecture (ISCA), June 9, 2009, Austin, TX

   The International Symposium on Computer Architecture (ISCA) is a premier forum for presenting, discussing and debating new and innovative architectural ideas and techniques for advanced computing and communication systems. This symposium brings together researchers in fields related to processor architecture, compilers, chips and systems, for technical exchange on current areas of architectural challenge. This proposal aims to support this highly regarded conference by obtaining travel support for students in order to defray the costs of attending and participating in the ISCA conference in June, 2009 in Austin, TX.     The PIs propose to provide travel support in the approximate amount of $15,000 for around 40 U.S.-based student (at least $300 each).  The vast majority of the awards will be granted to Ph.D. students. Priority will be granted to students who have authored papers accepted for presentation at the conference or its joint workshops, in particular those students without existing travel support.</docText>
    <division>CCF</division>
    <directorate>CSE</directorate>
    <award-instr>Standard Grant</award-instr>
    <programreferencecode>HPCC</programreferencecode>
    <keyword>architecture</keyword>
    <programreferencecode>9218</programreferencecode>
    <state>NY</state>
    <progmgr>Almadena Y. Chtchelkanova</progmgr>
    <fieldofapplication>0000912 Computer Science</fieldofapplication>
    <amount>15000</amount>
    <organization>Columbia University</organization>
    <program>COMPUTER ARCHITECTURE</program>
    <programelementcode>7941</programelementcode>
    <pi>Kim, Martha</pi>
  </document>
  <document>
    <docID>0937472</docID>
    <docDate>August 15, 2009</docDate>
    <docSource></docSource>
    <docText>Reliability Analysis for Software Product Line Architectures

   The primary goal of this research is to explore new methodologies that support building reliability into the design of software product families. This enables a sufficient formal foundation to compare design alternatives early and throughout the software development. There are several notable challenges, among them the unsuitability of existing reliability modeling approaches for product families due to their inability to handle architectural change and leverage reuse effectively. The relationships and dependencies among products within the family further complicate the matter.  The project will: 1) Extend existing (primarily) structural product line architecture modeling and analysis approaches with rich behavioral constructs, and corresponding analyses; 2) develop architecture-based approaches to reliability modeling of software product families; 3) research the interactions between different products reliabilities within a family of software products; 4) develop a decision support system that embodies these principles to compare alternative design choices based on their impact on the reliability of specific products, as well as the reliability of other products within the family. Evaluation of the methods will be performed in collaboration with NASA/JPL to demonstrate broader impacts.</docText>
    <division>CCF</division>
    <directorate>CSE</directorate>
    <award-instr>Standard Grant</award-instr>
    <programreferencecode>HPCC</programreferencecode>
    <keyword>architecture</keyword>
    <programreferencecode>9218</programreferencecode>
    <fieldofapplication>0000912 Computer Science</fieldofapplication>
    <state>WA</state>
    <progmgr>Sol J. Greenspan</progmgr>
    <program>SOFTWARE ENG &amp; FORMAL METHODS</program>
    <programelementcode>7944</programelementcode>
    <programreferencecode>7916</programreferencecode>
    <pi>Roshandel, Roshanak</pi>
    <organization>Seattle University</organization>
    <amount>90466</amount>
  </document>
  <document>
    <docID>0937265</docID>
    <docDate>July 1, 2009</docDate>
    <docSource></docSource>
    <docText>Funding to Support Student Attendees to PLDI 2009

   This proposal requests funds for student travel to the Programming Language Design and Implementation (PLDI) conference in Dublin, Ireland.   This is an important conference for students in the programming language research area.  Student attendance provides an international experience for the students and helps build a community that will become the next generation of global researchers.</docText>
    <division>CCF</division>
    <directorate>CSE</directorate>
    <award-instr>Standard Grant</award-instr>
    <programreferencecode>HPCC</programreferencecode>
    <programreferencecode>9218</programreferencecode>
    <organization>Association Computing Machinery</organization>
    <state>NY</state>
    <fieldofapplication>0000912 Computer Science</fieldofapplication>
    <amount>15000</amount>
    <progmgr>Sol J. Greenspan</progmgr>
    <pi>Diwan, Amer</pi>
    <program>PROGRAMMING LANGUAGES</program>
    <programelementcode>7943</programelementcode>
  </document>
  <document>
    <docID>0937139</docID>
    <docDate>September 1, 2009</docDate>
    <docSource></docSource>
    <docText>Interactive Discovery and Semantic Labeling of Patterns in Spatial Data

       Finding and labeling semantic patterns in large, spatial data sets is one of the most important problems facing computer scientists today.  Massive spatial data sets are being acquired in almost every scientific discipline, such as medicine, geology, biology, astrophysics, and others.  Finding meaningful patterns in those data is often the bottleneck to scientific discovery.  The proposed research is to develop a transformative machine learning methodology, where the process of discovering semantic patterns in large spatial data sets is interactive and semi-autonomous.  With the proposed tools and algorithms, the user is provided with an interactive system that shows the most likely segmentations and labelings given the information provided so far, but allows the user to provide additional information as he/she sees fit. The user might adjust a segmentation, provide a label, or specify an expected pattern.  The system will adapt in real time to each of these inputs, thus adjusting its predictions throughout the data.          The broad impact of the proposed plan will be enhanced through an integrated educational and outreach plan. Besides the published results of research results, the field will benefit from free distribution of research and education resources, including web pages, bibliographies, software, and data sets, including augmentations to WordNet.  Further broad impacts include focused workshops and courses on shape analysis, machine learning, and visualization at both the university and professional levels.  Finally, diversity enhancement programs will promote the opportunities for disadvantaged groups in research.</docText>
    <keyword>algorithms</keyword>
    <division>CCF</division>
    <directorate>CSE</directorate>
    <award-instr>Standard Grant</award-instr>
    <programreferencecode>HPCC</programreferencecode>
    <keyword>visualization</keyword>
    <state>NJ</state>
    <programreferencecode>9218</programreferencecode>
    <fieldofapplication>0000912 Computer Science</fieldofapplication>
    <progmgr>Sankar Basu</progmgr>
    <keyword>education</keyword>
    <organization>Princeton University</organization>
    <keyword>machine learning</keyword>
    <pi>Funkhouser, Thomas</pi>
    <program>FOUNDATIONS VISUAL ANALYTICS</program>
    <programelementcode>7703</programelementcode>
    <copi>Adam Finkelstein</copi>
    <copi>Christiane Fellbaum</copi>
    <copi>David Blei</copi>
    <amount>499934</amount>
  </document>
  <document>
    <docID>0937133</docID>
    <docDate>September 15, 2009</docDate>
    <docSource></docSource>
    <docText>Formal Models, Algorithms, and Visualizations for Storytelling Analytics

   Modern direct manipulation and visualization systems have made key strides in bringing powerful data transformations and algorithms to the analyst's desktop.  But to further promote the vision of powerful visual analytics, wherein automated algorithms and visual representations complement each other to yield new insight, we must continually increase the expressiveness with which analysts interact with data.  This project focuses on the task of storytelling, that is to say the stringing together of seemingly unconnected pieces of data into a coherent thread or argument.  To support storytelling, which requires both human judgment and algorithmic assistance, the PIs will first develop a new theory of relational redescriptions that provides a uniform way to describe data and to compose data transformation algorithms across a multitude of domains.  Using this theory, the PIs will be able to define stories formally as compositions of relational redescriptions.  They will develop scalable and steerable algorithms for storytelling that will respond to dynamic user input, such as preferences and constraints, and they will contextualize their use in interactive visualizations that harness the power of spatial layout.  Finally, they will investigate how analysts engage in sense-making using the new storytelling algorithms and visualizations, in the hope of finding answers to questions such as: How do analysts achieve insight and advance their conceptualization of patterns derived from datasets?  Project outcomes will include the formal conceptualization of storytelling as well as the compositional approach to building complex chains of inference.    Broader Impacts:  This research will make it easier for analysts to interactively explore connections in large-scale heterogeneous datasets.  The PIs will work with the FODAVA-lead team at Georgia Tech and PNNL's NVAC to investigate applications of relational redescriptions and storytelling to domains of interest to NSF and DHS, and will develop in consultation with real users across these groups a layered software framework for storytelling (both analysis and visualization) capabilities; the framework will be released into the public domain under the GNU GPL/Lesser GNU GPL license, and APIs will be provided that allow analysts to tailor it to suit their needs.  Although this project will focus on cyber-analytics scenarios such as those motivated by the VAST 2009 challenge, project outcomes will generalize across other domains such as bioinformatics, systems biology, electronic commerce, and social networks.  The unified notion of redescriptions will help integrate multiple data sources (numeric, symbolic, textual, and categorical), and situate them on a common footing for visual analytics; it will also enable visual analysts from different application domains to use a common vocabulary while interacting with one other.</docText>
    <keyword>algorithms</keyword>
    <division>CCF</division>
    <directorate>CSE</directorate>
    <award-instr>Standard Grant</award-instr>
    <programreferencecode>HPCC</programreferencecode>
    <keyword>visualization</keyword>
    <programreferencecode>9218</programreferencecode>
    <fieldofapplication>0000912 Computer Science</fieldofapplication>
    <state>VA</state>
    <keyword>vision</keyword>
    <keyword>bioinformatics</keyword>
    <program>GRAPHICS &amp; VISUALIZATION</program>
    <programelementcode>7453</programelementcode>
    <organization>Virginia Polytechnic Institute and State University</organization>
    <fieldofapplication>0116000 Human Subjects</fieldofapplication>
    <program>MSPA-INTERDISCIPLINARY</program>
    <programelementcode>7454</programelementcode>
    <program>FOUNDATIONS VISUAL ANALYTICS</program>
    <programelementcode>7703</programelementcode>
    <keyword>visual analytics</keyword>
    <programreferencecode>7703</programreferencecode>
    <progmgr>Ephraim P. Glinert</progmgr>
    <pi>Ramakrishnan, Naren</pi>
    <copi>Francis Quek</copi>
    <copi>Christopher North</copi>
    <amount>494838</amount>
  </document>
  <document>
    <docID>0937123</docID>
    <docDate>September 1, 2009</docDate>
    <docSource></docSource>
    <docText>Scalable Visualization and Model Building

   Title: Scalable Visualization and Model Building  PI: Cleveland, William S. [Purdue University]    Developing new algorithms, visualization tools, and mathematical models that can predict and explain patterns in data is fundamental to machine learning and statistics.  They enable a predictive modeling that is fundamental to science and engineering. Visualization is critical in all phases of data analysis, from the moment the data are collected when data checking and cleaning are needed, to the final presentation of results. Visualization facilitates model building by allowing the analyst to critically assess the predictive power of a model, and to diagnose problems in fitting the patterns in the data. The investigators are carrying out research in approaches, methods, and models for describing patterns in data with a strong emphasis on visualization and on comprehensive analysis of massive datasets.    The research is addressing two broad topics. One is a framework for the integration of visual analysis and statistical modeling.  We envision a system that facilities an iterative modeling process.  The modeling cycle includes multiple stages, starting with descriptive visualization, then model selection, model fitting, diagnosis and evaluation, and finally iterative model refinement.  The second topic is a general approach to visualization and modeling that scales from small to massive datasets, and the development of new methods specifically for the scaling of data visualization.  We approach scaling by partitioning the data into subsets, sampling the subsets, and applying modeling and visualization to each subset. The investigators are carrying out the research in the context of two challenging data analysis projects in homeland security: (1) Daily counts of chief complaints from 76 emergency departments of the Indiana Public Health Emergency Surveillance System; and (2) Internet packet traces for network security that we collect on the campuses of Purdue University and Stanford University.</docText>
    <keyword>algorithms</keyword>
    <division>CCF</division>
    <directorate>CSE</directorate>
    <award-instr>Standard Grant</award-instr>
    <programreferencecode>HPCC</programreferencecode>
    <keyword>visualization</keyword>
    <keyword>network</keyword>
    <keyword>security</keyword>
    <programreferencecode>9218</programreferencecode>
    <organization>Purdue University</organization>
    <state>IN</state>
    <fieldofapplication>0000912 Computer Science</fieldofapplication>
    <progmgr>Lawrence Rosenblum</progmgr>
    <keyword>machine learning</keyword>
    <keyword>data analysis</keyword>
    <program>GRAPHICS &amp; VISUALIZATION</program>
    <programelementcode>7453</programelementcode>
    <amount>500000</amount>
    <program>MSPA-INTERDISCIPLINARY</program>
    <programelementcode>7454</programelementcode>
    <program>FOUNDATIONS VISUAL ANALYTICS</program>
    <programelementcode>7703</programelementcode>
    <programreferencecode>7703</programreferencecode>
    <pi>Cleveland, William</pi>
  </document>
  <document>
    <docID>0937044</docID>
    <docDate>October 1, 2009</docDate>
    <docSource></docSource>
    <docText>Visualization of Analytical Procsses

   There is currently a major discrepancy between the dramatic improvements in hardware for sensing, communication, and storage of raw data and the capacity of humans to analyze and act on this data in a meaningful way.  There is every reason to believe that this development will continue in the near future, given the revolutionary changes to hardware and software in the World Wide Web, the Sensor Web, the network of hand-held and mobile devices, and the Smart Grid.  The PIs argue that improvements in the science and technology for integrating and combining analytical processing and human-computer interaction are urgently needed, so that human decision making is not overwhelmed by the flood of raw data.  With that goal in mind, in this project they will develop novel mathematical, computational, and visualization methods, such that analytical processing is done partly by the computer and partly by the human, with visualization playing a central role in the communication and collaboration between the two parties.  Specifically, the PIs will explore ways to integrate mosaic-based visualization and analytical processing by means of graphical models that contain thousands or millions of random variables, so as to both improve analytical learning and monitoring by human decision makers.  The PIs will create feature transformation and data synthesis techniques based on probabilistic graphical models including Bayesian networks, and emphasizing multi-objective abstraction and refinement.  The domain-independent techniques to be developed will be applied to electrical power systems as a test bed.      Broader Impacts:  It is difficult for humans to reason under uncertainty, all the more so when they are under time pressure or stress and when there are massive amounts of data to cope with.  Visualization of uncertainty has been shown to improve human performance, and there has been substantial progress in the areas of learning and reasoning using probabilistic graphical models, including Bayesian networks and Markov networks.  By integrating uncertainty visualization and uncertainty processing, this research will dramatically compress the time it takes humans to make decisions under uncertainty in complex domains, will improve the quality of the decisions made, and will reduce the effort or cost associated with these analytical processes.  The project's focus on electrical power system is due to the domain's importance in aerospace vehicles as well as to the urgency of creating a smart electrical grid in response to the climate change and energy crises.</docText>
    <division>CCF</division>
    <directorate>CSE</directorate>
    <award-instr>Standard Grant</award-instr>
    <programreferencecode>HPCC</programreferencecode>
    <keyword>visualization</keyword>
    <keyword>network</keyword>
    <programreferencecode>9218</programreferencecode>
    <fieldofapplication>0000912 Computer Science</fieldofapplication>
    <state>PA</state>
    <organization>Carnegie-Mellon University</organization>
    <keyword>human-computer interaction</keyword>
    <program>FOUNDATIONS VISUAL ANALYTICS</program>
    <programelementcode>7703</programelementcode>
    <pi>Mengshoel, Ole</pi>
    <copi>Marija Ilic</copi>
    <copi>Edwin Selker</copi>
    <progmgr>Ephraim P. Glinert</progmgr>
    <amount>497401</amount>
  </document>
  <document>
    <docID>0936948</docID>
    <docDate>September 15, 2009</docDate>
    <docSource></docSource>
    <docText>New Geometric Methods of Mixture Models for Interactive Visualization

   This research project will extend the theoretical foundations of mixture modeling for statistical learning by novel mathematical tools that can probe into the precise geometry of mixture models.  Based on the theoretical results, the investigators will develop new approaches to clustering, dimension reduction, variable selection, and temporal analysis.  These methods will open promising paths for interactively visualizing complex data and for data summarization.  A suite of statistical tools will be integrated as the technical backbone into a new visualization system. Applications to very large-scale, high dimensional, and temporally evolving data will be explored.  The principal investigators, with complementary backgrounds in theoretical statistics, computational statistics, and information visualization, will also work with colleagues across multiple departments at Penn State University to test their methods and prototype systems using real-world data sets.    In a plethora of scientific and engineering areas with direct and tremendous impacts on our everyday life, such as extreme weather prediction and manufacturing engineering design, researchers are facing gigantic amount of data with great complexity in terms of dimensionality, data types, statistical dependence, and temporal variations.  Visualization has played important roles in support of analyzing complex data.  Visualization systems help users increase available spatial and cognitive resources, improve searching, enhance pattern recognition, and ultimately make sense of abstract phenomena.  This research project aims at fundamentally advancing the mathematical core of visualization systems. The investigators take a probabilistic framework to model data, specifically the mixture model. Mixture modeling provides a highly flexible and theoretically solid basis for summarizing data and automatically extracting patterns from data. This project will develop theories and algorithms for mixture modeling and exploit them to construct new statistical learning and data mining techniques.  These statistical methods will thoroughly change the ways visualization systems are designed, offering more functions as well as better functions.  Software packages for advanced methods of statistical learning and interactive visualization will be developed and distributed for public use.  The proposed research on data visualization and modeling techniques are expected to affect a wide range of fields in science, engineering, and commerce.  The applications to hurricane forecast and engineering design can deeply influence our daily life.</docText>
    <keyword>algorithms</keyword>
    <division>CCF</division>
    <directorate>CSE</directorate>
    <award-instr>Standard Grant</award-instr>
    <programreferencecode>HPCC</programreferencecode>
    <keyword>visualization</keyword>
    <programreferencecode>9218</programreferencecode>
    <fieldofapplication>0000912 Computer Science</fieldofapplication>
    <state>PA</state>
    <progmgr>Lawrence Rosenblum</progmgr>
    <organization>Pennsylvania State Univ University Park</organization>
    <keyword>data mining</keyword>
    <program>GRAPHICS &amp; VISUALIZATION</program>
    <programelementcode>7453</programelementcode>
    <keyword>information visualization</keyword>
    <program>MSPA-INTERDISCIPLINARY</program>
    <programelementcode>7454</programelementcode>
    <program>FOUNDATIONS VISUAL ANALYTICS</program>
    <programelementcode>7703</programelementcode>
    <programreferencecode>7703</programreferencecode>
    <pi>Li, Jia</pi>
    <copi>Bruce Lindsay</copi>
    <copi>Xiaolong (Luke) Zhang</copi>
    <amount>497973</amount>
  </document>
  <document>
    <docID>0936830</docID>
    <docDate>September 15, 2009</docDate>
    <docSource></docSource>
    <docText>Differential geometry approach for  virus surface formation, evolution and visualization

   Viruses are contagious agents and can cause  epidemics and pandemics. The importance of the prevention and control of viral epidemics and pandemics to homeland security and daily life cannot be overemphasized. Viruses cannot grow and/or reproduce outside host cells. Their infection starts with the attachment of a virus on the host cell surface, with possible fusion of viral capsid surface and the host cellular membrane, followed by virus penetration into the host cell. These processes involve mostly non-bonding interactions between the virus capsid surface and the aquatic environment, as well as the host surface membrane or receptor. It is imperative to understand the molecular mechanism of  virus attachment on its host cell, the movement of virus fusion with cellular membrane, and the dynamics of virus penetration into its host cell. The prerequisites to these studies are efficient  mathematical and computational techniques for virus surface construction, evolution and visualization, and analysis of the virus's non-bonding interactions with its host cell. Unfortunately, an average virus comprises millions of atoms, and virus dynamics involves an additional number of degrees of freedom due to its environment and host cell. The exceptionally massive data sets in virus systems pose severe challenges to full-atomic scale virus surface formation, visualization and virus interaction analysis. Therefore, the real time dynamic simulation of viral attachment, fusion and penetration of a host cell in the aquatic environment requires microsecond or millisecond simulation time and is technically intractable with full-atom models at present.    The proposed project addresses these challenges by developing a multiscale framework which reduces the problem dimensionality by a  macroscopic continuum description of the aquatic  environment, and a  microscopic discrete description of virus atoms. To further reduce the size of virus data for excessively large viruses, a  coarse-grain particle description based on amino acid residues is built into our multiscale framework. A total free energy functional is introduced to bring the macroscopic  surface tension and microscopic potential interactions into the same footing.  The differential geometry theory of surfaces raises naturally for the description of the interface between macroscopic and microscopic domains. Potential driven geometric flows are constructed to minimize the total free energy functional. A hybrid Eulerian-Lagrangian method is developed based on the geometric measure theory to accelerate the surface construction involving topological changes.  In addition to promising preliminary results illustrating the power of this approach, extensive validation and applications are proposed to ensure that this methodology yields robust and powerful tools for virus surface construction, visualization, evolution, and dynamics.</docText>
    <division>CCF</division>
    <directorate>CSE</directorate>
    <programreferencecode>HPCC</programreferencecode>
    <keyword>visualization</keyword>
    <state>MI</state>
    <award-instr>Continuing grant</award-instr>
    <keyword>security</keyword>
    <programreferencecode>9218</programreferencecode>
    <fieldofapplication>0000912 Computer Science</fieldofapplication>
    <keyword>simulation</keyword>
    <program>GRAPHICS &amp; VISUALIZATION</program>
    <programelementcode>7453</programelementcode>
    <organization>Michigan State University</organization>
    <program>MSPA-INTERDISCIPLINARY</program>
    <programelementcode>7454</programelementcode>
    <program>FOUNDATIONS VISUAL ANALYTICS</program>
    <programelementcode>7703</programelementcode>
    <pi>Wei, Guowei</pi>
    <copi>Yang Wang</copi>
    <copi>Yiying Tong</copi>
    <progmgr>Tie Luo</progmgr>
    <amount>160150</amount>
    <programreferencecode>7703</programreferencecode>
  </document>
  <document>
    <docID>0936700</docID>
    <docDate>September 1, 2009</docDate>
    <docSource></docSource>
    <docText>EAGER: An Energy-Driven Point Design Study for Exascale Computing

   The NSF and other Federal agencies will require further understanding of concepts, methods, and means for Exascale computing systems before formulation of future programs in enabling technologies, architectures, and methodologies. NSF supports a targeted two-year program of investigation, The Exascale Point-design Study, to provide sufficient depth and detail of understanding of the interrelationships among possible enabling technologies, implementation architectures and operating system software, and programming interfaces and methodologies.    Working in consultation with LSU, USC, UIUC, UD, and Sandia National Laboratory (under DOE sponsorship), UT-Austin team focuses on energy efficiency as a key driver for Exascale systems. The PIs plan to investigate processor, memory system, and interconnect architectures that enable the exploitation of temporal and spatial locality, even when traditional memory hierarchies perform poorly. They plan to further investigate the use of hardware specialization as a means to accelerate critical components of applications in an energy-efficient fashion. UT-Austin plans to devise an Exascale architecture derived from prior research conducted under NSF, DOE, and DARPA sponsorship, reflecting some of the best-known principles and practices envisioned for hardware and software at the Exaflops scale.</docText>
    <division>CCF</division>
    <directorate>CSE</directorate>
    <state>TX</state>
    <award-instr>Standard Grant</award-instr>
    <programreferencecode>HPCC</programreferencecode>
    <keyword>architecture</keyword>
    <programreferencecode>9218</programreferencecode>
    <progmgr>Almadena Y. Chtchelkanova</progmgr>
    <fieldofapplication>0000912 Computer Science</fieldofapplication>
    <keyword>operating system</keyword>
    <organization>University of Texas at Austin</organization>
    <pi>Keckler, Stephen</pi>
    <program>HIGH-PERFORMANCE COMPUTING</program>
    <programelementcode>7942</programelementcode>
    <program>STRATEGIC TECHNOLOGIES FOR CI</program>
    <programelementcode>7684</programelementcode>
    <programreferencecode>7916</programreferencecode>
    <programreferencecode>7684</programreferencecode>
    <amount>199851</amount>
  </document>
  <document>
    <docID>0936391</docID>
    <docDate>August 1, 2009</docDate>
    <docSource></docSource>
    <docText>WORKSHOP: SRC/NSF Forum on 2020 Semiconductor Memory Strategies: Processes, Devices, and Architectures, September, 2009.

   CCF - 0936391    Title: SRC/NSF Forum on 2020 Semiconductor Memory Strategies: Processes, Devices, and Architectures  PI name: Victor Zhirnov       Inst: Semiconductor Research Corporation     ABSTRACT  This workshop proposal has been initiated by the Semiconductor Research Corporation (SRC) and is part of an ongoing attempt to periodically examine and evaluate the needs of the NSF/SRC research community to identify the future directions of the field of microelectronic design automation. This particular proposal is for supporting a workshop on the topic of novel memory technologies. In particular, recent  discovery of a new memory device called the ?Memristors? inspired this workshop, but a broader set of issues having to do with design technologies pertaining to advances in memory technology  and their continuous scaling behaviors will also be discussed.    The Semiconductor Research Corporation (SRC) is a nonprofit consortium of design automation industries. In recent years, it has taken a major role in chalking out the future technology paths and the requirements of industry by publishing the so called ITRS roadmap. While the ITRS roadmap has been a guiding principle for industry, a similar agenda for university researchers seem to be absent at the present time. The workshop is supposed to fill this void for university researchers, by identifying an agenda for longer term research in the domain of memory technologies.</docText>
    <division>CCF</division>
    <directorate>CSE</directorate>
    <award-instr>Standard Grant</award-instr>
    <programreferencecode>HPCC</programreferencecode>
    <programreferencecode>9218</programreferencecode>
    <fieldofapplication>0000912 Computer Science</fieldofapplication>
    <state>NC</state>
    <progmgr>Sankar Basu</progmgr>
    <organization>Semiconductor Research Corporation</organization>
    <program>DES AUTO FOR MICRO &amp; NANO SYST</program>
    <programelementcode>7945</programelementcode>
    <pi>Zhirnov, Victor</pi>
    <amount>49440</amount>
  </document>
  <document>
    <docID>0934631</docID>
    <docDate>January 1, 2009</docDate>
    <docSource></docSource>
    <docText>CPA-CPL-T: Programming Models for Transactional Memory

   Adoption of multi-core architectures brings a shift to parallel programming as the default model for mainstream software development.  Industry and academia alike are designing and implementing languages, runtime systems, and architectures to enable and leverage this shift.  One of the foremost technologies to emerge from this effort is transactional memory (TM). Transactional memory offers a new paradigm for expressing general-purpose multithreaded applications safely and efficiently.  Although much research effort has focused on implementing transactions, relatively less emphasis has been placed on the problem of defining appropriate programming models for transactional memory. This is a research problem of great practical interest, but also significant difficulty, as its interconnected components span the traditional areas of language implementation (compilers), language design, and software engineering.    This research explores the issue of programming models for transactional memory. First, the investigators evaluate and refine a programming model for allowing a transaction to perform irreversible operations and to coordinate with other threads. The main concept is that of "transaction punctuation" and supports controlled relaxation of transactional guarantees and local reasoning about the effects of other threads.   Second, the research examines a hybrid programming model, where a transactional implementation is fitted on a lock-like interface. This approach is suitable both for existing lock-based applications, and for new ones where the programmer has the ability to label critical sections with specific locks. The result is an adaptive combination of the performance advantages of both locks and transactions. Finally, the inestigators study "open-nesting" transactional programming models.  Open-nesting is a TM model offering high performance, but at the expense of significant programmer effort. The research evolves and generalizes guidelines for correct open-nesting usage, avoiding counter-intuitive behavior.</docText>
    <division>CCF</division>
    <directorate>CSE</directorate>
    <programreferencecode>HPCC</programreferencecode>
    <state>MA</state>
    <program>ADVANCED COMP RESEARCH PROGRAM</program>
    <programelementcode>4080</programelementcode>
    <award-instr>Continuing grant</award-instr>
    <programreferencecode>9218</programreferencecode>
    <keyword>software engineering</keyword>
    <progmgr>Almadena Y. Chtchelkanova</progmgr>
    <fieldofapplication>0000912 Computer Science</fieldofapplication>
    <organization>University of Massachusetts Amherst</organization>
    <program>COMPILERS</program>
    <programelementcode>7329</programelementcode>
    <pi>Smaragdakis, Yannis</pi>
    <amount>330291</amount>
  </document>
  <document>
    <docID>0934447</docID>
    <docDate>May 1, 2009</docDate>
    <docSource></docSource>
    <docText>Collaborative Research:  An Efficient Programming Model for HPC Application on Next-Generation High-End Parallel Machines

   Next-generation high-end machines will include interconnected computer nodes, each having heterogeneous accelerators and multi-core CPUs with complex memory hierarchy. They demand a programming model with a unified abstraction for programming dramatically different on-chip and off-chip parallel processing capabilities. None of the existing models is suitable for this need. The most fundamental challenge here is natural expression of parallelism in applications and efficient mapping of such parallelism to the hardware, including data distribution, locality, communication, synchronization, and load balancing.     This collaborative research between Syracuse University and Sandia Labs aims at developing an efficient programming model for high performance computing (HPC) applications using multi-core and heterogeneous processors. The specific goal of this study is to develop a high-level parallel programming abstraction with new high-level language constrctions, data types, and runtime library. Hardware features such as cores, memory hierarchy, processor heterogeneity, and interconnection will be embedded in the semantics of the language constructs and data types. The programming abstraction will guide the design and expression of parallel algorithms in the high-level language, mapped automatically onto the hardware for efficient execution. Users will be free from the low-level hardware details. The approaches include: memory virtualization,communication virtualization and processors virtualization.</docText>
    <keyword>algorithms</keyword>
    <division>CCF</division>
    <directorate>CSE</directorate>
    <programreferencecode>HPCC</programreferencecode>
    <programreferencecode>9218</programreferencecode>
    <progmgr>Almadena Y. Chtchelkanova</progmgr>
    <fieldofapplication>0000912 Computer Science</fieldofapplication>
    <programreferencecode>9150</programreferencecode>
    <state>DC</state>
    <award-instr>Interagency Agreement</award-instr>
    <amount>50000</amount>
    <program>HECURA</program>
    <programelementcode>7952</programelementcode>
    <pi>Wen, Zhaofang</pi>
    <organization>Dept of Energy/National Nuclear Security Administration</organization>
  </document>
  <document>
    <docID>0934429</docID>
    <docDate>July 1, 2009</docDate>
    <docSource></docSource>
    <docText>WORKSHOP: Theory and Practice of Language Implementation

   This grant supports participant costs for students to attend a Summer School on Theory and Practice of Language Implementation during the summer of 2009.  The workshop affords students an opportunity to study leading edge topics with first-rate faculty, and the summer school provides a setting for building a community that will become the next generation of computer science researchers.       Sol J. Greenspan, Ph.D.   CISE/CCF</docText>
    <division>CCF</division>
    <directorate>CSE</directorate>
    <award-instr>Standard Grant</award-instr>
    <programreferencecode>HPCC</programreferencecode>
    <programreferencecode>9218</programreferencecode>
    <fieldofapplication>0000912 Computer Science</fieldofapplication>
    <amount>15000</amount>
    <state>OR</state>
    <progmgr>Sol J. Greenspan</progmgr>
    <organization>University of Oregon Eugene</organization>
    <pi>Ariola, Zena</pi>
    <program>PROGRAMMING LANGUAGES</program>
    <programelementcode>7943</programelementcode>
    <copi>Matthew Fluet</copi>
    <copi>Yannis Smaragdakis</copi>
  </document>
  <document>
    <docID>0934110</docID>
    <docDate>April 15, 2009</docDate>
    <docSource></docSource>
    <docText>East Coast Computer Algebra Day 2009

   PROJECT SUMMARY      The Sixteenth Annual East Coast Computer Algebra Day (ECCAD?2009) will be held at the University of Rhode Island in Kingston on Saturday, May 2, 2009.  The purpose of the meeting is to stimulate interest and enhance understanding of the technical and applied aspects of computer algebra.  The conference provides a forum for those interested in becoming more active in computer algebra to participate, interact, and meet with others in an inexpensive and easily accessible way.  ECCAD is a one-day meeting that is more informal than other technical conferences in the field, with ample time for unstructured interaction.  Participation by graduate students and junior faculty is particularly encouraged through special invitation to contribute to the poster session and software demonstrations, and through travel support.  The meeting will include presentations by four invited speakers who have made outstanding contributions in the field of computer algebra.  These speakers will anchor the meeting and help attract participants.  There will also be a special panel on Future Directions in Computer Algebra, along with the poster and demonstration session.  The invited talks, panel, and poster session are expected to cover the entire range of computer algebra: algorithms, systems, and applications.  The contributed posters and software demonstrations will enable researchers, especially junior faculty and graduate students, to publicize their recent findings and to make new contacts.  This year's ECCAD is only the second to be held in New England.  With many colleges and universities in the area, it is hoped that the meeting will be able to draw a large number of attendees and to generate new interest in computer algebra.</docText>
    <keyword>algorithms</keyword>
    <division>CCF</division>
    <directorate>CSE</directorate>
    <award-instr>Standard Grant</award-instr>
    <programreferencecode>HPCC</programreferencecode>
    <programreferencecode>9218</programreferencecode>
    <fieldofapplication>0000912 Computer Science</fieldofapplication>
    <organization>University of Rhode Island</organization>
    <state>RI</state>
    <progmgr>Lenore M. Mullin</progmgr>
    <program>COMPUTATIONAL MATHEMATICS</program>
    <programelementcode>1271</programelementcode>
    <programreferencecode>9263</programreferencecode>
    <program>NUM, SYMBOL, &amp; ALGEBRA COMPUT</program>
    <programelementcode>7933</programelementcode>
    <pi>Lamagna, Edmund</pi>
    <amount>12992</amount>
  </document>
  <document>
    <docID>0934024</docID>
    <docDate>June 1, 2009</docDate>
    <docSource></docSource>
    <docText>WORKSHOP:  Code Generation and Optimization (CGO) 2009 Student Travel Support, March 22-25, 2009 in Seattle, WA

   This proposal requests NSF support to assist students in attending the 2009  International Symposium on Code Generation and Optimization (CGO 2009). CGO  provides a premier venue to bring together researchers and practitioners working  on feedback directed optimization and backend compilation techniques. The  symposium covers compilation for parallelism, performance, power, and security.  This support will broaden participation in CGO by subsidizing the travel for participants who might not otherwise travel to attend CGO. The funds will be used solely to provide travel support for students from US universities.</docText>
    <division>CCF</division>
    <directorate>CSE</directorate>
    <award-instr>Standard Grant</award-instr>
    <programreferencecode>HPCC</programreferencecode>
    <keyword>security</keyword>
    <programreferencecode>9218</programreferencecode>
    <progmgr>Almadena Y. Chtchelkanova</progmgr>
    <fieldofapplication>0000912 Computer Science</fieldofapplication>
    <amount>10000</amount>
    <organization>University of Delaware</organization>
    <state>DE</state>
    <programreferencecode>9150</programreferencecode>
    <program>COMPILERS</program>
    <programelementcode>7329</programelementcode>
    <pi>Cavazos, John</pi>
  </document>
  <document>
    <docID>0930477</docID>
    <docDate>August 1, 2009</docDate>
    <docSource></docSource>
    <docText>NSF Workshop; Electronic Design Automation -- Past, Present, and Future

   CCF - 0930477    NSF Workshop; Electronic Design Automation -- Past, Present, and Future  Cong, Jason       University of California-Los Angeles     ABSTRACT  Electronic design automation (EDA) of very large-scale integrated (VLSI) circuits and systems is an important field in computer science and engineering.  It has made a significant impact on the development of information technology?in particular in supporting the successful scaling of  Moore?s Law over the past 40 years, which in turn has created the performance and cost-efficient information technology infrastructure that has transformed our lives and all of society.  The success of the EDA is inspiring for many scientific and societal reasons.    At the same time, the EDA field is facing serious challenges. For example, Non-Recurring Engineering (NRE) costs associated with VLSI circuit design are skyrocketing with estimates of over $30M per ASIC design undertaken.  The rapid increase in the number of transistors available on a single chip leads to system-on-chip integration, with complex interactions between software and hardware, digital and analog, etc.  Moreover, the field of applications enabled by semiconductor technology is growing at a rapid rate?ranging from very high performance microprocessors and signal processors to a broad array of low-power portable devices to micro sense/communicate/actuate networks of chips driven by very low per-unit cost and extremely low operating power.  Designers must create chips that function properly in conventional digital and mixed-signal operation, as well as comprehend sensors that respond to signals from many physical domains such as pressure, temperature, chemical, and optical. The design problem is further compounded by the introduction of many new physical phenomena determining the performance of severely scaled semiconductor devices. For example, the power and performance characteristics of transistors are becoming statistical in nature.  The probability of soft or permanent errors is much higher in the new generation of CMOS devices at 32nm or below or in new emerging non-CMOS devices.  These present unprecedented challenges.    In an earlier workshop jointly held in 2006 by the NSF and SRC a recommendation was made that research in design technology and tools be increased through a National Design Initiative. Such an effort was deemed to be critical ?to maintain U.S. leadership in design for integrated nano- and Microsystems.? The present workshop is to review the progress made under the National Design Initiative and evaluate whether new directions and topics should be added to the Initiative. The recommendations from this workshop will help to influence the design automation funding programs at the NSF.</docText>
    <division>CCF</division>
    <directorate>CSE</directorate>
    <award-instr>Standard Grant</award-instr>
    <programreferencecode>HPCC</programreferencecode>
    <programreferencecode>9218</programreferencecode>
    <state>CA</state>
    <keyword>vlsi</keyword>
    <organization>University of California-Los Angeles</organization>
    <progmgr>Sankar Basu</progmgr>
    <pi>Cong, Jason</pi>
    <amount>50000</amount>
    <program>DES AUTO FOR MICRO &amp; NANO SYST</program>
    <programelementcode>7945</programelementcode>
    <copi>Robert Brayton</copi>
  </document>
  <document>
    <docID>0929124</docID>
    <docDate>June 1, 2009</docDate>
    <docSource></docSource>
    <docText>IEEE WoWMoM 2009 Student Travel Support

   The purpose of this travel grant is to support 10-12 graduate students from the United States, particularly those from underrepresented groups and institutions that traditionally lack funding for such support, to attend the 10th IEEE International Symposium on World of Wireless, Mobile and Multimedia Networking (WoWMoM 2009) that will be held in Kos, Greece, from June 15 to June 18, 2009. Since its inception, WoWMoM has been a high quality conference and the premier technical forum dedicated to addressing both the theoretical and real-world challenges in wireless mobile multimedia networking. This grant provides an opportunity for the students to be exposed to the cutting research in the field of wireless multimedia networking, and to interact with peers and leading researchers from other institutions. The participation of deserving students in WoWMoM will not only help their future careers but also will positively affect the future of the research in wireless multimedia networks.    The student selection process will consider the following: 1) students from groups traditionally underrepresented; 2) students from universities that traditionally lack funding to support graduate student attendance at conferences; and 3) students who will present their papers during the conference. Priority will be given to the graduate students from underrepresented groups, such as women, African American, Hispanics, and Native American students, and from universities that lack financial resources.</docText>
    <division>CCF</division>
    <directorate>CSE</directorate>
    <award-instr>Standard Grant</award-instr>
    <programreferencecode>HPCC</programreferencecode>
    <keyword>wireless</keyword>
    <programreferencecode>9218</programreferencecode>
    <fieldofapplication>0000912 Computer Science</fieldofapplication>
    <keyword>networking</keyword>
    <amount>15000</amount>
    <keyword>multimedia</keyword>
    <state>FL</state>
    <progmgr>William H Tranter</progmgr>
    <organization>University of Central Florida</organization>
    <program>WIRELESS COMM &amp; SIGNAL PROCESS</program>
    <programelementcode>7939</programelementcode>
    <pi>Chatterjee, Mainak</pi>
  </document>
  <document>
    <docID>0926127</docID>
    <docDate>September 1, 2009</docDate>
    <docSource></docSource>
    <docText>Customizable Domain-Specific Computing

   "This award is funded under the American Recovery and Reinvestment Act of 2009  (Public Law 111-5)."      Customizable Domain-Specific Computing  To meet ever-increasing computing needs and overcome power density limitations, the computing industry has entered the era of parallelization, with tens to hundreds of computing cores integrated into a single processor; and hundreds to thousands of computing servers connected in warehouse-scale data centers. However, such highly parallel, general-purpose computing systems still face serious challenges in terms of performance, energy, heat dissipation, space, and cost. In this project we look beyond parallelization and focus on domain-specific customization as the next disruptive technology to bring orders-of-magnitude power-performance efficiency improvement to important application domains.   The intellectual merit of this project includes development of a general methodology for creating novel customizable architecture platforms and the associated compilation tools and runtime management environment to support domain-specific computing to: 1) achieve orders-of-magnitude computing efficiency improvement for applications in a specific domain; and 2) demon-strate that such improvement can be obtained with little or no impact on design productivity, so that it can be deployed in a wide range of application domains. Our proposed domain-specific customizable computing platform includes: 1) a wide range of customizable computing elements, from heterogeneous fixed cores to coarse-grain customizable cores, and to fine-grain field-programmable circuit fabrics; 2) customizable high-performance radio frequency interconnects; 3) highly automated compilation tools and runtime management software systems for application development; and 4) a general, reusable methodology for customizable computing applicable across different domains. By combining these critical capabilities, we shall deliver a super-computer-in-a-box that is customized to a particular application domain to enable disruptive innovations in that domain. This approach will be demonstrated in several important application domains in healthcare.   The broader impact of this project will be measured by the new digital revolution enabled by customized computing. We will demonstrate the feasibility and advantages of the proposed research in the domain of healthcare, given its significant impact on the national economy and quality of life issues. In particular, we focus our effort on revolutionizing the role of medical imaging and hemodynamic modeling in healthcare, providing much more cost-efficient, convenient solutions for preventative, diagnostic, and therapeutic procedures to dramatically improve healthcare quality, efficiency, and patient outcomes. The broader impact of this project also includes the integration of research and education, exposing graduate, undergraduate, and high school stu-dents to the new concepts and research from this project via several new courses jointly developed and shared by researchers in our newly established Center for Domain-Specific Computing (CSDC). Summer research fellowship programs to support high school and undergraduate students will be provided by CSDC. Our goal is to train a new generation of students who are prepared for customized parallelization and computing, and can effectively apply such techniques to many areas of our society, thus furthering the digital revolution. Special efforts are being made to attract underrepresented students at all levels via partnerships with campus organizations focused on diversity, such as the UCLA Center for Excellence in Engineering and Diversity.  This research will be carried out as a collaborative effort between four universities: UCLA (the lead institution), Rice, UC Santa Barbara, and Ohio State. The research team consists of a group of highly accomplished researchers with diversified backgrounds, including computer science and engineering, electrical engineering, medicine, and applied mathematics. For more information, please visit http://cdsc.cs.ucla.edu.</docText>
    <division>CCF</division>
    <directorate>CSE</directorate>
    <award-instr>Standard Grant</award-instr>
    <programreferencecode>HPCC</programreferencecode>
    <keyword>architecture</keyword>
    <programreferencecode>9218</programreferencecode>
    <state>CA</state>
    <fieldofapplication>0000912 Computer Science</fieldofapplication>
    <organization>University of California-Los Angeles</organization>
    <progmgr>Sankar Basu</progmgr>
    <keyword>education</keyword>
    <pi>Cong, Jason</pi>
    <programreferencecode>6890</programreferencecode>
    <program>ITR EXPEDITIONS</program>
    <copi>Jens Palsberg</copi>
    <copi>Glenn Reinman</copi>
    <copi>Vivek Sarkar</copi>
    <copi>Alex Bui</copi>
    <amount>9999997</amount>
    <programelementcode>6894</programelementcode>
  </document>
  <document>
    <docID>0925863</docID>
    <docDate>September 1, 2009</docDate>
    <docSource></docSource>
    <docText>Advanced Software Technology for an Exascale Point Design Study

   The NSF and other Federal agencies will require further understanding of concepts, methods, and means for Exascale computing systems before formulation of future programs in enabling technologies, architectures, and methodologies. NSF supports a targeted two-year program of investigation, The Exascale Point-design Study, to provide sufficient depth and detail of understanding of the interrelationships among possible enabling technologies, implementation architectures and operating system software, and programming interfaces and methodologies.    Working in consultation with LSU, USC, UIUC, and Sandia National Laboratory (under DOE sponsorship), UD team devises an Exascale compilation technology and strategy derived from prior research conducted under NSF, DOE, and DARPA sponsorship, reflecting some of the best-known principles and practices envisioned for hardware and software at the Exaflops scale. This collaborative research will be performed in collaboration with our partners who will contribute architecture (LSU), application drivers and programming models (UIUC), enabling technology and hardware system design (USC), and systems integration and deployment (SNL). The team plans to provide a final report of its evaluations and analysis.</docText>
    <division>CCF</division>
    <directorate>CSE</directorate>
    <award-instr>Standard Grant</award-instr>
    <programreferencecode>HPCC</programreferencecode>
    <keyword>architecture</keyword>
    <programreferencecode>9218</programreferencecode>
    <progmgr>Almadena Y. Chtchelkanova</progmgr>
    <fieldofapplication>0000912 Computer Science</fieldofapplication>
    <keyword>operating system</keyword>
    <organization>University of Delaware</organization>
    <state>DE</state>
    <programreferencecode>9150</programreferencecode>
    <pi>Gao, Guang</pi>
    <amount>199998</amount>
    <program>HIGH-PERFORMANCE COMPUTING</program>
    <programelementcode>7942</programelementcode>
    <program>STRATEGIC TECHNOLOGIES FOR CI</program>
    <programelementcode>7684</programelementcode>
    <programreferencecode>7916</programreferencecode>
    <copi>Xiaoming Li</copi>
    <copi>John Cavazos</copi>
    <programreferencecode>7684</programreferencecode>
  </document>
  <document>
    <docID>0924968</docID>
    <docDate>January 1, 2009</docDate>
    <docSource></docSource>
    <docText>CAREER: Mathematical and Computational Fundamentals of Visual Appearance for Computer Graphics

   Much of human perception is driven by the visual appearance of the  world.  People are captivated by the effects of natural lighting and  shading patterns, such as the soft shadows from the leaves of a tree  in skylight, the glints of sunlight in ocean waves, or the shiny  reflections from a velvet cushion.  In computer graphics, it is  important to be able to accurately reproduce these appearance effects,  to create realistic images for applications like video games, vehicle  and flight simulators, or architectural design of interior spaces.  However, it is still very difficult to accurately model complex  illumination and reflection effects in interactive applications like  games, in image-based rendering applications like e-commerce, or in  computer vision applications like face recognition.  In the past, the  above applications have been addressed separately, by devising  particular algorithms for specific problems.  In this project, the  research focuses on the mathematical and computational fundamentals of  visual appearance, seeking to understand the intrinsic computational  structure of illumination, reflection and shadowing, and develop a  unified approach to many problems in graphics and vision.    The main thrust of the research will be to develop appropriate  mathematical representations for appearance, along with computational  algorithms and signal-processing techniques such as Clebsch-Gordan  expansions, wavelet methods with triple product expansions, and radial  basis functions.  A major advantage of this approach is that the same  representations, analysis and computation tools can then be applied to  many application domains, such as real-time and image-based rendering,  Monte Carlo sampling and lighting-insensitive recognition.  This  research philosophy builds on the investigator's dissertation, where  he developed a signal-processing framework for reflection, leading to  new frequency domain algorithms for both forward and inverse rendering.</docText>
    <keyword>algorithms</keyword>
    <division>CCF</division>
    <directorate>CSE</directorate>
    <programreferencecode>HPCC</programreferencecode>
    <award-instr>Continuing grant</award-instr>
    <programreferencecode>9218</programreferencecode>
    <state>CA</state>
    <fieldofapplication>0000912 Computer Science</fieldofapplication>
    <programreferencecode>1045</programreferencecode>
    <keyword>graphics</keyword>
    <program>INFORMATION TECHNOLOGY RESEARC</program>
    <programelementcode>1640</programelementcode>
    <keyword>computer graphics</keyword>
    <organization>University of California-Berkeley</organization>
    <keyword>computer vision</keyword>
    <keyword>vision</keyword>
    <program>GRAPHICS &amp; VISUALIZATION</program>
    <programelementcode>7453</programelementcode>
    <progmgr>Chitaranjan Das</progmgr>
    <pi>Ramamoorthi, Ravi</pi>
    <amount>199942</amount>
  </document>
  <document>
    <docID>0924279</docID>
    <docDate>September 1, 2009</docDate>
    <docSource></docSource>
    <docText>SHF: EAGER:  Transactional Processors:  Exploiting Hardware Transaction Processing for Reliable Computing

     With the semiconductor technology entering the nano-scale era, CMOS devices are facing a dramatic increase in vulnerability to transient faults such as soft errors induced by energetic particle strikes. Such soft errors have become a major challenge in designing next generation microprocessors. While techniques for optimizing reliability at low levels can be accurate, they incur significantly high hardware overheads and costly manufacturing processes. The objective of the proposed EAGER proposal is to explore a new flexible processor architecture for highly effective reliable computing by exploiting the semantics of hardware transaction processing. Instead of simply augmenting existing processors for an attainable reliability, the PI proposes to exploit the semantics of transaction processing from database management systems and recent transactional memories for the design and implementation of the transactional processor architecture, where the reliable computing is an inherent property. The transactional processor aims to provide highly effective and flexible transaction-level verification and native supports for recovery from detected errors. The PI will explore the design space of hardware transaction processing and transaction based reliable computing, as well as new programming language constructs to extend current programming languages for writing programs efficiently in transactions.     The success of this project may result in design of low-cost reliable computing platforms based on hardware transaction processing. In addition, the proposed activities will provide a unique channel to attract students from under-represented groups and minorities into science and engineering. The PI plans to take advantage of several college and university wide outreach programs to interact with high school students and teachers to motivate them in computer science.</docText>
    <division>CCF</division>
    <directorate>CSE</directorate>
    <award-instr>Standard Grant</award-instr>
    <programreferencecode>HPCC</programreferencecode>
    <keyword>verification</keyword>
    <keyword>architecture</keyword>
    <state>NJ</state>
    <programreferencecode>9218</programreferencecode>
    <fieldofapplication>0000912 Computer Science</fieldofapplication>
    <keyword>programming languages</keyword>
    <keyword>database</keyword>
    <organization>New Jersey Institute of Technology</organization>
    <progmgr>Chitaranjan Das</progmgr>
    <amount>74999</amount>
    <program>COMPUTER ARCHITECTURE</program>
    <programelementcode>7941</programelementcode>
    <pi>Hu, Jie</pi>
    <programreferencecode>7916</programreferencecode>
  </document>
  <document>
    <docID>0923716</docID>
    <docDate>May 1, 2009</docDate>
    <docSource></docSource>
    <docText>AF: Student Travel to STOC 2009

   This award will help to help support student attendance at the ACM Annual Symposium on the Theory of Computing (STOC) in Bethesda, Maryland, May 31 through June 2, 2009.  STOC and its sister conference, the IEEE FOCS meeting, are the premier broad-based conferences on the Theory of Computing in North America. In recent years the attendance at STOC has been roughly 275 plus or minus 25. 40% or more of the attendees have been students, for whom the conference serves as a valuable educational experience, both as regards the technical content of the talks and the opportunities for networking that it provides.  This award will provide partial support to as many as thirty student attendees, covering registration fees, shared hotel rooms, and travel.</docText>
    <division>CCF</division>
    <directorate>CSE</directorate>
    <award-instr>Standard Grant</award-instr>
    <programreferencecode>HPCC</programreferencecode>
    <programreferencecode>9218</programreferencecode>
    <organization>Association Computing Machinery</organization>
    <state>NY</state>
    <fieldofapplication>0000912 Computer Science</fieldofapplication>
    <progmgr>Richard Beigel</progmgr>
    <keyword>networking</keyword>
    <amount>15000</amount>
    <pi>Cole, Richard</pi>
    <program>ALGORITHMS</program>
    <programelementcode>7926</programelementcode>
  </document>
  <document>
    <docID>0923691</docID>
    <docDate>April 1, 2009</docDate>
    <docSource></docSource>
    <docText>Students Participation for Emergence in Chemical Systems 2.0 Conference

   Abstract:  The modern approach to understanding natural complex systems relies on new mathematical visions and ideas from computer sciences to infer and explain features of these systems. In exemplary nonlinear dynamical systems simple equations can lead to rapid increase in complexity, even strict rules can lead to chaotic behaviors, and properties that do not exist in its individual components emerge in the system.   The complexity theory substantiates the view that life will spontaneously develop within systems provided with a sufficiently complex chemistry. There is an enormous gap, however, between this conceptual advance and our actual experimental ability to demonstrate spontaneous emergence of even the most simple life?]like properties. The leading theme of the conference on ?gEmergence in Chemical Systems 2.0?h will be the search for chemistries that can lead to increasingly complex behaviors and emergent properties.     To computer scientists many aspects of complex systems come naturally, both by tradition and by training. For example, building on the continuing progress stemming all the way from Zuse and von Neumann, Chou and Reggia described a cellular automaton leading with close?]to?]certainty to self?]replicating structures regardless of a randomly chosen initial state. One of the goals of the conference is to facilitate chemical grounding of these concepts, which in turn will lead to experimental breakthroughs in designing new and understanding existing complex chemical and biochemical systems.     Sessions at the conferences are planned for bringing together scientists bridging computer science and chemistry in order to develop novel ideas for molecular computing and programming. The sessions will cover wide range of topics, from purely theoretical treatment of computing with chemical reaction networks in vitro and in vivo, through implemented examples from biocomputing and synthetic biology, to existing chemical systems in which implementation of local rules can lead to complex chemical synthesis and self?]assembly. The webpage of conference is: http://www.math.uaa.alaska.edu/~afkjm/chemicalemergence/index.php funding will be used to cover travel costs for up to 10 promising junior scientist that are on the ?gpath to independence?h. While we will focus on the recruitment of graduate students and postdoctoral fellows, recommended undergraduate students and other non-faculty members will be considered as well. We will strive to fill 50% spots with underrepresented groups in science.</docText>
    <division>CCF</division>
    <directorate>CSE</directorate>
    <award-instr>Standard Grant</award-instr>
    <programreferencecode>HPCC</programreferencecode>
    <programreferencecode>9218</programreferencecode>
    <fieldofapplication>0000912 Computer Science</fieldofapplication>
    <progmgr>Mitra Basu</progmgr>
    <state>AK</state>
    <program>COMPUTATIONAL BIOLOGY</program>
    <programelementcode>7931</programelementcode>
    <pi>Maselko, Jerzy</pi>
    <organization>University of Alaska Anchorage Campus</organization>
    <amount>14475</amount>
  </document>
  <document>
    <docID>0917894</docID>
    <docDate>March 1, 2009</docDate>
    <docSource></docSource>
    <docText>TCPP PhD Forum and IPDPS-09 Student Travel Awards

   This proposal is seeking funding for Technical Committee on Parallel Processing (TCPP) to allow 44 awards (at $700/student) to be split evenly between IPDPS student author support and PhD forum travel support. The proposed increase from $500 to $700 per award is in light of the expected increase in travel and lodging cost to Rome, the location of IPDPS-09. This proposal is seeking funding for Technical Committee on Parallel Processing (TCPP) to allow 44 awards (at $700/student) to be split evenly between IPDPS student author support and PhD forum travel support. The proposed increase from $500 to $700 per award is in light of the expected increase in travel and lodging cost to Rome, the location of IPDPS-09. Based on the TCPP's 2009 budget, the PIs expect to supplement this with additional number of awards and/or additional amount per award.</docText>
    <division>CCF</division>
    <directorate>CSE</directorate>
    <award-instr>Standard Grant</award-instr>
    <programreferencecode>HPCC</programreferencecode>
    <state>GA</state>
    <programreferencecode>9218</programreferencecode>
    <progmgr>Almadena Y. Chtchelkanova</progmgr>
    <fieldofapplication>0000912 Computer Science</fieldofapplication>
    <organization>Georgia State University Research Foundation, Inc.</organization>
    <program>COMPUTER ARCHITECTURE</program>
    <programelementcode>7941</programelementcode>
    <pi>Prasad, Sushil</pi>
    <amount>30800</amount>
  </document>
  <document>
    <docID>0917774</docID>
    <docDate>January 1, 2009</docDate>
    <docSource></docSource>
    <docText>CAREER:    Infrastructure for Software Generators and Components

   ABSTRACT  Proposal Number: CCR-0238289  Title: CAREER: Infrastructure for Software Generators and Components  PI: Ioannis Smaragdakis    Domain-specific techniques are among the most promising approaches to software construction and reuse. The research objective of this proposal is to provide advanced infrastructure for software generators  and components--the most common domain-specific implementation techniques.     Specifically, this proposal puts forward two concrete ideas, one in the area of (embedded) software generators and one in the area of component programming:  -Designing a programming language with C++-like  meta-programming support, but without the problems that have plagued  C++ template meta-programming.  -Implementing a component infrastructure for layered libraries of binary  components. This infrastructure uses the technology of dynamic  loading/linking in modern operating systems.    Developing such infrastructure is particularly valuable because it is the only domain-independent (and thus transferable) part of the intellectual effort of building a generator or component library.   The education and outreach objectives of the proposal are to (1) develop a new course on component-based and generative software engineering; (2) enhance existing courses with the results of the proposed research; (3) author a textbook on software component technologies and generative programming; and (4) initiate efforts for social outreach and outreach to other scientific areas and software professionals.</docText>
    <division>CCF</division>
    <directorate>CSE</directorate>
    <programreferencecode>HPCC</programreferencecode>
    <programreferencecode>9216</programreferencecode>
    <state>MA</state>
    <award-instr>Continuing grant</award-instr>
    <programreferencecode>9218</programreferencecode>
    <keyword>software engineering</keyword>
    <program>SOFTWARE ENGINEERING AND LANGU</program>
    <programelementcode>2880</programelementcode>
    <fieldofapplication>0000912 Computer Science</fieldofapplication>
    <programreferencecode>1187</programreferencecode>
    <programreferencecode>1045</programreferencecode>
    <keyword>operating systems</keyword>
    <organization>University of Massachusetts Amherst</organization>
    <keyword>education</keyword>
    <progmgr>Sol J. Greenspan</progmgr>
    <pi>Smaragdakis, Yannis</pi>
    <amount>92736</amount>
  </document>
  <document>
    <docID>0917391</docID>
    <docDate>September 1, 2009</docDate>
    <docSource></docSource>
    <docText>SHF: Small: Collaborative Research: Dynamic Invariant Inference, Enhanced

   In just a decade, dynamic invariant inference has emerged as one of the most promising directions in program analysis, with a variety of applications. An invariant inference system observes a program during test execution and filters a large number of candidate invariants (i.e., suspected relations between program data), finally reporting only those that hold with high confidence. However, inferred invariants are not always true (they depend on the quality of a test suite), and the few really useful invariants discovered are often accompanied by many more true but trivial and irrelevant facts. This work improves the quality of discovered invariants by ensuring their consistency with facts that are known statically. For instance, even though the invariants describing the behavior of two functions f1 and f2 may be unknown, we may know that any valid input for f1 is also valid for f2. This fact can be incorporated in the inference process to eliminate inconsistent invariants. More generally, the work explores techniques for expressing, discovering, and employing such consistency constraints to improve the quality of produced invariants, from type information and other sources including static analysis and user-supplied annotation.    The work will impact many aspects of software engineering, including scientific and industrial uses. Concrete benefits will be in the form of publications, usable software (released under an academic open-source license), software prototypes, and educational activities and resources (enhancement of a textbook and current courses, internships for high school students).</docText>
    <division>CCF</division>
    <directorate>CSE</directorate>
    <award-instr>Standard Grant</award-instr>
    <programreferencecode>HPCC</programreferencecode>
    <programreferencecode>9216</programreferencecode>
    <programreferencecode>9218</programreferencecode>
    <keyword>software engineering</keyword>
    <fieldofapplication>0000912 Computer Science</fieldofapplication>
    <state>OR</state>
    <organization>University of Oregon Eugene</organization>
    <programreferencecode>9217</programreferencecode>
    <program>PROGRAMMING LANGUAGES</program>
    <programelementcode>7943</programelementcode>
    <progmgr>Lenore D. Zuck</progmgr>
    <amount>167000</amount>
    <pi>Young, Michal</pi>
  </document>
  <document>
    <docID>0917385</docID>
    <docDate>August 1, 2009</docDate>
    <docSource></docSource>
    <docText>SHF:Small: A CAD Framework for Coupled Electrical-Thermal Modeling of Interconnects  in 3D Integrated Circuits

   The semiconductor industry is at an interesting crossroads, where traditional scaling of CMOS devices is beginning to confront significant challenges that are threatening to derail the more than four-decades old Moore?s law. 3D integrated circuits (3D ICs) offer an exciting alternative, where in lieu of scaling, continuous increase in functionality, performance and integration density can be sustained indefinitely by stacking semiconductor layers on top of each other in a ?monolithic? manner.  A 3D IC is comprised of two or more active (semiconducting) layers that have been thinned, bonded and interconnected using special vertical wires drilled through the active layers known as ?Through Silicon Vias (TSV)?.  When TSVs (10-100 micrometer long) are used to replace the longest (several millimeters) on-chip horizontal wires as well as some chip-to-chip connections (on printed circuit boards), significant reduction in wire delay and chip power dissipation can be achieved. Moreover, 3D ICs also offer the most promising platform to implement ?More-than-Moore? technologies, bringing heterogeneous materials (Silicon, III-V semiconductors, Graphene, etc) and technologies (memory, logic, RF, mixed-signal, MEMS, optoelectronics, etc) on a single chip.      However, modeling and analysis of interconnects in 3D ICs present new and significantly more complex problems. In contrast with traditional interconnects, the modeling of high aspect-ratio TSVs embedded in a semiconducting material with non-uniform currents in the third dimension, and electromagnetic coupling of interconnects with multiple conductive substrates at high-frequencies, constitute new challenges for design and design-automation methods.  Furthermore, the high power-density in 3D ICs due to multiple active layers and their limited heat removal options give rise to large three-dimensional thermal gradients, making it important to consider the coupling between thermal and electromagnetic properties of interconnects and the surrounding media. Finally, the need for accuracy is accompanied by the computational challenge of handling a large number of coupled interconnects at the system level, as 3D integration further exacerbates the size of the interconnect problem.    This project will develop the necessary foundations for coupled electrical-thermal modeling and analysis of interconnects and passives in 3D ICs, considering the electromagnetic coupling of general 3D interconnects with multiple substrates at ultra-high frequencies as well as the physical attributes of high aspect-ratio TSVs (including geometry, material and density), using thermally-aware and inherently efficient techniques to enable full-chip modeling of the large system of interconnects. The overall program also ties research to education at all levels besides focusing on recruitment and retention of underrepresented groups in nanoscience and engineering.</docText>
    <division>CCF</division>
    <directorate>CSE</directorate>
    <award-instr>Standard Grant</award-instr>
    <programreferencecode>HPCC</programreferencecode>
    <programreferencecode>9218</programreferencecode>
    <state>CA</state>
    <fieldofapplication>0000912 Computer Science</fieldofapplication>
    <organization>University of California-Santa Barbara</organization>
    <progmgr>Sankar Basu</progmgr>
    <keyword>education</keyword>
    <amount>450000</amount>
    <pi>Banerjee, Kaustav</pi>
    <program>DES AUTO FOR MICRO &amp; NANO SYST</program>
    <programelementcode>7945</programelementcode>
  </document>
  <document>
    <docID>0917345</docID>
    <docDate>August 1, 2009</docDate>
    <docSource></docSource>
    <docText>SHF: Small: RUI: Observationally Cooperative Multithreading

   Modern processors are designed to perform more tasks simultaneously, rather than to perform single tasks more quickly. These new multicore processors are powerful, but using that power is challenging; interesting problems often divide irregularly, requiring difficult and error-prone coordination among subtasks. Consequently, parallel programming is considered hard to learn and harder to do. Observationally Cooperative Multithreading (OCM) is a new approach. In programs written for cooperative multithreading (CM), subtasks take turns and execute one at a time. The CM model is well-known to rule out conflicts and to simplify programming. OCM takes these same programs but runs them on modern multicore machines, executing subtasks simultaneously when there are no conflicts. The result can be a speed and resource-utilization benefit with no extra complexity for programmers.  Potentially, OCM could make concurrency more accessible to a broad audience, including introductory students.  The research will develop OCM implementations using techniques such as Transactional Memory and Lock Inference, with the aim of fostering adoption of OCM by a large user community. Realistic benchmarks will be constructed to analyze the speed and scalability of OCM implementations, and to verify ease of programming in the OCM model.</docText>
    <division>CCF</division>
    <directorate>CSE</directorate>
    <award-instr>Standard Grant</award-instr>
    <programreferencecode>HPCC</programreferencecode>
    <programreferencecode>9216</programreferencecode>
    <programreferencecode>9218</programreferencecode>
    <state>CA</state>
    <fieldofapplication>0000912 Computer Science</fieldofapplication>
    <progmgr>Sol J. Greenspan</progmgr>
    <programreferencecode>9217</programreferencecode>
    <programreferencecode>9229</programreferencecode>
    <program>PROGRAMMING LANGUAGES</program>
    <programelementcode>7943</programelementcode>
    <organization>Harvey Mudd College</organization>
    <pi>Stone, Christopher</pi>
    <copi>Melissa O'Neill</copi>
    <amount>308875</amount>
  </document>
  <document>
    <docID>0917343</docID>
    <docDate>September 1, 2009</docDate>
    <docSource></docSource>
    <docText>CIF: Small: Cognitive Femtocells: Breaking the Spatial Reuse Limits of Cellular Systems

   Cognitive femtocells: Breaking the spatial reuse limits of cellular systems    Abstract:    The next generation of wireless cellular systems will be data traffic driven, providing seamless connectivity to the Internet and its services. In the areas of information and communication technologies, cellular systems and the Internet have proven to be the most transformative technologies for society. This research endeavors to optimally marry these two technologies with the goal of dramatically increasing achievable data rates and coverage. The proposed solution is to deploy very small cellular access points in residential homes and offices. These ``femtocells" are connected to the network via existing DSL/Cable and do not require additional deployment of costly wired infrastructure. Several theoretical challenges are posed by the femtocell concept. In particular, due to lack of coordination with the rest of the network, femtocells interfere with the network itself. This research develops novel solutions for femtocell technology by exploiting ideas from cognitive radio,  based on intelligent opportunistic usage of the shared radio resource.  Femtocell base stations will be deployed without careful frequency planning and will react to the interference environment by adapting their signaling strategy, thus, in the  vernacular of cognitive radio, the cellular system plays the role of the ?primary? user.  Unlike the classical cognitive radio scenario, the cellular signaling protocols and coding schemes are known. In this research we build on recent results on the Gaussian   interference channel and exploit the signal strength imbalances due to path-loss typical of cellular networks. Thus, the system is designed so that it operates predominantly in the regime of either weak or strong interference. Advanced signal processing and channel coding are exploited to utilize the fine structure of primary (cellular) signals, to explore the fundamental costs of cognitive radio and to develop coordination strategies to minimize this overhead. The goal of this novel design is to achieve a dramatic improvement in spatial reuse, allowing future cellular systems to achieve data rates comparable to wireless local area network while retaining the seamless connectivity and mobility of cellular networks.</docText>
    <division>CCF</division>
    <directorate>CSE</directorate>
    <award-instr>Standard Grant</award-instr>
    <programreferencecode>HPCC</programreferencecode>
    <keyword>network</keyword>
    <keyword>wireless</keyword>
    <programreferencecode>9218</programreferencecode>
    <state>CA</state>
    <fieldofapplication>0000912 Computer Science</fieldofapplication>
    <copi>Urbashi Mitra</copi>
    <organization>University of Southern California</organization>
    <progmgr>William H Tranter</progmgr>
    <program>COMM &amp; INFORMATION THEORY</program>
    <programelementcode>7935</programelementcode>
    <pi>Caire, Giuseppe</pi>
    <amount>449999</amount>
  </document>
  <document>
    <docID>0917329</docID>
    <docDate>July 15, 2009</docDate>
    <docSource></docSource>
    <docText>SHF: Small: A Foundation for Effects

   Modern programming languages provide sophisticated control mechanisms, making them suitable to program a wide variety of applications. It becomes a challenge for a language designer to bring together these features without creating inconsistencies or for a programmer to understand how to use them. The proposed work aims to provide a sound and robust framework for reasoning about a variety of control mechanisms in isolation and more importantly about the complex interactions among them.    The Curry-Howard isomorphism will guide the development of such a framework, which entails connecting programming languages to logic. The connection to logic allows one to formalize questions regarding expressive power and to exchange and borrow results with the field of proof theory. New logics expressing dynamic properties directly, as opposed to through program transformations, will be investigated. An advantage of this approach is that compilation, execution, optimization and code safety are expressed within the same foundation level.    The study will have a direct impact on how to reason about security properties, since it provides methods to reason about dynamic properties in a continuously changing context. It will also have an impact on program verification, since it provides a better understanding of the invariants that programs should satisfy.</docText>
    <division>CCF</division>
    <directorate>CSE</directorate>
    <award-instr>Standard Grant</award-instr>
    <programreferencecode>HPCC</programreferencecode>
    <programreferencecode>9216</programreferencecode>
    <keyword>verification</keyword>
    <keyword>security</keyword>
    <programreferencecode>9218</programreferencecode>
    <fieldofapplication>0000912 Computer Science</fieldofapplication>
    <state>OR</state>
    <keyword>programming languages</keyword>
    <progmgr>Sol J. Greenspan</progmgr>
    <organization>University of Oregon Eugene</organization>
    <programreferencecode>9217</programreferencecode>
    <pi>Ariola, Zena</pi>
    <program>PROGRAMMING LANGUAGES</program>
    <programelementcode>7943</programelementcode>
    <amount>499149</amount>
  </document>
  <document>
    <docID>0917319</docID>
    <docDate>August 1, 2009</docDate>
    <docSource></docSource>
    <docText>SHF: Small: Simplifying Reductions

   This project develops compile time techniques and a software tool (called the Reduction Simplification Engine, RSE) for optimization of equational programs with reductions (associative, and usually commutative, operations applied to collections of data).  By using these techniques and tools it is possible to generate programs with lower asymptotic complexity than the original specification.  Such complexity reduction is an ambitious, almost unheard of, goal in compilation: most compilers seek constant factor gains, usually a few percentage points.  The techniques developed in this project build on more than twenty years of research by the PI on a formalism called the "polyhedral model."  The main novelty of the current effort is that in addition to polyhedral techniques, algebraic properties such as idempotency and distributivity are also used to augment the analyses performed.</docText>
    <division>CCF</division>
    <directorate>CSE</directorate>
    <award-instr>Standard Grant</award-instr>
    <programreferencecode>HPCC</programreferencecode>
    <programreferencecode>9216</programreferencecode>
    <programreferencecode>9218</programreferencecode>
    <progmgr>Almadena Y. Chtchelkanova</progmgr>
    <fieldofapplication>0000912 Computer Science</fieldofapplication>
    <state>CO</state>
    <program>COMPILERS</program>
    <programelementcode>7329</programelementcode>
    <programreferencecode>9217</programreferencecode>
    <organization>Colorado State University</organization>
    <pi>Rajopadhye, Sanjay</pi>
    <amount>466187</amount>
  </document>
  <document>
    <docID>0917288</docID>
    <docDate>September 1, 2009</docDate>
    <docSource></docSource>
    <docText>AF: Small: Topological Graph Theory Revisited: With Applications in Computer Graphics

   Recent research in computer graphics has shown that the classical topological graph theory provides a solid mathematical foundation and powerful tool for the development of 3D modeling systems.  Despite its initial success, there is still a significant gap between the theoretical research in topological graph theory and its direct applications in computer graphics.  In particular, the research in classical topological graph theory has largely neglected geometric issues.  Moreover, very recent research has shown exciting connections between graph embeddings on non-orientable surfaces and surface weaving, and demonstrated a need for a refined and extended study in this direction.   This proposed research, guided by its applications in computer graphics, will refine and extend the classical topological graph theory in the following two directions:   1.  Graph embeddings on orientable surfaces with geometric constraints: This project will re-examine the fundamental issues studied in graph embeddings on orientable surfaces that are related to topologically robust 3D modeling, by considering geometric constraints such as symmetry, planarity and conical properties.  Applications of this research include development of topologically robust and highly interactive graphics modeling systems.  2.  Graph embeddings on non-orientable surfaces and their applications in modeling surface weaving: This project will refine and extend the study on graph embeddings on non-orientable surfaces and the corresponding graph surgery operations, study their relations to 3D modeling, and build a new paradigm of modeling surface weaving.  Applications of this research include creating beautiful shapes such as woven basket and topological sculptures.</docText>
    <division>CCF</division>
    <directorate>CSE</directorate>
    <pi>Chen, Jianer</pi>
    <organization>Texas Engineering Experiment Station</organization>
    <state>TX</state>
    <award-instr>Standard Grant</award-instr>
    <programreferencecode>HPCC</programreferencecode>
    <programreferencecode>9218</programreferencecode>
    <fieldofapplication>0000912 Computer Science</fieldofapplication>
    <keyword>graphics</keyword>
    <keyword>computer graphics</keyword>
    <progmgr>Dmitry Maslov</progmgr>
    <program>COMPUTATIONAL GEOMETRY</program>
    <programelementcode>7929</programelementcode>
    <copi>Ergun Akleman</copi>
    <amount>386663</amount>
  </document>
  <document>
    <docID>0917285</docID>
    <docDate>September 1, 2009</docDate>
    <docSource></docSource>
    <docText>SHF:Small: Portable High-Level Programming Model for Heterogeneous Computing Based on OpenMP

   High-end systems and general-purpose computers alike are increasingly being configured with hardware accelerators. A typical system, or node of a large-scale platform, contains a few multicore processors that share memory, together with  one or more coprocessors, such as a high-end accelerator board, an inexpensive programmable graphics card (GPGPU), or an FPGA (Field Programmable Gate Array).  The coprocessors will typically have a different instruction set, distinct memory, a different operating environment and markedly different execution characteristics than the multicore component of the system. As a result, these heterogeneous platforms pose tough challenges with regard to their programmability.         The goal of this research is to significantly simplify the process of developing  code  for  heterogeneous platforms  by providing a single, high-level programming interface that may be used across, and within, multicore processors and a broad variety of accelerators. Language features will be designed, in the form of an extension to the industry standard OpenMP API,  that will enable the application developer to specify code regions for acceleration, along with the necessary synchronization and data motion.  The implementation will translate  the resulting enhanced OpenMP for a variety of heterogeneous platforms.</docText>
    <division>CCF</division>
    <directorate>CSE</directorate>
    <state>TX</state>
    <award-instr>Standard Grant</award-instr>
    <programreferencecode>HPCC</programreferencecode>
    <programreferencecode>9218</programreferencecode>
    <progmgr>Almadena Y. Chtchelkanova</progmgr>
    <fieldofapplication>0000912 Computer Science</fieldofapplication>
    <keyword>graphics</keyword>
    <program>COMPILERS</program>
    <programelementcode>7329</programelementcode>
    <organization>University of Houston</organization>
    <amount>499923</amount>
    <pi>Chapman, Barbara</pi>
  </document>
  <document>
    <docID>0917274</docID>
    <docDate>August 15, 2009</docDate>
    <docSource></docSource>
    <docText>New Theoretical Foundations of Tensor Applications: Clustering, Error Analysis, Global Convergence, and Robust Formulations

   New Theoretical Foundations of Tensor Applications: Clustering, Error Analysis, Global Convergence, and Robust Formulations    Tensor decompositions become increasingly important in analyzing high-dimensional multi-index data. However, applications of tensor decompositions are so far restricted: (1) they are mainly used for data compression ? critically important tasks such as data clustering have not been addressed. (2) No bounds on reconstruction error exist ? the compression parameters are determined on a trial-and-error basis. (3) As solutions to non-convex optimizations, tensor decompositions are not unique. This could severely affect the reliability of tensor analysis. (4) Tensor decompositions are obtained via minimizing the sum of squared errors, thus are prone to noise or outliers in the data. A robust formulation of decomposition is highly desirable for applications with large noises. In this proposal, we investigate these new fundamental aspects of tensor applications:   (1) Investigate the clustering capabilities of tensor decompositions, in addition to the established theoretical results on clustering;   (2) Provide comprehensive error analysis of tensor decompositions and derive lower and upper error bounds;   (3) Investigate conditions for global convergence for tensor decompositions and investigate good initializations for the cases where global convergence fails.   (4) Develop robust formulations for tensor decompositions.  In addition, we will develop user-friendly software toolbox that contains the resulting algorithms and make it available to the public. We will also educate graduate and undergraduate students with fundamentals in matrix and tensor computations. We will present tutorials and organize workshops on this new direction.</docText>
    <keyword>algorithms</keyword>
    <division>CCF</division>
    <directorate>CSE</directorate>
    <state>TX</state>
    <award-instr>Standard Grant</award-instr>
    <programreferencecode>HPCC</programreferencecode>
    <programreferencecode>9218</programreferencecode>
    <fieldofapplication>0000912 Computer Science</fieldofapplication>
    <progmgr>Lenore M. Mullin</progmgr>
    <program>NUM, SYMBOL, &amp; ALGEBRA COMPUT</program>
    <programelementcode>7933</programelementcode>
    <organization>University of Texas at Arlington</organization>
    <pi>Ding, Chris</pi>
    <copi>Heng Huang</copi>
    <amount>250833</amount>
  </document>
  <document>
    <docID>0917265</docID>
    <docDate>September 1, 2009</docDate>
    <docSource></docSource>
    <docText>CIF: Small: Energy Efficiency in Wireless Communications under Queueing Constraints

   Abstract ? NSF 0917265    The two key characteristics of wireless communications that greatly impact system design and performance are randomly-varying channel conditions and limited energy resources. In wireless systems, the power of the received signal randomly fluctuates over time and distance due to multipath fading, mobility, and changing environment. Moreover, mobile wireless systems can only be equipped with limited energy resources, and hence energy efficient operation is a crucial requirement in most applications. In many wireless communication systems, in addition to energy-efficient operation, satisfying certain quality-of-service (QoS) requirements is of paramount importance in providing acceptable performance and quality. For instance, in voice over IP (VoIP), interactive-video (e.g., videoconferencing), and streaming-video applications in wireless systems, latency is a key QoS metric. Therefore, the central design challenge in next-generation wireless systems, which has the vision of providing communications anytime, anywhere in a reliable and robust fashion, is to provide the best performance levels while making efficient use of energy resources and satisfying certain QoS constraints (e.g., latency, packet loss, buffer violation probability).     The overall goal of this research is to identify the fundamental limits on the energy efficiency of wireless systems operating under queueing constraints through a unified analysis of information- and queueing-theoretic aspects. The investigators will employ a novel approach to analyze the energy efficiency by combining information-theoretic tools, such as minimum bit energy and wideband slope, with queueing-theoretic tools, such as effective bandwidth and effective capacity. This project seeks to establish a strong analytical framework by rigorously establishing fundamental limits on the energy efficiency under buffer constraints, and also at the same time has the goal of conducting experiments with a testbed and making comparisons with the theoretical findings.</docText>
    <division>CCF</division>
    <directorate>CSE</directorate>
    <award-instr>Standard Grant</award-instr>
    <programreferencecode>HPCC</programreferencecode>
    <keyword>wireless</keyword>
    <programreferencecode>9218</programreferencecode>
    <fieldofapplication>0000912 Computer Science</fieldofapplication>
    <organization>University of Nebraska-Lincoln</organization>
    <state>NE</state>
    <programreferencecode>9150</programreferencecode>
    <keyword>vision</keyword>
    <progmgr>William H Tranter</progmgr>
    <pi>Gursoy, Mustafa</pi>
    <program>COMM &amp; INFORMATION THEORY</program>
    <programelementcode>7935</programelementcode>
    <copi>Senem Velipasalar</copi>
    <amount>335856</amount>
  </document>
  <document>
    <docID>0917257</docID>
    <docDate>September 15, 2009</docDate>
    <docSource></docSource>
    <docText>AF: Small: Collaborative Research: Efficient Groebner Basis Computation in Boolean Rings for Temporal Logic Reasoning and Model Checking

   The method of Groebner bases has become one of the most important techniques in providing an exact solution of nonlinear problems in multivariate polynomial ideal theory, computational algebra and elimination theory, in solving systems of algebraic equations, and in many other related areas. It is also being fruitfully used in a variety of seemingly unrelated research areas such as geometric theorem proving, integer programming, solid modeling, and engineering.     This project will develop the theories and algorithms for an efficient framework of PSPACE Groebner basis computation in Boolean rings and then apply this framework to temporal logic reasoning and model checking. The theoretical and algorithmic results of this research should have a broader impact on symbolic computation, temporal logic reasoning and related areas such as automated verification of hardware and software in model checking. Symbolic computation is an active and rich area with enormous activity and progress in the last twenty years. A new approach to temporal logic reasoning and model checking making use of results from symbolic computation seems to have considerable promise, both as a supplement to existing methods and as a way to bring a large body of powerful mathematical machinery to bear on the model checking problem.</docText>
    <keyword>algorithms</keyword>
    <division>CCF</division>
    <directorate>CSE</directorate>
    <state>TX</state>
    <award-instr>Standard Grant</award-instr>
    <programreferencecode>HPCC</programreferencecode>
    <keyword>verification</keyword>
    <programreferencecode>9218</programreferencecode>
    <fieldofapplication>0000912 Computer Science</fieldofapplication>
    <progmgr>Richard Beigel</progmgr>
    <program>INFORMATION TECHNOLOGY RESEARC</program>
    <programelementcode>1640</programelementcode>
    <pi>Tran, Quoc-Nam</pi>
    <organization>Lamar University Beaumont</organization>
    <program>ALGORITHMS</program>
    <programelementcode>7926</programelementcode>
    <copi>Valentin Andreev</copi>
    <amount>220645</amount>
  </document>
  <document>
    <docID>0917244</docID>
    <docDate>July 15, 2009</docDate>
    <docSource></docSource>
    <docText>Small:CIF:Exact Thresholds for Quantum Information Processing

   Computation and communication are physical processes with limits set by the laws of physics. This project investigates which bounds the laws of quantum mechanics impose on processing quantum information in a reliable manner. Two questions are specifically addressed, one concerning the amount of noise that can be tolerated in a quantum computer, and the other about the minimal physical resources required to store quantum information.     Noise Thresholds: When talking about circuits to implement quantum algorithms one has to take into account the fact that it is impossible to implement the gates perfectly. In the case of quantum computation this realization is especially relevant as the experimental challenges for implementing quantum gates are significantly greater than those for implementing classical gates.    It is the theory of fault tolerant quantum computation that investigates the many aspects of this issue. The current project looks at exactly which noise levels the ability to perform quantum computation disappears and how such threshold values depend on the kind of quantum gate and the kind of noise.    Information Storage: It seems obvious that to store a bit of information one needs to expend physical resources and that there is a trade-off between these resources such as space and energy. The research of this project looks at making this intuition rigorous and more quantitative by deriving physical laws that give exact lower bounds on the necessary combined resources to store quantum information reliably, taking into account how much information for how long has to be stored.</docText>
    <keyword>algorithms</keyword>
    <division>CCF</division>
    <directorate>CSE</directorate>
    <award-instr>Standard Grant</award-instr>
    <programreferencecode>HPCC</programreferencecode>
    <programreferencecode>9218</programreferencecode>
    <state>CA</state>
    <fieldofapplication>0000912 Computer Science</fieldofapplication>
    <organization>University of California-Santa Barbara</organization>
    <progmgr>Dmitry Maslov</progmgr>
    <pi>van Dam, Willem</pi>
    <program>QUANTUM COMMUNICATION</program>
    <programelementcode>7948</programelementcode>
    <amount>443880</amount>
  </document>
  <document>
    <docID>0917238</docID>
    <docDate>September 15, 2009</docDate>
    <docSource></docSource>
    <docText>SHF: Small: Multi-Core Architecture, Applications, and Tools Co-Design

   Technology limitations, emerging applications, and changing usability trends are ushering in a new era in multi-core computer systems. A key problem for both application and microprocessor design is that applications are largely evolving independently from the architectural development of microprocessors. This is a problem for architectural research because developing efficient architectural solutions requires realistic characterization of the next generation applications. From a system design perspective, understanding application behavior is crucial for building an efficient system, since they must be optimized to exploit mechanisms provided in the architecture.  This proposal seeks to re-think next generation multi-core systems - both software  and hardware architectures using state-of-the-art quantitative design  tools.    The two key ideas explored in this research are the following. First, is a hybrid task-level/data-level parallelism execution model for emerging applications that have abundant but not synchronization-free parallelism. Second, is the development of new highly accurate and efficient quantitative models to evaluate architecture and application design alternatives, at scale and over a wide range of application workloads. The project seeks to provide a suite of quantitative tools to close the development loop of design, evaluation and analysis of software's behavior on hardware, allowing the tuning of both software and hardware.  This project takes real-time graphics as a challenge application and derives a full system, called Copernicus, for future real-time graphics that can provide significantly higher image  qualities. The project will also integrate these quantitative models in the curriculum and disseminate to the research community.    The innovations proposed in this research have the potential for  significantly aiding microprocessor and application development for future systems. The development of a full system specification for ray-tracing can trigger an inflection in the evolution of both programmable processors and  specialized graphics processors.</docText>
    <division>CCF</division>
    <directorate>CSE</directorate>
    <award-instr>Standard Grant</award-instr>
    <programreferencecode>HPCC</programreferencecode>
    <programreferencecode>9216</programreferencecode>
    <keyword>architecture</keyword>
    <programreferencecode>9218</programreferencecode>
    <fieldofapplication>0000912 Computer Science</fieldofapplication>
    <keyword>graphics</keyword>
    <state>WI</state>
    <organization>University of Wisconsin-Madison</organization>
    <amount>450000</amount>
    <progmgr>Chitaranjan Das</progmgr>
    <programreferencecode>9217</programreferencecode>
    <program>COMPUTER ARCHITECTURE</program>
    <programelementcode>7941</programelementcode>
    <pi>Sankaralingam, Karthikeyan</pi>
    <copi>Mary Vernon</copi>
  </document>
  <document>
    <docID>0917230</docID>
    <docDate>July 1, 2009</docDate>
    <docSource></docSource>
    <docText>CIF: Small: A Resource-Scalable Unifying Framework for Aural Signal Coding

   "This award is funded under the American Recovery and Reinvestment Act of 2009  (Public Law 111-5)."      A Resource-Scalable Unifying Framework for Aural Signal Coding      The objective of this project is to achieve a comprehensive, unifying framework and corresponding universal methodologies for the coding of aural signals. The challenges are due to the combination of elusive perceptual criteria, complex signal structures, and great diversity in signal type, operational setting, complexity and delay requirements. Historical efforts were tailored to narrowly defined signal types and scenarios, such as linear prediction for low rate speech communication versus transform-based music coding for storage and streaming. However, there is a growing realization of their insufficiency to handle the heterogeneous aural signals and network settings encountered in many real-world applications, as evidenced in particular by recent major initiatives of the multimedia and networking industries demanding joint speech-audio coding standardization.       The research formalizes the tradeoffs that underly universal aural signal coding, and develops a unifying framework and methodologies to enable efficient optimization of resource-scalable coding under heterogeneous signal and network setting scenarios. The main thrusts of the project are: i) Development of a unifying resource-scalable framework coupled with effective perceptual distortion criteria, which covers the continuous gamut of aural signal types and networking scenarios, and is scalable in bit rate, encoding/decoding complexity and delay, etc.; ii) Theoretical analysis of rate-(perceptual) distortion performance limits within such unified compression paradigms; iii) A new class of universal methodologies and effective optimization algorithms for efficient coder design and various resource allocation within this unifying framework.</docText>
    <keyword>algorithms</keyword>
    <division>CCF</division>
    <directorate>CSE</directorate>
    <award-instr>Standard Grant</award-instr>
    <programreferencecode>HPCC</programreferencecode>
    <keyword>network</keyword>
    <programreferencecode>9218</programreferencecode>
    <progmgr>John Cozzens</progmgr>
    <state>CA</state>
    <fieldofapplication>0000912 Computer Science</fieldofapplication>
    <keyword>networking</keyword>
    <organization>University of California-Santa Barbara</organization>
    <keyword>multimedia</keyword>
    <program>WIRELESS COMM &amp; SIGNAL PROCESS</program>
    <programelementcode>7939</programelementcode>
    <pi>Rose, Kenneth</pi>
    <programreferencecode>6890</programreferencecode>
    <copi>Jerry Gibson</copi>
    <amount>498363</amount>
  </document>
  <document>
    <docID>0917226</docID>
    <docDate>September 15, 2009</docDate>
    <docSource></docSource>
    <docText>SHF: Small: Lookahead Logic Circuits for Performance, Power, and Reliability

     Timing errors resulting from process variability, manufacturing defects, and aging effects in scaled CMOS technologies are an important failure mode that impact the reliability of multi-level control logic in commodity mainstream computer systems. This project makes a case for lookahead logic circuits based on the principles of prefix computation to address performance, reliability, and power challenges posed by timing errors in multi-level control logic. Lookahead logic circuits promise low-cost logic-only solutions that can be used to (i) increase performance and/or yield by reducing logic delay, (ii) improve logic circuit robustness to timing errors by masking them, (ii) lower power consumption by increasing the scope of aggressive dynamic voltage and frequency scaling, and (iv) enable more effective and targeted post-silicon debug and online wearout prediction. The research will formalize the principles of lookahead-based function decomposition and prefix-based computation for multi-level logic circuits, develop logic synthesis and design solutions for lookahead logic, and investigate its applications in the context of superscalar and multi-threaded processor design.    A major impact of this research is to enable ubiquitous low-cost highly reliable computing, by expanding its reach to domains, where custom solutions are economically infeasible. An integrated outcome of this project is the development of a testbed and web-based resources to facilitate research in reliable system design.  Through course development and collaborations with industrial partners, the research will contribute to education, community resource development and technology transfer to industry.</docText>
    <division>CCF</division>
    <directorate>CSE</directorate>
    <state>TX</state>
    <award-instr>Standard Grant</award-instr>
    <programreferencecode>HPCC</programreferencecode>
    <programreferencecode>9216</programreferencecode>
    <programreferencecode>9218</programreferencecode>
    <fieldofapplication>0000912 Computer Science</fieldofapplication>
    <program>INFORMATION TECHNOLOGY RESEARC</program>
    <programelementcode>1640</programelementcode>
    <keyword>ubiquitous</keyword>
    <keyword>education</keyword>
    <organization>William Marsh Rice University</organization>
    <progmgr>Chitaranjan Das</progmgr>
    <programreferencecode>9217</programreferencecode>
    <pi>Mohanram, Kartik</pi>
    <program>COMPUTER ARCHITECTURE</program>
    <programelementcode>7941</programelementcode>
    <copi>Peter Varman</copi>
    <amount>380337</amount>
  </document>
  <document>
    <docID>0917212</docID>
    <docDate>September 1, 2009</docDate>
    <docSource></docSource>
    <docText>CIF:  Small:  Power Consumption in Communication

   Power consumption is an increasingly important issue across society.  For communication, as the ranges of links in wireless networks  continue to shrink, the power consumed in the encoding and decoding  becomes a decidedly nontrivial factor in the choice of system  architecture. This is particularly important in settings such as  wireless patient monitoring, personal area networks, sensor networks,  etc. Shannon's classical information theory only established the  tradeoff between rate and transmit power as the probability of error  goes to zero and the block-length goes to infinity. This research is  about giving new conceptual tools for reasoning about the power  consumption in encoding and decoding as well. The core idea is that in  the age of billion transistor chips, the proper metric for complexity  is the power consumed by the implementation.    Just as simplified channel models have enabled sophisticated analysis  that has revealed deep insights into error correction and transmit  power, this research develops simplified implementation models that  are amenable to analysis. This reveals the fundamental tradeoffs  underlying the interplay between transmission and processing  powers. Crucially, the models developed are compatible with modern  approaches to iterative and "turbo" decoding by massively parallel  ASICs, while also not being limited to just the currently known  families of sparse-graph codes. By developing a unified mathematical  framework, this research allows us to understand the total power cost  of meeting performance objectives like high rate, low distortion, low  delay and low probability of error. This in turn leads to an  understanding of how to better engineer wireless systems as a whole:  opening up avenues for collaboration between circuit designers,  communication theorists, and networking researchers working at higher  layers.</docText>
    <division>CCF</division>
    <directorate>CSE</directorate>
    <award-instr>Standard Grant</award-instr>
    <programreferencecode>HPCC</programreferencecode>
    <keyword>wireless</keyword>
    <keyword>architecture</keyword>
    <programreferencecode>9218</programreferencecode>
    <state>CA</state>
    <fieldofapplication>0000912 Computer Science</fieldofapplication>
    <keyword>networking</keyword>
    <organization>University of California-Berkeley</organization>
    <progmgr>William H Tranter</progmgr>
    <program>COMM &amp; INFORMATION THEORY</program>
    <programelementcode>7935</programelementcode>
    <pi>Sahai, Anant</pi>
    <amount>296566</amount>
  </document>
  <document>
    <docID>0917204</docID>
    <docDate>August 1, 2009</docDate>
    <docSource></docSource>
    <docText>SHF: Small: System-Theoretic Analysis and Design for Dynamic Stability of Memory Devices in Nanoscale CMOS and Beyond

   Proposal ID: 0917204      Pi name: Li Peng          Inst: Texas Engineering Experiment Station        Title: System-Theoretic Analysis and Design for Dynamic Stability of Memory Devices in Nanoscale CMOS and Beyond    Abstract      Data storage is essential to a broad range of electronic and biological systems. Static random access memories (SRAMs) provide essential on-chip data storage for many electronic applications including microprocessors, ASICs, DSPs and SoCs. There also exists a growing effort in developing engineered genetic memory circuits to facilitate new understanding of cellular phenomena in natural organisms, cellular control and biocomputing.  This work intends to facilitate the understanding, analysis and enhancement of dynamic stability, a key system property, for semiconductor SRAMs, emerging memristor and biological memories. Conventional static SRAM stability metrics are unable to capture intrinsic dynamic circuit operations and hence inherently limited in their applications.  This work addresses the need for a rigorous understanding of dynamic stability in semiconductor and genetic memories via a system-theoretic approach.  Nonlinear system theory will be exploited to construct new dynamic noise margin concepts and design metrics with theoretic rigor and design insights. Novel system theoretically motivated numerical algorithms will be developed to facilitate analysis and optimization with significantly improved efficiency.      This work will facilitate the design of nanoscale computing systems as well as the development of synthetic gene-regulatory networks. Interdisciplinary explorations will provide new opportunities for solving research problems of practical significance and offer educational opportunities to students. The PIs will promote the research participation from undergraduate students and students from underrepresented groups and engage in high-school teacher enrichment programs. The research outcomes will be integrated into undergraduate and graduate curriculum and disseminated in the research community and major semiconductor companies.</docText>
    <keyword>algorithms</keyword>
    <division>CCF</division>
    <directorate>CSE</directorate>
    <organization>Texas Engineering Experiment Station</organization>
    <state>TX</state>
    <award-instr>Standard Grant</award-instr>
    <programreferencecode>HPCC</programreferencecode>
    <programreferencecode>9216</programreferencecode>
    <amount>350000</amount>
    <programreferencecode>9218</programreferencecode>
    <fieldofapplication>0000912 Computer Science</fieldofapplication>
    <progmgr>Sankar Basu</progmgr>
    <programreferencecode>9217</programreferencecode>
    <program>DES AUTO FOR MICRO &amp; NANO SYST</program>
    <programelementcode>7945</programelementcode>
    <pi>Li, Peng</pi>
    <copi>Garng Huang</copi>
  </document>
  <document>
    <docID>0917202</docID>
    <docDate>July 15, 2009</docDate>
    <docSource></docSource>
    <docText>AF: Small: Parallel Methods for Large, Atomic-scale Quantitative Analysis of Materials

   Parallel Methods for Large, Atomic-scale Quantitative Analysis of Materials  Project Summary    Experimental advances in materials science have enabled near atomic scale imaging of materials, making it possible to relate atomic arrangements to macroscopic material properties and enabling smart materials design. Driven by the needs of the materials science community facing a rapid adoption of this new technology, the goal of the proposed research is to develop comprehensive algorithmic foundations for quantitative analysis of atomic-scale data from interpreting atom probe tomography images to their analysis and feature extraction. Parallel algorithms and high performance implementations will be emphasized due to the large data set sizes which can reach several hundred million to a billion atoms and beyond. The investigators will develop parallel algorithms to 1) deal with inherent limitations and errors in atomic sampling, 2) determine crystallographic orientation, 3) perform autocorrelation based clustering analysis, and 4) extract coherent structures and intrinsic geometric features through linear and non-linear manifold learning.  The research will be carried out by an interdisciplinary team of PIs with expertise in parallel algorithms, high performance computing, computational and differential geometry, and materials science. The research is intended to advance materials science from visualization and simulation of atomistic scale solid state phenomena to its direct observation, quantitative analysis and interpretation.</docText>
    <keyword>algorithms</keyword>
    <division>CCF</division>
    <directorate>CSE</directorate>
    <award-instr>Standard Grant</award-instr>
    <programreferencecode>HPCC</programreferencecode>
    <keyword>visualization</keyword>
    <programreferencecode>9218</programreferencecode>
    <fieldofapplication>0000912 Computer Science</fieldofapplication>
    <keyword>simulation</keyword>
    <organization>Iowa State University</organization>
    <state>IA</state>
    <progmgr>Lenore M. Mullin</progmgr>
    <pi>Aluru, Srinivas</pi>
    <program>PARAL/DISTRIBUTED ALGORITHMS</program>
    <programelementcode>7934</programelementcode>
    <copi>Krishna Rajan</copi>
    <copi>Baskar Ganapathysubramanian</copi>
    <amount>497784</amount>
  </document>
  <document>
    <docID>0917167</docID>
    <docDate>September 1, 2009</docDate>
    <docSource></docSource>
    <docText>SHF: Small:Transforming Linear Algebra Libraries

   Ever since the first FORmula TRANslator, compilers have purported to  take an algorithm, formulated in human terms, and compile it to an  efficient executable.  Practice clearly does not live up to this  ideal, as programming languages force execution-oriented design  decisions on the programmer, and compiler imperfections necessitate  further manual optimizations.  While the ordinary programmer can  ignore this problem by using libraries, the library developer cannot.  The problem appears more desperate now than ever, since it is not  known what form future architectures will take, combined with a trend  towards pushing complexity away from the architecture (for example to  lower power consumption) and onto the program and compiler.    The FLAME project already allows linear algebra libraries to be  developed and coded at a high level of abstraction that better  captures the underlying algorithms.  It has already been shown that  these technique greatly simplify the porting of libraries to different  platforms ranging from conventional sequential computers to exotic  multiGPU accelerators.  However, the APIs for coding at a high level  of abstraction incur a considerable performance penalty for operations  that in each step perform relatively little computation (e.g., level-2  BLAS operations and ``unblocked'' algorithms).  As a result, a  nontrivial part of libflame, the library that has resulted from the  project, still requires coding at a low level.    The project will develop a source-to-source translator will take  algorithms expressed at a high level of abstraction and will transform  these into a range of representations, including high-performance  low-level code.  This will overcome the final legitimate objection to  the FLAME methodology since coding at a high level of abstraction will  no longer carry a performance penalty.  The approach will be  generalized so that code transformations that an expert applies by  hand in order to target different platforms will be made mechanical.  Together, these represent a major departure from traditional  approaches to library development.</docText>
    <keyword>algorithms</keyword>
    <division>CCF</division>
    <directorate>CSE</directorate>
    <state>TX</state>
    <award-instr>Standard Grant</award-instr>
    <programreferencecode>HPCC</programreferencecode>
    <keyword>compiler</keyword>
    <keyword>architecture</keyword>
    <programreferencecode>9218</programreferencecode>
    <progmgr>Almadena Y. Chtchelkanova</progmgr>
    <fieldofapplication>0000912 Computer Science</fieldofapplication>
    <keyword>programming languages</keyword>
    <organization>University of Texas at Austin</organization>
    <amount>400000</amount>
    <pi>van de Geijn, Robert</pi>
    <program>HIGH-PERFORMANCE COMPUTING</program>
    <programelementcode>7942</programelementcode>
    <copi>Victor Eijkhout</copi>
  </document>
  <document>
    <docID>0917166</docID>
    <docDate>August 15, 2009</docDate>
    <docSource></docSource>
    <docText>NetSE: Small: Collaborative Research: A Geometric Computational Approach to Efficiently Deploy and Manage Self-Organizing Wireless Communication Networks

      Abstract   This award is funded under the American Recovery and Reinvestment Act   of 2009 (Public Law 111-5).     The project will develop efficient mechanisms for deploying and managing wireless self-organizing networks (WSONs). These networks are able to manage themselves with little or no human intervention and consequently can be deployed in remote, difficult-to-access areas, under adverse conditions, and/or when users have little or no network administration skills. As such, WSONs can have significant societal and scientific impact as key enablers of numerous applications, including emergency response, disaster relief, community networking, environmental monitoring, and surveillance.     Intellectual Merit: This work will develop theoretical foundations for efficient WSON node placement and trajectory control based on geometric computation and optimization. The technical approach explores the synergy among a variety of disciplines, including wireless communications, facility location, geometric and distributed optimization, and systems and control theory. The project will (i) explore, develop, and evaluate novel geometric computing strategies for WSON placement, management, and control in order to optimize system performance for a range of applications, and (ii) deploy the proposed strategies in real-world environments motivated by our ongoing collaborations with biologists and oceanographers.     Broader Impact: The WSON deployment and management strategies developed in this work will be key enabling technology for a variety of applications with considerable societal and scientific significance. The project also includes an important educational component. It will produce exciting MSc and PhD theses, incorporate results into graduate classes, and engage undergraduate students via field experiments, senior design projects and summer REUs.</docText>
    <division>CCF</division>
    <directorate>CSE</directorate>
    <award-instr>Standard Grant</award-instr>
    <programreferencecode>HPCC</programreferencecode>
    <keyword>network</keyword>
    <amount>250000</amount>
    <keyword>wireless</keyword>
    <programreferencecode>9218</programreferencecode>
    <state>CA</state>
    <fieldofapplication>0000912 Computer Science</fieldofapplication>
    <keyword>networking</keyword>
    <organization>University of California-San Diego</organization>
    <progmgr>Eun K. Park</progmgr>
    <programreferencecode>6890</programreferencecode>
    <program>NETWORK SCIENCE &amp; ENGINEERING</program>
    <programelementcode>7794</programelementcode>
    <programreferencecode>7794</programreferencecode>
    <programreferencecode>7923</programreferencecode>
    <pi>Cortes, Jorge</pi>
  </document>
  <document>
    <docID>0917158</docID>
    <docDate>August 1, 2009</docDate>
    <docSource></docSource>
    <docText>SHF:Small:Multicore Hardware/Software CoDesign using Fast, Cycle-Accurate Simulators

   Tuning software for improved performance/power is often extremely difficult because one cannot easily observe the entire inner workings and power consumption of running hardware at a fine time resolution.  Thus, determining the root cause of performance and power issues can often only be done by careful crafting of experimental code, running that code, and measuring the limited information that can be observed.    This proposed research is aimed at designing a new class of very fast and accurate simulators that, with proper instrumentation, can provide significantly more visibility than the modeled hardware.  However, such simulators can result in information overload, making finding the issues difficult. Thus, the PI proposes to investigate methods to effectively and automatically find such issues so that they can more quickly and easily be addressed.  Such methods could result in more efficient computer systems that can solve problems faster and/or use less energy, potentially impacting hardware and software developers and users alike.</docText>
    <division>CCF</division>
    <directorate>CSE</directorate>
    <state>TX</state>
    <award-instr>Standard Grant</award-instr>
    <programreferencecode>HPCC</programreferencecode>
    <programreferencecode>9216</programreferencecode>
    <programreferencecode>9218</programreferencecode>
    <fieldofapplication>0000912 Computer Science</fieldofapplication>
    <organization>University of Texas at Austin</organization>
    <progmgr>Chitaranjan Das</progmgr>
    <programreferencecode>9217</programreferencecode>
    <program>COMPUTER ARCHITECTURE</program>
    <programelementcode>7941</programelementcode>
    <pi>Chiou, Derek</pi>
    <amount>433219</amount>
  </document>
  <document>
    <docID>0917153</docID>
    <docDate>August 1, 2009</docDate>
    <docSource></docSource>
    <docText>AF: Small:Explorations in Computational Learning Theory

   A primary goal of machine learning is to have computers "learn" from data, and to make predictions based on what they have learned.  Machine learning has been used in many applications, such as identification of spam emails, detection of suspicious computer network traffic, and detection of malignant tumors.  The use of machine learning is based on the implicit assumption that there is a mathematical function that describes, with some accuracy, the relation between the inputs to the prediction problem and the correct prediction.  The function is not arbitrary; instead, it is of a certain restricted type.  However, not all types of functions are efficiently learnable.  Also, learnability depends crucially on the type of data that is available.    This project focuses on the learnability of Boolean functions, a central topic in computational learning theory.  The research in this project falls into three main categories: learning from random examples, learning with costs, and DNF learning and minimization.  Problems in the first category address core open questions in the standard PAC learning model and explore the extent to which access to data from different probability distributions can aid in learning.  Problems in the second category are motivated by concrete problems in protein engineering, databases, and cyber-security, where there are costs associated with determining the value of inputs, or in obtaining data.  The third category concerns problems of properly learning DNF formulas using DNF hypotheses, related complexity theoretic problems concerning DNF minimization, and problems concerning the complexity of certificates of DNF size.    Broadly, this project seeks to expand our understanding of which types of functions are efficiently learnable by computers, and under what conditions.  The research on learning with costs can yield advances in the application areas that motivate it.  DNF minimization is a central problem in both complexity theory and in the design of logic circuits; the research on DNF has the potential for impact in both these areas.</docText>
    <division>CCF</division>
    <directorate>CSE</directorate>
    <award-instr>Standard Grant</award-instr>
    <programreferencecode>HPCC</programreferencecode>
    <keyword>network</keyword>
    <keyword>security</keyword>
    <programreferencecode>9218</programreferencecode>
    <state>NY</state>
    <fieldofapplication>0000912 Computer Science</fieldofapplication>
    <progmgr>Richard Beigel</progmgr>
    <organization>Polytechnic University of New York</organization>
    <keyword>machine learning</keyword>
    <program>ALGORITHMS</program>
    <programelementcode>7926</programelementcode>
    <pi>Hellerstein, Lisa</pi>
    <amount>338698</amount>
  </document>
  <document>
    <docID>0917140</docID>
    <docDate>August 1, 2009</docDate>
    <docSource></docSource>
    <docText>SHF:Small:Reasoning about Specifications of Computations

   The research will develop the foundations for a framework for reasoning about the formal properties of programming languages, compilers, software specifications, concurrent systems and other related computational systems. The framework will be based on two separate but interacting logics. One logic will be geared towards specifying and prototyping varied software systems. The second logic, referred to as the meta-logic, will provide flexible and powerful mechanisms for reasoning about specifications written in the first logic. The objects to be specified and reasoned about typically have complex syntactic structures, often involving some form of binding. Use will be made of a higher-order approach to representing syntactic structure in both logics to facilitate a natural treatment of such objects. Useful new logical capabilities will be exposed and embedded in actual computer systems that can be used in prototyping and reasoning tasks in the intended domains. The insights and the tools produced will be used pedagogically to expose high-school students and beginning undergraduates to important ideas in logic and computation. A close collaboration with a group of French researchers will provide an international dimension to the research, co-funded in part by the NSF Office of International Science and Engineering. In the long run, mechanized formal specification of (and reasoning about) programming languages has clear application to the improvement of software infrastructure in the real world: its correctness, reliability, maintainability, and security.</docText>
    <division>CCF</division>
    <directorate>CSE</directorate>
    <award-instr>Standard Grant</award-instr>
    <programreferencecode>HPCC</programreferencecode>
    <programreferencecode>9216</programreferencecode>
    <organization>University of Minnesota-Twin Cities</organization>
    <state>MN</state>
    <keyword>security</keyword>
    <programreferencecode>9218</programreferencecode>
    <fieldofapplication>0000912 Computer Science</fieldofapplication>
    <keyword>programming languages</keyword>
    <progmgr>Sol J. Greenspan</progmgr>
    <program>COLLABORATIVE RESEARCH</program>
    <programelementcode>7298</programelementcode>
    <programreferencecode>9217</programreferencecode>
    <pi>Nadathur, Gopalan</pi>
    <programreferencecode>5979</programreferencecode>
    <programreferencecode>5918</programreferencecode>
    <program>PROGRAMMING LANGUAGES</program>
    <programelementcode>7943</programelementcode>
    <amount>548843</amount>
  </document>
  <document>
    <docID>0917134</docID>
    <docDate>September 1, 2009</docDate>
    <docSource></docSource>
    <docText>SHF:  Small:  Rethinking Computer Architecture for Secure and Resilient Systems

   Our society, economy and national security are critically dependent on computers and computing devices.  With a few hops, commodity computers and mobile phones can be connected to secret or sensitive information or to critical infrastructures.  However, mainstream commodity computers have not been designed with security in mind, for the last three or more decades. Rather, they have been designed to improve performance, energy efficiency, cost or size, with security added on as an after-thought.  While some specialized secure computers have been built, up to now, one had to sacrifice performance (or cost and convenience) for security. In this research, the PI plans to explore what is feasible if we allow ourselves a clean-slate design, where security is a first-class goal, on par with performance and other goals.  The investigation will rethink computer architecture from first principles to significantly improve both the security and the performance of future computers.    The research has two thrusts: how to design computer architecture to enable more secure software and systems, and how to design computer hardware components that are themselves more trustworthy.  The PI will develop a new threat-based design methodology for computer architecture, examining how to build security awareness into the design of each basic aspect of computing.  New architectural foundations for secure processing, secure memories, secure caches, secure virtual memory translation, secure storage, and secure control flow will be developed.  The research will focus on providing the cornerstones of security: Confidential and Integrity of critical information, and Availability, in the sense of resilient attestation and execution of security-critical tasks even when parts of the system may have been corrupted. The solutions will also consider hardware attacks, in addition to the software and network attacks considered by software security solutions and the current state-of-the-art hardware TPM (Trusted Platform Module) solution.      The intellectual contributions of this research will be new architectural foundations, and a new dimension of "threat-based design" in the research and development of all future computers. The broader impact of this research is to provide core security technology that can be built into commodity computing devices and their servers.  These can be used in computer, communications, control, entertainment and embedded systems to build significantly more secure systems that will provide a leap forward in information and cyber security, benefiting our society.</docText>
    <division>CCF</division>
    <directorate>CSE</directorate>
    <award-instr>Standard Grant</award-instr>
    <programreferencecode>HPCC</programreferencecode>
    <programreferencecode>9216</programreferencecode>
    <keyword>network</keyword>
    <keyword>security</keyword>
    <keyword>architecture</keyword>
    <state>NJ</state>
    <programreferencecode>9218</programreferencecode>
    <fieldofapplication>0000912 Computer Science</fieldofapplication>
    <program>INFORMATION TECHNOLOGY RESEARC</program>
    <programelementcode>1640</programelementcode>
    <keyword>embedded systems</keyword>
    <organization>Princeton University</organization>
    <progmgr>Chitaranjan Das</progmgr>
    <programreferencecode>9217</programreferencecode>
    <amount>400000</amount>
    <pi>Lee, Ruby</pi>
  </document>
  <document>
    <docID>0917129</docID>
    <docDate>September 1, 2009</docDate>
    <docSource></docSource>
    <docText>III: Small: Making and Tracing:  Architecture-centric Information Integration

   In many scientific domains information is scattered across numerous interrelated and heterogeneous artifacts. In software engineering in particular, artifacts such as requirements, design documents, and code are often isolated by tools, development groups, and geographic locations. Current traceability approaches ? attempts to link related information ? fall short in tracing across heterogeneous artifacts and in supporting user-customized links. This project is aimed at crossing these information barriers, enabling the creation of traceability links between related artifacts, to support tasks such as impact analysis and software maintenance.    This project targets automated architecture-centric traceability which centers links on the architecture, enabling scalable and flexible link capture. Furthermore, stakeholders control link capture, enabling them to directly benefit from the links. The prevalent approach to automatic traceability is to recover links from existing artifacts.  In contrast, this project pursues prospective generation of trace links which captures links in situ, while artifacts are generated or modified, enabling the capture of contextual relationships. Open hypermedia adapters enable the capture of links across heterogeneous artifacts and the rendering of resources at different levels of granularity. Users can determine the artifacts to trace and the link semantics to assign via externally customizable rules.    The approach is applicable to data provenance capture in e-Science.  Prospective capture can aid in inferring experiment design and capturing links across heterogeneous artifacts like publications, data files, and plots. The results will also be valuable to the development of safety critical systems where satisfaction of all requirements is part of safety assurance.</docText>
    <division>CCF</division>
    <directorate>CSE</directorate>
    <award-instr>Standard Grant</award-instr>
    <programreferencecode>HPCC</programreferencecode>
    <keyword>architecture</keyword>
    <programreferencecode>9218</programreferencecode>
    <state>CA</state>
    <keyword>software engineering</keyword>
    <fieldofapplication>0000912 Computer Science</fieldofapplication>
    <progmgr>Sol J. Greenspan</progmgr>
    <organization>University of California-Irvine</organization>
    <fieldofapplication>0116000 Human Subjects</fieldofapplication>
    <program>SOFTWARE ENG &amp; FORMAL METHODS</program>
    <programelementcode>7944</programelementcode>
    <pi>Taylor, Richard</pi>
    <programreferencecode>7364</programreferencecode>
    <programreferencecode>7923</programreferencecode>
    <amount>499596</amount>
  </document>
  <document>
    <docID>0917096</docID>
    <docDate>August 15, 2009</docDate>
    <docSource></docSource>
    <docText>AF: Small: Toward mechanical derivation of Krylov space algorithms

   The objective of this research is to systematize the derivation of algorithms in the field of iterative linear system solving: iterative methods, preconditioners, multigrid. The approach is by extending the Formal Linear Algebra Methods Environment (FLAME), a system originally developed for deriving dense matrix algorithms.    The merit of this research lies firstly in the fact that it facilitates experimentation, since it makes derivation of new algorithms essentially simpler than the lengthy induction arguments that are traditionally necessary. Secondly, it will lead to algorithms being proved correct by the very mechanism of derivation. Finally, a complete systematization of  FLAME may take the form of a symbolic system, where algorithm implementations are derived mechanically, steered by the user but otherwise autonomously, from a specification of their properties rather than from an algorithmic description.    The impact of this research will be on the computational community, since it lowers the threshold to exploring new algorithmic strategies, and on software developers, since it makes it easier to derive correct implementations of algorithms. Additionally, it will impact the way the subject of iterative linear system solving is taught, since FLAME worksheets offer a simpler and more insightful description of algorithms than is used traditionally.</docText>
    <keyword>algorithms</keyword>
    <division>CCF</division>
    <directorate>CSE</directorate>
    <state>TX</state>
    <award-instr>Standard Grant</award-instr>
    <programreferencecode>HPCC</programreferencecode>
    <programreferencecode>9218</programreferencecode>
    <fieldofapplication>0000912 Computer Science</fieldofapplication>
    <organization>University of Texas at Austin</organization>
    <progmgr>Lenore M. Mullin</progmgr>
    <program>NUM, SYMBOL, &amp; ALGEBRA COMPUT</program>
    <programelementcode>7933</programelementcode>
    <pi>Eijkhout, Victor</pi>
    <copi>Robert van de Geijn</copi>
    <amount>473123</amount>
  </document>
  <document>
    <docID>0917093</docID>
    <docDate>September 1, 2009</docDate>
    <docSource></docSource>
    <docText>AF: Small: Analysis Algorithms: Continuous and Algebraic Amortization

   Adaptive numerical algorithms are widely used to solve continuous problems in Computational Science and Engineering (CS &amp; E).  Unlike discrete combinatorial algorithms which predominate in Theoretical Computer Science, such algorithms for the continua are typically numerical in nature, iterative in form, and have adaptive complexity.  The complexity analysis of such algorithms is a major challenge for theoretical computer science.  In particular, it is necessary to properly account for the adaptivity that are inherent in such algorithms.  Until now, all complexity analysis that accounts for adaptivity (for example, in linear programming) must invoke some probabilistic assumptions.  The broader impact of this project lies in the push to extend the scope of theoretical algorithms into the realm of continuous computation.  The project is seen as part of a research program to develop a computational model and complexity theory for real computation, one that can account for the vast majority of algorithms in CS &amp; E.    This project develops a new non-probabilistic analysis technique called continuous amortization.  It is able to quantify the complexity of an input instance as an integral, and reduce the problem to providing explicit bounds on the integral.  The success in producing the first example of such adaptive bounds for the 1-dimensional case is now extended to higher dimensions.  In order to bound these integrals, one needs another form of amortization called algebraic amortization.  This generalizes the usual zero bounds by simultaneously bounding a product of individual bounds.  These advances build upon the principal investigator's work in previous NSF projects on Exact Geometric Computation.  The project also validates its algorithms by implementing them using the open-source Core Library software.</docText>
    <keyword>algorithms</keyword>
    <division>CCF</division>
    <directorate>CSE</directorate>
    <award-instr>Standard Grant</award-instr>
    <programreferencecode>HPCC</programreferencecode>
    <programreferencecode>9218</programreferencecode>
    <state>NY</state>
    <fieldofapplication>0000912 Computer Science</fieldofapplication>
    <progmgr>Richard Beigel</progmgr>
    <keyword>computational science</keyword>
    <pi>Yap, Chee</pi>
    <organization>New York University</organization>
    <program>ALGORITHMS</program>
    <programelementcode>7926</programelementcode>
    <amount>495792</amount>
  </document>
  <document>
    <docID>0917092</docID>
    <docDate>September 1, 2009</docDate>
    <docSource></docSource>
    <docText>SHF: Small: Change Theory for Variation-Aware Programming

   The management of changes is a difficult and error-prone process in software maintenance and many other fields. Due to a lack of theory, there are few tools and methods available to systematically change objects while preserving important properties along with such changes.  This problem is addressed by the theory of structured change. The overall research objective is to find principles for sound change management and to establish a theoretical foundation for the development of supporting tools. One particular goal is the development of domain-specific languages, which users can employ to effectively manage changes in all kinds of software applications.    The following technical approach is pursued. First, a flexible change representation is developed. Based on this representation, laws of a change algebra will be established to identify property-preserving transformations that can support sound change transitions. This work is accompanied by the development of algorithms for the incremental checking of property preservation. Ultimately, the theory will enable the development of tools that help users to effectively manage the evolution of objects. This goal is supported by the investigation of interaction principles that underly the editing and exploration of structured objects and their changes. Building on top of the theoretical foundation, the development of domain-specific languages will provide concrete help for users to express more sophisticated transformations and combinations than the simple one-step operations that are offered by the underlying formal model. Specifically, in the area of change representations for programs such a DSL will yield new, theoretically founded support for feature-oriented programming and software product lines. In the context of spreadsheets, web sites, etc. the development of such DSLs will empower millions of users to deal in a more systematic way with changes.</docText>
    <keyword>algorithms</keyword>
    <division>CCF</division>
    <directorate>CSE</directorate>
    <award-instr>Standard Grant</award-instr>
    <programreferencecode>HPCC</programreferencecode>
    <programreferencecode>9216</programreferencecode>
    <programreferencecode>9218</programreferencecode>
    <fieldofapplication>0000912 Computer Science</fieldofapplication>
    <state>OR</state>
    <progmgr>Sol J. Greenspan</progmgr>
    <organization>Oregon State University</organization>
    <programreferencecode>9217</programreferencecode>
    <program>SOFTWARE ENG &amp; FORMAL METHODS</program>
    <programelementcode>7944</programelementcode>
    <pi>Erwig, Martin</pi>
    <amount>284708</amount>
  </document>
  <document>
    <docID>0917057</docID>
    <docDate>August 1, 2009</docDate>
    <docSource></docSource>
    <docText>CIF: SMALL: Information Theoretic Multi-Core Processor Thermal Profile Estimation

   Dynamic thermal management is the process of controlling surges in the operating temperature especially of a multi-core processor during runtime, based on limited measurements by on-chip thermal sensors. Managing thermal sensors and processing their measurements presents a rich vein of theoretical and practical challenges including: deciding on the number, location and type of thermal sensors; estimating the thermal profile; and characterizing the fundamental performance tradeoffs between sensor quantity and complexity in guaranteeing estimate accuracy. In this interdisciplinary project, we propose a new approach to the problem of thermal profile estimation in multi-core processors which relies on fundamental information theoretic principles. Our approach rests on new problems in information theory that capture the salient features of on-chip thermal profile estimation. Our new formulations are inspired notably by rate distortion theory and also bear a similarity to compressed sensing. Furthermore, our approach has wider applicability to general problems of parameter estimation based on limited sampled and quantized measurements.    The project has a home in computer architecture, VLSI design as well as one in information theory and compressed sensing. Its potential impact is twofold: (a) improvement in the performance and reliability of multi-core processors; and (b) new models and problem formulations in the fields of information theory and compressed sensing. The broad reach of this project will provide a valuable learning environment for the investigators and their graduate and undergraduate students. The basic elements of the technical approach will be discussed in Special Topics courses and seminars with the participation of graduate students.</docText>
    <division>CCF</division>
    <directorate>CSE</directorate>
    <award-instr>Standard Grant</award-instr>
    <programreferencecode>HPCC</programreferencecode>
    <organization>University of Maryland College Park</organization>
    <state>MD</state>
    <keyword>architecture</keyword>
    <programreferencecode>9218</programreferencecode>
    <fieldofapplication>0000912 Computer Science</fieldofapplication>
    <keyword>vlsi</keyword>
    <progmgr>Sankar Basu</progmgr>
    <amount>450000</amount>
    <copi>Prakash Narayan</copi>
    <pi>Srivastava, Ankur</pi>
    <program>DES AUTO FOR MICRO &amp; NANO SYST</program>
    <programelementcode>7945</programelementcode>
  </document>
  <document>
    <docID>0917047</docID>
    <docDate>September 1, 2009</docDate>
    <docSource></docSource>
    <docText>Enabling Practical Cross-domain Logic-based Access Control

   Access control is one of the key aspects of information security.  In  the past decade and a half, significant progress has been made in  increasing the assurance and expressiveness offered by access-control  systems, in large part through the use of formal logics to model or  implement these systems.    A particular challenge in building access-control systems is to allow  delegation between domains that use different authorization logics.  This project focuses on developing a framework for interfacing  different, mutually incompatible authorization logics.	The framework  provides an interface for communication between logics via a very  small set of primitives that imposes no fundamental constraints on the  design of the logics that use it.  Part of this framework will be an  architecture to facilitate the automated construction of proofs of  access.    Another barrier to implementing logic-based access-control systems is  that substantial effort is typically required to retrofit existing  systems to support the use of theorem provers, proof checkers, and  associated infrastructure.  This project will investigate several  approaches to solving this problem, including automated program  rewriting and automated construction of lightweight theorem provers  and proof checkers.</docText>
    <division>CCF</division>
    <directorate>CSE</directorate>
    <award-instr>Standard Grant</award-instr>
    <programreferencecode>HPCC</programreferencecode>
    <keyword>security</keyword>
    <keyword>architecture</keyword>
    <programreferencecode>9218</programreferencecode>
    <state>PA</state>
    <progmgr>Richard Beigel</progmgr>
    <organization>Carnegie-Mellon University</organization>
    <program>TRUSTWORTHY COMPUTING</program>
    <programelementcode>7795</programelementcode>
    <programreferencecode>7923</programreferencecode>
    <pi>Bauer, Ljudevit</pi>
    <amount>435628</amount>
  </document>
  <document>
    <docID>0917026</docID>
    <docDate>September 1, 2009</docDate>
    <docSource></docSource>
    <docText>AF:Small:RUI:Concrete Computational Complexity

   The goal of computational complexity theory is to determine the computational resources needed to carry out various computational tasks. The resources measured may involve hardware (such as gates used to construct a circuit, or area on a chip) or software (such as the time or space used in the execution of a program on a machine), and the tasks considered may range from simple addition of two integers to a large algebraic or geometric computation.    This project will deal primarily with "low level" complexity theory, in which the resources required grow modestly (at most quadratically) with the size of the task. Examples of such tasks are furnished by the arithmetic operations (addition, subtraction, multiplication, division and square-root extraction) performed by the executions of single instructions in a computer.  For these tasks, hardware-oriented resource measures are most appropriate in most cases.    The broader impacts of the project lie in the opportunity it will provide to explore a new model for undergraduate research. The most common model for undergraduate research is to give students problems that they may reasonably be expected to solve within the time allowed (typically an academic year for a senior thesis, or ten weeks for a summer assignment).  This project will explore a new model, wherein students are assigned the task of working on an authentic research problem (one that has resisted solution for many years, and is unlikely to be resolved with a single new stroke), with the goal of making a contribution (even a small one) that might play a role in an eventual resolution. If explored with imagination, this new model should provide a valuable complement to the established practices for undergraduate research.</docText>
    <division>CCF</division>
    <directorate>CSE</directorate>
    <award-instr>Standard Grant</award-instr>
    <programreferencecode>HPCC</programreferencecode>
    <programreferencecode>9218</programreferencecode>
    <state>CA</state>
    <fieldofapplication>0000912 Computer Science</fieldofapplication>
    <progmgr>Richard Beigel</progmgr>
    <programreferencecode>9229</programreferencecode>
    <pi>Pippenger, Nicholas</pi>
    <organization>Harvey Mudd College</organization>
    <program>COMPLEXITY &amp; CRYPTOGRAPHY</program>
    <programelementcode>7927</programelementcode>
    <amount>122124</amount>
  </document>
  <document>
    <docID>0917015</docID>
    <docDate>July 1, 2009</docDate>
    <docSource></docSource>
    <docText>CCF (CIF): Small: Recursive Reconstruction of Sparse Signal Sequences

   Recursive Reconstruction of Sparse Signal Sequences    This research focuses on recursive algorithms for causally reconstructing a time sequence of (approximately) sparse signals from a small number of ``incoherent" linear projections. The algorithms will be useful for real-time dynamic magnetic resonance imaging (MRI) in interventional radiology applications such as image-guided surgery or in functional-MRI.   MRI is currently not usable for such real-time applications due to its "relatively slow image acquisition" (large data acquisition times and/or slow image reconstruction algorithms). Other potential applications include dynamic tomography for solar imaging or real-time single-pixel video imaging.    Since the recent introduction of compressive sensing (CS), the static version of the above problem has been thoroughly studied. But most existing algorithms for the dynamic problem just use CS to jointly reconstruct the entire time sequence in one go. This is a batch solution and has very high complexity. The alternative - CS at each time (simple  CS) - requires many more measurements. This research is the first to develop and analyze recursive algorithms for signal sequence reconstruction, which have the same complexity as simple CS, but which (a) achieve exact reconstruction using much fewer noise-free measurements than those needed by simple CS; (b) achieve provably smaller reconstruction error than simple CS, when using noisy measurements, especially when the number of measurements is small; and (c) are provably stable over time (reconstruction error remains bounded). Fewer measurements means reduced scan times for MRI, while recursive reconstruction means real-time imaging is possible. By exploiting the fact that sparsity patterns change slowly over time, the problem is formulated as one of compressive sensing with partially known support.    CS and sequential CS are incorporated into the graduate/undergraduate curriculum and into senior-design at appropriate levels.</docText>
    <keyword>algorithms</keyword>
    <division>CCF</division>
    <directorate>CSE</directorate>
    <award-instr>Standard Grant</award-instr>
    <programreferencecode>HPCC</programreferencecode>
    <programreferencecode>9218</programreferencecode>
    <progmgr>John Cozzens</progmgr>
    <fieldofapplication>0000912 Computer Science</fieldofapplication>
    <organization>Iowa State University</organization>
    <state>IA</state>
    <program>SIGNAL PROCESSING</program>
    <programelementcode>7936</programelementcode>
    <pi>Vaswani, Namrata</pi>
    <amount>279279</amount>
  </document>
  <document>
    <docID>0917014</docID>
    <docDate>July 15, 2009</docDate>
    <docSource></docSource>
    <docText>CIF:RI:Small:Content-Based Strategies of Image and Video Quality Assessment

   Abstract  Emerging demands on ubiquitous multimedia access continue to push coding algorithms to ca-pitalize on content-based properties of images and video. For example, by identifying and pre-serving regions-of-interest, or by synthesizing textures at the decoder, it is possible to dramati-cally reduce bandwidth requirements while preserving visual quality. These next-generation coding strategies must be accompanied by next-generation quality assessment algorithms that can handle the unique coding artifacts. Yet, determining quality in a manner that agrees with human perception remains a grand research challenge. Current quality assessment methods use a fixed analysis, whereas human perception adapts to the image?s content. In order to meet increasing demands on bandwidth, mobility, and IP streaming, there is a critical need to push the state-of-the-art in quality assessment toward such a content-adaptive approach.    In this research, the investigator conducts a series of studies designed to examine the utility of content-adaptive models of human vision for quality assessment of images/video containing degradation and enhancement. The first study will collect a large set of subjective ratings for enhanced and degraded images and video. This effort will provide ground-truth data for training and validation. Using these data, the investigator will: (1) Research new methods of quality as-sessment that can deal with images containing enhancement. (2) Research and model the mul-tiple strategies employed by the human visual system during quality assessment, including de-veloping content-based neural models and image-adaptive techniques of strategy selection. (3) Research the relationship between quality and regions-of-interest. This research will lead to more accurate and robust methods of quality assessment, and it will lay the groundwork for next-generation perceptual models that take into account the adaptive nature of human vision.</docText>
    <keyword>algorithms</keyword>
    <division>CCF</division>
    <directorate>CSE</directorate>
    <award-instr>Standard Grant</award-instr>
    <programreferencecode>HPCC</programreferencecode>
    <programreferencecode>9218</programreferencecode>
    <progmgr>John Cozzens</progmgr>
    <fieldofapplication>0000912 Computer Science</fieldofapplication>
    <keyword>multimedia</keyword>
    <keyword>ubiquitous</keyword>
    <programreferencecode>9150</programreferencecode>
    <keyword>vision</keyword>
    <program>SIGNAL PROCESSING</program>
    <programelementcode>7936</programelementcode>
    <state>OK</state>
    <organization>Oklahoma State University</organization>
    <pi>Chandler, Damon</pi>
    <amount>165281</amount>
  </document>
  <document>
    <docID>0917007</docID>
    <docDate>September 1, 2009</docDate>
    <docSource></docSource>
    <docText>CSR: Small: Automated Software Failure Causal Path Computation

   Automating debugging has been a long standing grand challenge.  Central to automated debugging is the capability of identifying failure causal paths, which are paths leading from the root cause to the failure with each step causally connected. It is key to understanding and fixing a software fault. The project develops a novel scalable debugging technique. Given a failure and the desired output, the technique produces the failure causal path.    The following enabling techniques are devised. Given a failure and the desired output, the first technique is to search for a dynamic patch to the failure such that the patched execution generates the desired output. Sample patches include negating the branch outcome of a predicate execution. The second technique is to align the failing and the patched executions to facilitate later comparison. It consists of control flow alignment and memory alignment. Two runs may differ in control flow so that correspondence between execution points need to be established. A data structure may be allocated to different memory locations so that memories also need to be aligned. The third technique is to efficiently compare the program states of the two runs at the aligned places to generate the causal path. The ramifications include reducing resource consumption of debugging and improving software productivity and dependability.</docText>
    <division>CCF</division>
    <directorate>CSE</directorate>
    <award-instr>Standard Grant</award-instr>
    <programreferencecode>HPCC</programreferencecode>
    <programreferencecode>9218</programreferencecode>
    <organization>Purdue University</organization>
    <state>IN</state>
    <fieldofapplication>0000912 Computer Science</fieldofapplication>
    <progmgr>Sol J. Greenspan</progmgr>
    <program>SOFTWARE ENG &amp; FORMAL METHODS</program>
    <programelementcode>7944</programelementcode>
    <pi>Zhang, Xiangyu</pi>
    <amount>493298</amount>
    <programreferencecode>7354</programreferencecode>
  </document>
  <document>
    <docID>0917000</docID>
    <docDate>September 15, 2009</docDate>
    <docSource></docSource>
    <docText>SHF: Small: 3D Integration of Sub-Threshold Multi-core Co-processor for Ultra Lower Power Computing

   "This award is funded under the American Recovery and Reinvestment Act of 2009 (Public Law 111-5)."    A fundamentally different approach for circuit design that has recently gaining popularity is sub-threshold circuits, where the power supply is set below the transistor threshold voltage to obtain energy savings when speed is not the primary constraint. Individual circuits or processing element designed at sub-threshold region operates slowly, but throughput of the circuit can be improved by operating many of them in parallel. Hence, a processing fabric with many sub-threshold cores can be a suitable platform for throughput-oriented parallel applications. This proposal explores the viability of 3D die-stacking of sub-threshold and super-threshold circuits for low power computing. More specifically, our sub-threshold die contains many small sub-threshold cores, whereas our super-threshold die consists of several large super-threshold cores. The sub-threshold cores are used as co-processors to execute massively parallel, high-throughput, low/mid-performance tasks at ultra low power, while the main super-threshold processors handle high-performance sequential tasks.     This new cooperative computing hardware is expected to provide a viable platform for many useful embedded software applications that require both high-performance/power tasks as well as low-performance/power tasks. 3D integration will allow each die to utilize the process technology optimized for sub- and super-threshold operation and be seamlessly integrated into a single system. TSV (through silicon via) based 3D communication requires no off-chip access, thereby reducing power consumption further. Sub-threshold circuits are currently used for some low-power applications such as watches, hearing aids, distributed sensor networks, filters, and even pipelined micro-processors. 3D integration is already available in the embedded domain, and the high-performance processor industry is actively evaluating this technology for general purpose computing. This research will fill a critical gap that is needed to make 3D-integrated sub-threshold multi-core co-processors a reality.</docText>
    <division>CCF</division>
    <directorate>CSE</directorate>
    <award-instr>Standard Grant</award-instr>
    <programreferencecode>HPCC</programreferencecode>
    <programreferencecode>9216</programreferencecode>
    <organization>GA Tech Research Corporation - GA Institute of Technology</organization>
    <state>GA</state>
    <programreferencecode>9218</programreferencecode>
    <fieldofapplication>0000912 Computer Science</fieldofapplication>
    <progmgr>Sankar Basu</progmgr>
    <amount>450000</amount>
    <programreferencecode>9217</programreferencecode>
    <pi>Lim, Sung</pi>
    <programreferencecode>6890</programreferencecode>
    <program>TRUSTWORTHY COMPUTING</program>
    <programelementcode>7795</programelementcode>
    <copi>Saibal Mukhopadhyay</copi>
  </document>
  <document>
    <docID>0916971</docID>
    <docDate>August 1, 2009</docDate>
    <docSource></docSource>
    <docText>SHF: Small: SISA: A System-Level ISA for Power-Performance Management in CMPs

   Over recent decades, power and complexity challenges have limited the ability to derive continued growth in computing performance through clock frequency scaling. Future growth will come through implementing systems with many independent processors on the same chip. Challenges lie, however, in writing software for these systems, and in creating software that is portable across several hardware generations.  For parallel software to smoothly exploit a chip's computation and communication capabilities, hardware needs better information regarding software's structure and resource requirements. Analogous to the traditional, fine-grained instruction set architecture (ISA), this research proposes a higher-level, coarse-grained System-level ISA or SISA.  SISA provides information on computational chunks and the data or synchronization dependencies between them.  Expressing software as a coarse-grained directed graph, SISA enables efficient, adaptive scheduling of parallel computation and communication.  It also offers other benefits for reliability, energy-efficiency and portability.     The proposed research program will have broad impact in several ways.  First, the PI has a solid track record of knowledge dissemination and technology transfer. This includes extensive collaborative relationships with industry, and several patents.  In addition, the PI has a track record of releasing high-impact software tools for external use. The Wattch power modeling tool is one of five major tools distributions from her group, in use by thousands of computing researchers worldwide. The PI also has a strong track record of support for undergraduate research and underrepresented groups, and has also advised summers of undergraduate research with women and under-represented minorities through CRA-W and Princeton programs. She has been involved in teaching non-STEM students and multidisciplinary efforts, and will continue and broaden such activities through this research.</docText>
    <division>CCF</division>
    <directorate>CSE</directorate>
    <award-instr>Standard Grant</award-instr>
    <programreferencecode>HPCC</programreferencecode>
    <programreferencecode>9216</programreferencecode>
    <keyword>architecture</keyword>
    <state>NJ</state>
    <programreferencecode>9218</programreferencecode>
    <fieldofapplication>0000912 Computer Science</fieldofapplication>
    <organization>Princeton University</organization>
    <amount>450000</amount>
    <pi>Martonosi, Margaret</pi>
    <progmgr>Chitaranjan Das</progmgr>
    <programreferencecode>9217</programreferencecode>
    <program>COMPUTER ARCHITECTURE</program>
    <programelementcode>7941</programelementcode>
  </document>
  <document>
    <docID>0916962</docID>
    <docDate>September 1, 2009</docDate>
    <docSource></docSource>
    <docText>SHF: Software Tools and Techniques for Maximizing Realism on Multi-core  Processors

   High performance computing is used to run models of the real world. This is true in both ultra high performance simulations used in scientific computing to study Physics, Biology etc. as well in designing approximations of real world involving applications such as gaming, social networks etc. Maximizing realism of the world being modeled and mimicked is the key to get this right. This work attacks the problem of realism on two fronts : first a framework is developed to speed up sequential parts of  the computation using  a large number of available cores based on a new concept of probabilistic speed-up. Secondly a runtime solution is devised to maximize realism in immersive applications such as gaming under the constraint of responsiveness.  The frameworks involve  development of programming models, interfaces, APIs and run-time system to solve the above problems by managing the underlying parallelism and computation. Apart from research this effort involves developing a cross-cutting graduate level course that spans between simulations, algorithms and programming languages.</docText>
    <keyword>algorithms</keyword>
    <division>CCF</division>
    <directorate>CSE</directorate>
    <award-instr>Standard Grant</award-instr>
    <programreferencecode>HPCC</programreferencecode>
    <organization>GA Tech Research Corporation - GA Institute of Technology</organization>
    <state>GA</state>
    <programreferencecode>9218</programreferencecode>
    <progmgr>Almadena Y. Chtchelkanova</progmgr>
    <fieldofapplication>0000912 Computer Science</fieldofapplication>
    <keyword>scientific computing</keyword>
    <keyword>programming languages</keyword>
    <pi>Pande, Santosh</pi>
    <program>HIGH-PERFORMANCE COMPUTING</program>
    <programelementcode>7942</programelementcode>
    <amount>477239</amount>
  </document>
  <document>
    <docID>0916953</docID>
    <docDate>July 1, 2009</docDate>
    <docSource></docSource>
    <docText>CIF: Small:Sparse and Geometric Representations of Images and Multidimensional Signals

   Project:   Sparse and Geometric Representations of Images and Multidimensional Signals      Abstract:    One of the most fundamental characteristics of natural images and multidimensional signals is the presence of geometric regularities due to smooth boundaries between smooth regions.  Current representations for this class of signals such as curvelets, contourlets, shearlets, and surfacelets, are constructed in the frequency domain, which lead to basis functions with large spatial support and Gibbs oscillations.       This research develops new sparse representations for multidimensional signals with geometric regularities. These representations allow successive approximation from coarse to fine and will be digital friendly.  The investigators focus on spatial domain constructions based on true multidimensional and geometric lifting schemes that would lead to a new generation of geometric wavelets.  In addition, geometric tiling dictionaries with low coherence are explored.  The research aims for a precise connection between the continuous domain, where geometric regularity is characterized, and the discrete domain, where input signals and transforms are defined on sampling grids.  Finally, the research develops new processing algorithms that exploit the gained knowledge of geometrically regular signals and developed sparse representations.</docText>
    <keyword>algorithms</keyword>
    <division>CCF</division>
    <directorate>CSE</directorate>
    <award-instr>Standard Grant</award-instr>
    <programreferencecode>HPCC</programreferencecode>
    <programreferencecode>9218</programreferencecode>
    <progmgr>John Cozzens</progmgr>
    <fieldofapplication>0000912 Computer Science</fieldofapplication>
    <organization>University of Illinois at Urbana-Champaign</organization>
    <state>IL</state>
    <program>SIGNAL PROCESSING</program>
    <programelementcode>7936</programelementcode>
    <pi>Do, Minh</pi>
    <amount>335635</amount>
  </document>
  <document>
    <docID>0916941</docID>
    <docDate>August 15, 2009</docDate>
    <docSource></docSource>
    <docText>NetSE: Small: Collaborative Proposal: A Geometric Computational Approach to Efficiently Deploy and Manage Self-Organizing Wireless Communication Networks

   This award is funded under the American Recovery and Reinvestment Act  of 2009 (Public Law 111-5).     The project will develop efficient mechanisms for deploying and managing wireless self-organizing networks (WSONs). These networks are able to manage themselves with little or no human intervention and consequently can be deployed in remote, difficult-to-access areas, under adverse conditions, and/or when users have little or no network administration skills. As such, WSONs can have significant societal and scientific impact as key enablers of numerous applications, including emergency response, disaster relief, community networking, environmental monitoring, and surveillance.    Intellectual Merit: This work will develop theoretical foundations for efficient WSON node placement and trajectory control based on geometric computation and optimization.  The technical approach explores the synergy among a variety of disciplines, including wireless communications, facility location, geometric and distributed optimization, and systems and control theory.  The project will (i) explore, develop, and evaluate novel geometric computing strategies for WSON placement, management, and control in order to optimize system performance for a range of applications, and (ii) deploy the proposed strategies in real-world environments motivated by our ongoing collaborations with biologists and oceanographers.    Broader Impact: The WSON deployment and management strategies developed in this work will be key enabling technology for a variety of applications with considerable societal and scientific significance.  The project also includes an important educational component.  It will produce exciting MSc and PhD theses, incorporate results into graduate classes, and engage undergraduate students via field experiments, senior design projects and summer REUs.</docText>
    <division>CCF</division>
    <directorate>CSE</directorate>
    <award-instr>Standard Grant</award-instr>
    <programreferencecode>HPCC</programreferencecode>
    <keyword>network</keyword>
    <amount>250000</amount>
    <keyword>wireless</keyword>
    <programreferencecode>9218</programreferencecode>
    <state>CA</state>
    <fieldofapplication>0000912 Computer Science</fieldofapplication>
    <keyword>networking</keyword>
    <organization>University of California-Santa Cruz</organization>
    <progmgr>Eun K. Park</progmgr>
    <programreferencecode>6890</programreferencecode>
    <program>NETWORK SCIENCE &amp; ENGINEERING</program>
    <programelementcode>7794</programelementcode>
    <programreferencecode>7794</programreferencecode>
    <programreferencecode>7923</programreferencecode>
    <pi>Obraczka, Katia</pi>
  </document>
  <document>
    <docID>0916926</docID>
    <docDate>July 15, 2009</docDate>
    <docSource></docSource>
    <docText>SHF: Small: Collaborative Research: Imperfection-Resilient Scalable Digital Signal Processing Algorithms and Architectures Using Significance Driven Computation

   Present-day integrated circuits are expected to deliver high-quality/high-performance levels under ever-diminishing power budgets. Due to quadratic dependence of power on voltage, supply voltage scaling has been investigated as an effective method to reduce power. However, supply scaling increases the delays in all computation paths and can result in incorrect or incomplete computation of certain paths. Besides power dissipation, process variations also pose a major design concern with technology scaling. Supply voltage can be scaled-up or logic gates can be up-sized to prevent delay failures and to achieve higher parametric yield. However, such techniques come at the cost of increased power and/or die area. Meeting the contradictory requirements of high yield, low power and high quality are becoming exceedingly challenging in nanometer designs. Hence, there is a need for a scalable design methodology in which minimal output quality degradation is achieved under changing power constraints and process conditions. In addition, for a prescribed power consumption level and process, design methodology must take into account the effects of input signal noise and distortion on the fidelity of the Digital Signal Processing (DSP) computation and ensure that graceful output quality degradation is achieved under varying degrees of noise and distortion through proper algorithm and hardware design.                  The research involves development of a systematic methodology for reorganizing (transforming) algorithmic level computations, data and underlying hardware in such a way that minimum performance degradation in DSP systems is achieved under reduced power supply, increased process variations and reduced input signal quality. It has been observed that for DSP applications/systems, all computations are not equally important in shaping the output response. This information is exploited by the investigators to develop suitable algorithms/architectures that provide the ?right? trade-offs between output quality vs. energy consumption (supply scaling) vs. parametric yield due to process variations vs. input signal noise. To address resilience to process variations, the investigators identify the significant/not-so-significant components of such systems based on output sensitivities. Under such a scenario, with scaled supply voltage and/or parameter variations, if there are potential delay failures in some paths, only the less-significant computations are affected. In other words, using carefully designed algorithms and architectures, the investigators provide unequal error protection (under voltage over-scaling) to significant/not-so-significant computation elements, thereby achieving large improvements in power dissipation with graceful degradation in output signal quality.</docText>
    <keyword>algorithms</keyword>
    <division>CCF</division>
    <directorate>CSE</directorate>
    <award-instr>Standard Grant</award-instr>
    <programreferencecode>HPCC</programreferencecode>
    <amount>250000</amount>
    <programreferencecode>9218</programreferencecode>
    <progmgr>John Cozzens</progmgr>
    <organization>Purdue University</organization>
    <state>IN</state>
    <fieldofapplication>0000912 Computer Science</fieldofapplication>
    <program>SIGNAL PROCESSING</program>
    <programelementcode>7936</programelementcode>
    <pi>Roy, Kaushik</pi>
  </document>
  <document>
    <docID>0916919</docID>
    <docDate>August 15, 2009</docDate>
    <docSource></docSource>
    <docText>CIF: Small: New Approaches to the Design and Analysis of Graphical Models for Linear Codes and Secret Sharing Schemes

   NSF Proposal 0916919     New approaches to the design and analysis of graphical models for linear codes and secret sharing schemes    Abstract    Error-correcting coding enables one to design reliable systems of transmission and storage of information and is used universally for sending packets over the web, in writing data on CD's and flash memory devices, and other similar means of modern communication.  A very efficient method of encoding information for error protection is the so-called "iterative decoding," which assumes that every binary digit of transmission is recovered based on its realiblity and the realibility of a few other, carefully selected  bits of the encoded message. This method of error correction is analyzed based on the representation of the encoding as a graph in the plane in which recovery from errors proceeds by successive exchange of information between the nodes of the graph in an iterative procedure performed in a number of rounds.  One of the main goals of this research is to reduce complexity (the number of rounds) needed for reliable recovery of the transmission from errors in the communication medium.    Graphical models of linear codes have so far been restricted to trellises, i.e., cycle-free graphs, and graphs with exactly one cycle (tail-biting trellises). This research studies complexity of realization of codes and iterative decoding algorithms on connected graphs with cycles, deriving complexity estimates from the tree-decomposition of graphs. One of the goals of this research is to find methods of constructing low-complexity realizations of codes for such well-known code families as Reed-Muller and Reed-Solomon codes, and explore the optimality gap of these representations. Methods of matroid theory used in the study of graphical models will also be explored in the analysis of access structures of secret sharing schemes and secure multi-party computation protocols.</docText>
    <keyword>algorithms</keyword>
    <division>CCF</division>
    <directorate>CSE</directorate>
    <award-instr>Standard Grant</award-instr>
    <programreferencecode>HPCC</programreferencecode>
    <organization>University of Maryland College Park</organization>
    <state>MD</state>
    <programreferencecode>9218</programreferencecode>
    <fieldofapplication>0000912 Computer Science</fieldofapplication>
    <progmgr>William H Tranter</progmgr>
    <pi>Barg, Alexander</pi>
    <program>COMM &amp; INFORMATION THEORY</program>
    <programelementcode>7935</programelementcode>
    <amount>350729</amount>
  </document>
  <document>
    <docID>0916901</docID>
    <docDate>August 15, 2009</docDate>
    <docSource></docSource>
    <docText>SHF: SMALL: Ant: Automatic and Manual Debugging Support for Massively Parallel Programs

   This award is funded under the American Recovery and Reinvestment Act of 2009   (Public Law 111-5).    The research funded by this award targets the difficult  problem of how to debug programs running on large parallel systems.  The state   of hundreds to hundreds  of thousands of parallel tasks that form a single   computation are too complicated for a programmer to usefully analyze.    This project will develop tools to find similarities between the state of   different processes, simplifying the task of the programmer.  The challenge   in finding these similar tasks is to do it efficiently, without imposing an  overhead so hight that the tool is useless.  A naive implementation would   compare the state of all processors against one another, and would introduce   overheads increasing as the square of the number of processors.  Our approach   will successively refine sets of similar processes, will use key attributes   of program behavior (e.g. communication patterns) to perform this grouping.     We will also investigate the use these groups of similar processes to allow   invariance and statistically based techniques developed for sequential   programs (such as value and PC invariance) to be effectively adapted to   parallel programs.  Because these techniques look for rarely occurring program  activities, applying them to disparate processes together will introduce  noise into the analysis, severely diminishing their accuracy.  The use of   our grouping strategy  will allow effective parallelization of the   techniques, allowing them to be applied with significantly less overhead   than when used with sequential applications.</docText>
    <division>CCF</division>
    <directorate>CSE</directorate>
    <award-instr>Standard Grant</award-instr>
    <programreferencecode>HPCC</programreferencecode>
    <programreferencecode>9216</programreferencecode>
    <keyword>parallel systems</keyword>
    <programreferencecode>9218</programreferencecode>
    <organization>Purdue University</organization>
    <state>IN</state>
    <progmgr>Almadena Y. Chtchelkanova</progmgr>
    <fieldofapplication>0000912 Computer Science</fieldofapplication>
    <program>COMPILERS</program>
    <programelementcode>7329</programelementcode>
    <programreferencecode>9217</programreferencecode>
    <pi>Midkiff, Samuel</pi>
    <programreferencecode>6890</programreferencecode>
    <copi>Y. Charlie Hu</copi>
    <amount>493235</amount>
  </document>
  <document>
    <docID>0916893</docID>
    <docDate>September 15, 2009</docDate>
    <docSource></docSource>
    <docText>SHF: Small: IMUnit: Improved Multithreaded Unit Testing

   CCF-0916893  SHF:Small: IMUnit: Improved Multithreaded Unit Testing  PIs: Darko Marinov and Grigore Rosu    Computing is going through a paradigm shift from a mostly sequential worldview to a mostly parallel worldview.	The currently dominant programming model for parallel code is that of shared data, where multiple threads of computation communicate by accessing shared data objects.	Unfortunately, developing and testing multithreaded code is very hard. To significantly improve testing of multithreaded code, this project develops a set of new techniques and tools for multithreaded tests.  A multithreaded test is a piece of code that creates and executes two or more threads.  Executing a test follows some schedule/interleaving of the multiple threads.  The key of the new approach is to allow the explicit specification of a set of relevant schedules for each test, while traditional tests implicitly specify all possible schedules.  This project addresses three important challenges for multithreaded tests: (1) How to describe a set of schedules and which schedules from a given set to explore?	(2) How to automatically generate multithreaded tests, especially schedules, for given code?  (3) How to select and prioritize rerunning of the multithreaded tests when the code changes? Improved unit testing of multithreaded code has the potential to substantially increase the quality of developed code.</docText>
    <division>CCF</division>
    <directorate>CSE</directorate>
    <award-instr>Standard Grant</award-instr>
    <programreferencecode>HPCC</programreferencecode>
    <programreferencecode>9216</programreferencecode>
    <programreferencecode>9218</programreferencecode>
    <fieldofapplication>0000912 Computer Science</fieldofapplication>
    <organization>University of Illinois at Urbana-Champaign</organization>
    <state>IL</state>
    <programreferencecode>9217</programreferencecode>
    <amount>500000</amount>
    <program>SOFTWARE ENG &amp; FORMAL METHODS</program>
    <programelementcode>7944</programelementcode>
    <pi>Marinov, Darko</pi>
    <copi>Grigore Rosu</copi>
    <progmgr>Alan R. Hevner</progmgr>
  </document>
  <document>
    <docID>0916892</docID>
    <docDate>September 1, 2009</docDate>
    <docSource></docSource>
    <docText>CIF: Small: Large-Scale Software Dissemination in Stochastic Wireless Networks

   Commercial providers are increasingly permitting third-party developers to write and implement their own software applications on wireless devices, ranging from sensors to 3G cellular phones. As the number of applications and users grow, reliable software dissemination is quickly emerging as a key enabling technology, providing fundamental reprogramming services, such as software download, updates and security patching.       Intellectual Merit  This project aims to develop analytical foundations for efficient software dissemination in loss-prone wireless networks, measured in terms of delay and communication/computational speed.  Planned research will proceed along four thrusts: 1) PERFORMANCE LIMITS: mathematically formalizing the problem of software dissemination in multi-hop wireless networks using stochastic shortest path optimization based on the theory of Markov Decision Processes; 2) LARGE-SCALE ASYMPTOTICS:  analyzing performance at high node densities using extreme-value theory and comparing state-of-the-art technologies, including rateless coding, packet-level channel hopping, and physical-layer cooperation; 3) ACK-LESS PROTOCOLS:  eliminating control traffic (e.g., ACKnowledgments), with high probability, using a combination of extreme-value theory and shifted rateless codes; 4) IMPLEMENTATION:  implementing theoretically-based software dissemination protocols on sensor motes and, subsequently, on Android-capable smartphones.        Broader Impact    This work promises a broad impact to various societal needs.  On an education level, open cell phone programming expertise will be incorporated into innovative class assignments and labs taught by the PIs, including Software Engineering, Algorithms, and Networking.  On a commercial side, the research identifies and provides directions for fundamental issues that will face private enterprises attempting to capitalize on emerging smartphone capabilities.  The PIs will also expedite research transfer through liaisons with local and international industrial partners.  Finally, the project will establish theoretical connections between disconnected fields, most notably bringing tools primarily used in civil and financial engineering into computing and communication.</docText>
    <keyword>algorithms</keyword>
    <division>CCF</division>
    <directorate>CSE</directorate>
    <award-instr>Standard Grant</award-instr>
    <programreferencecode>HPCC</programreferencecode>
    <state>MA</state>
    <keyword>security</keyword>
    <keyword>wireless</keyword>
    <programreferencecode>9218</programreferencecode>
    <keyword>software engineering</keyword>
    <fieldofapplication>0000912 Computer Science</fieldofapplication>
    <keyword>networking</keyword>
    <keyword>education</keyword>
    <progmgr>William H Tranter</progmgr>
    <organization>Trustees of Boston University</organization>
    <program>NETWORK CODING AND INFO THEORY</program>
    <programelementcode>7937</programelementcode>
    <pi>Starobinski, David</pi>
    <copi>Ari Trachtenberg</copi>
    <amount>456731</amount>
  </document>
  <document>
    <docID>0916891</docID>
    <docDate>September 1, 2009</docDate>
    <docSource></docSource>
    <docText>SHF:Small:Exploring the Synergy between Software Design and Organizational Structure

   Many successful large-scale software systems share a fundamental characteristic: their modular structures enable system-wide advances though distributed and parallelized improvement of modules. However, merely breaking software into modules, without assessing the interplay between a design and the organization that must instantiate it, does not always ensure that parallelized, module-wise evolution is effective. In particular, mismatches between design and organizational structures can result in expensive inter-team communication costs, exacerbated by barriers such as differing time zones, languages and cultures.  This research aims to formally express and quantitatively assess the key characteristics of software structures that allow for system-wide evolution through distributed module-wise contributions, and to account for the relationship between design structure and organizational structure, as it impacts software quality, productivity, and survival.  The work will explore a computable socio-technical model, associated metrics and automated analysis techniques to improve the conduct of software development. The approach will allow designers to assess and manipulate software designs at early development stages so that modules can be defined and implemented by independent teams, shortening development time, facilitating changes, and minimizing coordination costs. The results will be demonstrated on large software systems, working with industrial partners who wish to understand the impact of these techniques.</docText>
    <division>CCF</division>
    <directorate>CSE</directorate>
    <award-instr>Standard Grant</award-instr>
    <programreferencecode>HPCC</programreferencecode>
    <programreferencecode>9218</programreferencecode>
    <fieldofapplication>0000912 Computer Science</fieldofapplication>
    <state>PA</state>
    <organization>Drexel University</organization>
    <program>SOFTWARE ENG &amp; FORMAL METHODS</program>
    <programelementcode>7944</programelementcode>
    <progmgr>Lenore D. Zuck</progmgr>
    <pi>Cai, Yuanfang</pi>
    <copi>Giuseppe Valetto</copi>
    <amount>496579</amount>
  </document>
  <document>
    <docID>0916880</docID>
    <docDate>July 15, 2009</docDate>
    <docSource></docSource>
    <docText>CIF: Small: Multichannel Signal Processing for Dense Optical Communication Networks

   Abstract:    The dramatic increase in throughput demands from backbone transport data networks has propelled the development of all-optical wavelength-division-multiplexed (WDM) networks. As the capacity demands on these systems increase, the physical layer degradation becomes so severe that sophisticated signal processing techniques are necessary to maintain the quality of service. Channel nonlinearity differentiates multichannel fiber-optic systems from conventional wireline and wireless systems. Consequently, novel signal processing and communication theoretic approaches are required to design and analyze the channel; this research project addresses this need.  As a consequence, WDM system designs are improved and the data throughput available to society though these networks is substantially increased.    This research develops a discrete time-wavelength nonlinear model for the WDM system and uses this model to design powerful signal processing techniques. Up to now, the WDM channel has been considered as a set of parallel channels, ignoring the cross-channel effects or modeling them simply as noise. Motivated by techniques that have been so successful in wireless communications, such as multiuser detection, MIMO processing, multichannel precoding, etc., this research develops algorithms to apply to the WDM fiber channel that can produce substantial capacity gains. A two-dimensional discrete-time polynomial model for a WDM system is formulated to account for intra-channel and inter-channel linear and nonlinear effects. Multichannel processing algorithms across time and wavelength for interference mitigation are designed and evaluated. Since nonlinear interference limits the performance of networks, constrained coding to diminish this interference is used to trade capacity for performance.  In all-optical networks, crosstalk emanating from other lightpaths can limit performance. Employing idle lightpaths judiciously provides multiuser coding and path diversity (redundancy and memory) to the entire network.    Level of effort statement:      At the recommended level of support, the PI will make every attempt to meet the original scope and level of effort of the project.</docText>
    <keyword>algorithms</keyword>
    <division>CCF</division>
    <directorate>CSE</directorate>
    <award-instr>Standard Grant</award-instr>
    <programreferencecode>HPCC</programreferencecode>
    <keyword>network</keyword>
    <keyword>wireless</keyword>
    <programreferencecode>9218</programreferencecode>
    <progmgr>John Cozzens</progmgr>
    <fieldofapplication>0000912 Computer Science</fieldofapplication>
    <organization>University of Virginia Main Campus</organization>
    <state>VA</state>
    <program>SIGNAL PROCESSING</program>
    <programelementcode>7936</programelementcode>
    <pi>Brandt-Pearce, Maite</pi>
    <amount>239566</amount>
  </document>
  <document>
    <docID>0916867</docID>
    <docDate>September 1, 2009</docDate>
    <docSource></docSource>
    <docText>CIF: Small: Collaborative Research: Wireless Networks: Fundamental Limits via Extremal Entropy Properties

   CIF: Small: Collaborative Research: Wireless Networks: Fundamental Limits via Extremal Entropy Properties    Using extremal entropy properties to characterize the fundamental performance limits of network communication is a tradition of information theory. Most historical successes, however, relied on one particular extremal entropy inequality: the entropy-power inequality of Shannon and Stam, which, though powerful, applies mainly to networks with certain degradedness structure. Moreover, wireless features such as multiple-input multiple-output (MIMO) communications, channel uncertainty incurred by fading, and secrecy constraints due to the broadcast nature of radio communication bring new challenges that cannot be overcome by the entropy-power inequality of Shannon and Stam alone. This situation calls for in-depth investigations of the interaction between converse problems in network information theory and extremal entropy properties in statistics, resorting to powerful statistical tools to solve important communication engineering problems.    The specific goals of this research are: 1) to examine systematic ways of establishing extremal entropy properties through links between information theory and statistics; 2) to establish channel-enhancement as a general framework for solving the converse problems for MIMO downlink communication; and 3) to identify general frameworks for solving the converse problems for collaborative communication in cognitive wireless networks.     Recent years have seen substantial efforts in designing new coding schemes to achieve better performance for wireless networks. Fundamental understanding of the limits of these coding schemes is thus extremely important from the engineering viewpoint to direct future research and to prevent over-engineering and bolster confidence for simple and structured coding schemes. Intellectual results obtained from this research will also be disseminated via course developments on network information theory and wireless communications at Texas A&amp;M and the University of Hawaii.</docText>
    <division>CCF</division>
    <directorate>CSE</directorate>
    <organization>Texas Engineering Experiment Station</organization>
    <state>TX</state>
    <award-instr>Standard Grant</award-instr>
    <programreferencecode>HPCC</programreferencecode>
    <keyword>network</keyword>
    <keyword>wireless</keyword>
    <programreferencecode>9218</programreferencecode>
    <fieldofapplication>0000912 Computer Science</fieldofapplication>
    <progmgr>William H Tranter</progmgr>
    <program>COMM &amp; INFORMATION THEORY</program>
    <programelementcode>7935</programelementcode>
    <pi>Liu, Tie</pi>
    <amount>198745</amount>
  </document>
  <document>
    <docID>0916854</docID>
    <docDate>September 15, 2009</docDate>
    <docSource></docSource>
    <docText>TC: Small: Minimalist Hardware Trojans through Malicious Side-Channels

   In order to provide system security, hardware modules which function as trust anchors are used in an ever increasing number of devices.  The majority of laptops and PCs are now equipped with Trusted Platform Modules (TPMs), and a large number of pervasive computing systems such as smart cards, electronic passports or high-speed routers make use of hardware for cryptographic algorithms and key storage. In almost all such applications the security of the entire system hinges on the assumption that the hardware modules are trustworthy.  Recently, due to the increasing use of potentially untrusted semiconductor foundries, the threat of maliciously manipulated hardware has been raised, Since hardware manipulations, including hardware Trojans, are difficult to detect and, perhaps more importantly, even harder to repair, they form a very serious threat to system security for today's and future applications.    The standard approach to Trojan hardware consists in adding extra logic to a given IC design which weakens the system. The main drawback of this approach, from an attacker's perspective, is that extra function blocks can potentially be detected through a host of techniques, including, e.g., optical inspections at different layers of the design, or power and EM fingerprinting.  Our malicious circuit manipulations are orders of magnitude more subtle than previously known Trojans, but can nevertheless totally compromise secure hardware blocks by leaking cryptographic keys. The core idea is to create malicious side-channels, in particular power supply channels, through small modifications of circuit elements, e.g., at the transistor level. We will refer to these covert channels as Trojan side channels (TSC). The core parts of the research are modeling of the assumptions, development of channels and modulations schemes, their realization on the circuit level, and proof-of-concept implementations.    In addition to posing a threat to system security, Trojan side-channels can also be used constructively. For instance, they have applications in anti-counterfeiting: illegal copies of ICs with the same functional behavior will not leak the same side-channel ID and can thus easily be detected. Also, TSC could be used for conveying internal status information about a circuit, increasing the testability of a circuits. Moreover, because TSC can be viewed as a form of physically encryption one can imagine other cryptographic protocols and applications using TSC as primitives.</docText>
    <keyword>algorithms</keyword>
    <division>CCF</division>
    <directorate>CSE</directorate>
    <award-instr>Standard Grant</award-instr>
    <programreferencecode>HPCC</programreferencecode>
    <state>MA</state>
    <keyword>security</keyword>
    <programreferencecode>9218</programreferencecode>
    <progmgr>Richard Beigel</progmgr>
    <organization>University of Massachusetts Amherst</organization>
    <program>TRUSTWORTHY COMPUTING</program>
    <programelementcode>7795</programelementcode>
    <programreferencecode>7923</programreferencecode>
    <pi>Paar, Christof</pi>
    <copi>Wayne Burleson</copi>
    <amount>350657</amount>
  </document>
  <document>
    <docID>0916837</docID>
    <docDate>September 1, 2009</docDate>
    <docSource></docSource>
    <docText>SHF:Small: Next Generation Test Compression Technology

       PROPOSAL NO: 0916837   INSTITUTION: University of Texas at Austin   PRINCIPAL INVESTIGATOR: Touba, Nur  TITLE: Next Generation Test Compression Technology      Abstract    	Testing integrated circuits (ICs) requires storing large amounts of test data on a tester and transferring it to/from the chip-under-test.  The bandwidth between the tester and chip is very limited due to limited pins and tester channels.  Test data volume continues to grow dramatically with increasingly dense system-on-chips (SOCs) and three-dimensional ICs as well as the need for additional tests to target defects in nanometer designs.  A major development in the field over the past decade has been the emergence of test compression technology which stores test data on the tester in compressed form and decompresses it on-chip.  The commercialization of this technology has helped immensely in keeping up with rising test data volume.  However, going forward, there is a need for a next generation of test compression technology that can provide significantly greater compression to handle the larger designs of the future.  This research will develop new theory, concepts, and architectures that are fundamentally different from existing commercial technology and have the potential for providing an order of magnitude or more improvement for test stimulus compression as well as output response compaction.    	Society increasingly relies on correct and dependable operation of electronic devices.  The impact of this research will be to develop new technology to keep test costs down and make it economical to fit in more tests to improve product quality.  This will be critical as the manufacturing process becomes increasingly difficult to control at smaller geometries.  Participation of undergraduates, women, and minorities will be actively encouraged.</docText>
    <division>CCF</division>
    <directorate>CSE</directorate>
    <state>TX</state>
    <award-instr>Standard Grant</award-instr>
    <programreferencecode>HPCC</programreferencecode>
    <programreferencecode>9216</programreferencecode>
    <programreferencecode>9218</programreferencecode>
    <fieldofapplication>0000912 Computer Science</fieldofapplication>
    <progmgr>Sankar Basu</progmgr>
    <organization>University of Texas at Austin</organization>
    <programreferencecode>9217</programreferencecode>
    <pi>Touba, Nur</pi>
    <amount>355000</amount>
    <program>DES AUTO FOR MICRO &amp; NANO SYST</program>
    <programelementcode>7945</programelementcode>
  </document>
  <document>
    <docID>0916828</docID>
    <docDate>August 1, 2009</docDate>
    <docSource></docSource>
    <docText>SHF: Small: Achieving IC Quality through On-Going Diagnosis and Customized Test

   Proposal ID: 0916828	  PI name: Blanton	Shawn	  Institution: Carnegie-Mellon University	  Title: Achieving IC Quality through On-Going Diagnosis and Customized Test    ABSTRACT  The main objective of computer chip testing has and continues to be the separation of good chips from bad ones (i.e., ones that do not meet the desired operational characteristics). Test is now however being expanded as a value-added endeavor. In this project, we are data-mining test data in order to continuously monitor chip quality. We propose to use diagnosis-extracted models of chip failures along with a new technique for estimating chip quality. Both are incorporated in an on-line, quality-monitoring methodology that ensures a desired level of quality by changing the actual tests applied to a computer chip to better match the characteristics of currently-failing chips.    This approach to quality is dynamic in nature and is a radical change from the typical approach. Without exception, each chip manufacturer (Intel, IBM, etc.) assumes that any type of defect can occur anywhere within their chip which means that each manufactured instance has to be thoroughly tested at considerable expense. This is akin to prescribing drugs for all possible diseases/ailments for every patient without performing one diagnostic examination. Opposed to the traditional approach, this proposed work instead diagnoses chips that have failed in the past to determine what ?diseases? (i.e., defects) actually are occurring within the fabricated ICs. The ?prescriptions? (i.e., the tests applied to the chips) can therefore be changed and/or minimized to match the diseases found instead of over-testing as is done now, leading to improved chip quality at minimal cost.</docText>
    <division>CCF</division>
    <directorate>CSE</directorate>
    <award-instr>Standard Grant</award-instr>
    <programreferencecode>HPCC</programreferencecode>
    <programreferencecode>9216</programreferencecode>
    <programreferencecode>9218</programreferencecode>
    <fieldofapplication>0000912 Computer Science</fieldofapplication>
    <state>PA</state>
    <organization>Carnegie-Mellon University</organization>
    <progmgr>Sankar Basu</progmgr>
    <amount>325000</amount>
    <programreferencecode>9217</programreferencecode>
    <pi>Blanton, Ronald</pi>
    <program>DES AUTO FOR MICRO &amp; NANO SYST</program>
    <programelementcode>7945</programelementcode>
  </document>
  <document>
    <docID>0916821</docID>
    <docDate>September 1, 2009</docDate>
    <docSource></docSource>
    <docText>SHF: Small: Dynamic Power Redistribution in Failure-Prone CMPs

   Future multi-core microprocessors will be capable of deconfiguring faulty units in order to permit continued operation in the presence of wear-out failures.  However, the unforeseen downside is pipeline imbalance in which other portions of the pipeline are now overprovisioned with respect to the deconfigured functionality. Such an imbalance leads to sub-optimal chip-wide power provisioning, since power is now allocated to pipeline functions that no longer provide the benefit they did with a fully functioning chip.    This research proposes to dynamically redistribute the chip power under pipeline imbalances that arise from deconfiguring faulty units. Through rebalancing -- achieved by temporary, symbiotic deconfiguration of additional functionality within the degraded core -- power is harnessed for use elsewhere on the chip. This additional power is dynamically transferred to portions of the multi-core chip that can realize a performance boost from turning on previously dormant microarchitectural features.  The technical deliverables of this project will be: (1) a novel resilient multi-core system architecture -- including dynamic power redistribution management algorithms -- that achieves much higher performance than one that is oblivious to pipeline imbalances; and (2) detailed simulations that quantify this performance advantage for various multi-core workloads.    The broader impacts of this project relate to integrated research and education, enhanced infrastructure for research, broad dissemination of results, and potential societal impact. Furthermore, the PI will recruit women and underrepresented minority students to work on the project.</docText>
    <keyword>algorithms</keyword>
    <division>CCF</division>
    <directorate>CSE</directorate>
    <award-instr>Standard Grant</award-instr>
    <programreferencecode>HPCC</programreferencecode>
    <programreferencecode>9216</programreferencecode>
    <keyword>architecture</keyword>
    <programreferencecode>9218</programreferencecode>
    <state>NY</state>
    <keyword>education</keyword>
    <organization>Cornell University</organization>
    <progmgr>Chitaranjan Das</progmgr>
    <programreferencecode>9217</programreferencecode>
    <amount>280000</amount>
    <pi>Albonesi, David</pi>
    <program>COMPUTER ARCHITECTURE</program>
    <programelementcode>7941</programelementcode>
  </document>
  <document>
    <docID>0916817</docID>
    <docDate>August 15, 2009</docDate>
    <docSource></docSource>
    <docText>SHF: Small: High-level Programming Models and Frameworks for GPGPU-based Computing

   This award is funded under the American Recovery and Reinvestment Act of 2009 (Public Law 111-5).    Graphics Processing Units (GPUs) have emerged as a promising alternative in  the transition of the computing industry to mainstream parallel computing.  Enabling applications to benefit from their potential requires that GPU programming be made accessible to the average programmer. This research focuses on the challenges making GPU programming easier through new high-level programming models, and enabling efficient GPU execution through compilation frameworks for these models.  Two complementary GPU programming models are proposed --- OpenMP, which is widely used for shared-memory parallel programming, and Parallel Operator Data-Flow Graphs (PO-DFGs), which naturally represent algorithms in a wide range of current and emerging application domains. Various optimization techniques are developed for programs written to these models, including partitioning the program between the host CPU and GPUs, stream optimizations that render the program's memory access characteristics to be more amenable to the GPU's memory system, minimizing data transfer between the host and GPU memory, and GPU architecture-specific optimizations.  The research contributes to the evolution of GPGPU programming from manual ports of applications using low-level APIs, to the use of high-level parallel programming models.</docText>
    <keyword>algorithms</keyword>
    <division>CCF</division>
    <directorate>CSE</directorate>
    <award-instr>Standard Grant</award-instr>
    <programreferencecode>HPCC</programreferencecode>
    <programreferencecode>9216</programreferencecode>
    <keyword>parallel computing</keyword>
    <keyword>architecture</keyword>
    <programreferencecode>9218</programreferencecode>
    <organization>Purdue University</organization>
    <state>IN</state>
    <progmgr>Almadena Y. Chtchelkanova</progmgr>
    <fieldofapplication>0000912 Computer Science</fieldofapplication>
    <keyword>graphics</keyword>
    <programreferencecode>9217</programreferencecode>
    <program>HIGH-PERFORMANCE COMPUTING</program>
    <programelementcode>7942</programelementcode>
    <programreferencecode>6890</programreferencecode>
    <pi>Raghunathan, Anand</pi>
    <copi>Rudolf Eigenmann</copi>
    <amount>477739</amount>
  </document>
  <document>
    <docID>0916810</docID>
    <docDate>September 1, 2009</docDate>
    <docSource></docSource>
    <docText>Efficient Dynamic Checking of Heap Invariants using the Garbage Collector

   Modern software is increasingly developed using managed programming languages, such as Java and C#, because they eliminate a large class of low-level memory-related errors that have plagued languages such as C and C++ and caused countless failures and security vulnerabilities.  Unfortunately, software still suffers from a troubling array of higher-level semantic errors, which can cause programs to misbehave without necessarily triggering an overt failure. Prior techniques for detecting these errors suffer from some combination of imprecision (false positives), poor scalability on large programs, or extremely high run-time overheads.    This project will explore a new approach for detecting programming errors that is precise, informative, scalable, and efficient enough to use in deployed software. The approach leverages techniques from static analysis that allow programmers to express expected program properties, but overcomes prior limitations by checking the properties at run-time. The key idea is to piggyback error checking on the garbage collector, which can check and elucidate complex program properties with very low overhead because it periodically visits all objects in the heap. The result of this research will be a much-needed technique for detecting and diagnosing bugs in deployed software -- especially large, complex, and highly dynamic programs, such as server applications.</docText>
    <division>CCF</division>
    <directorate>CSE</directorate>
    <award-instr>Standard Grant</award-instr>
    <programreferencecode>HPCC</programreferencecode>
    <programreferencecode>9216</programreferencecode>
    <state>MA</state>
    <keyword>security</keyword>
    <programreferencecode>9218</programreferencecode>
    <fieldofapplication>0000912 Computer Science</fieldofapplication>
    <keyword>programming languages</keyword>
    <progmgr>Sol J. Greenspan</progmgr>
    <organization>Tufts University</organization>
    <programreferencecode>9217</programreferencecode>
    <program>PROGRAMMING LANGUAGES</program>
    <programelementcode>7943</programelementcode>
    <pi>Guyer, Samuel</pi>
    <amount>131426</amount>
  </document>
  <document>
    <docID>0916808</docID>
    <docDate>July 1, 2009</docDate>
    <docSource></docSource>
    <docText>SHF: Small: Specification, Verification, and Semantics of Higher-Order and Concurrent Software

   This award is funded under the American Recovery and Reinvestment Act of 2009 (Public Law 111-5).    To extend the scale and generality of separation logic and grainless semantics  to become applicable to the specification and verification of more complex and  varied software systems, the following research initiatives are being pursued:        Higher-Order Design Patterns - Using higher-order separation logic to     specify design patterns in object-oriented programing, and to verify their     implementation.       Extension to a Higher-Order Programming Language - extending separation     logic to an Algol-like language with a heap, including procedures that     permit global information hiding.       Grainless Semantics - devising a new form of grainless semantics that gives     a more abstract and concise description of shared-variable concurrency by     avoiding any commitment to a default level of atomicity.       Implementation of Logics and Semantics - Using the Isabelle/HOL system to     implement the machine-aided construction of proofs in separation logic in a     way that ensures both the validity of the proofs and the soundness of the     logic and its extensions.    The overall goal is to substantially increase the variety of programs that can  be verified by separation logic, and to facilitate soundness arguments for this  and other logics for shared-variable concurrency.</docText>
    <division>CCF</division>
    <directorate>CSE</directorate>
    <award-instr>Standard Grant</award-instr>
    <programreferencecode>HPCC</programreferencecode>
    <keyword>verification</keyword>
    <programreferencecode>9218</programreferencecode>
    <fieldofapplication>0000912 Computer Science</fieldofapplication>
    <state>PA</state>
    <organization>Carnegie-Mellon University</organization>
    <keyword>object-oriented</keyword>
    <pi>Reynolds, John</pi>
    <program>SOFTWARE ENG &amp; FORMAL METHODS</program>
    <programelementcode>7944</programelementcode>
    <programreferencecode>6890</programreferencecode>
    <progmgr>Lenore D. Zuck</progmgr>
    <amount>487108</amount>
  </document>
  <document>
    <docID>0916803</docID>
    <docDate>September 1, 2009</docDate>
    <docSource></docSource>
    <docText>SHF: Small: Collaborative Research: Correlation Mining and its Applications in Test Cost Reduction, Yield Enhancement, and Performance Calibration in Analog/RF Circuits

   This project seeks to improve the quality and reliability of Analog/Radio-Frequency (RF) integrated electronic circuits (ICs) by developing an intelligent system for systematically exploring the wealth of information generated throughout their production lifetime and applying it towards improving the effectiveness of their design, manufacturing, and testing. While a large amount of data is made available through extensive design simulations and measurements on actual fabricated circuits, there currently exists a striking lack of formal methods to efficiently extract meaningful information from this data. The research activities that will be carried out through this project aim to fill this void by developing correlation mining methods based on the most recent developments in the fields of machine learning and data mining. Ultimately, using data from actual IC productions provided by industrial partners (i.e. IBM and Texas Instruments), the objective of this project is to demonstrate the impact that such correlations can have on reducing the cost of testing, enhancing the yield of the production and enabling post-manufacturing calibration of analog/RF circuits.     This project will facilitate the cost-effective realization of robust electronic circuits and systems, thus enabling more reliable computing and promoting technology trustworthiness. The proposed research is complemented by educational and outreach activities, including the development of a new graduate-level course on applications of Machine-Learning in Computer Aided Design and Test and the involvement of graduate, undergraduate and high-school students in research with the groups of the Principal Investigators, the industrial partners, and the research laboratory of the international collaborator.</docText>
    <division>CCF</division>
    <directorate>CSE</directorate>
    <award-instr>Standard Grant</award-instr>
    <programreferencecode>HPCC</programreferencecode>
    <programreferencecode>9216</programreferencecode>
    <programreferencecode>9218</programreferencecode>
    <fieldofapplication>0000912 Computer Science</fieldofapplication>
    <amount>240000</amount>
    <progmgr>Sankar Basu</progmgr>
    <organization>Yale University</organization>
    <state>CT</state>
    <keyword>formal methods</keyword>
    <keyword>machine learning</keyword>
    <keyword>data mining</keyword>
    <programreferencecode>9217</programreferencecode>
    <program>DES AUTO FOR MICRO &amp; NANO SYST</program>
    <programelementcode>7945</programelementcode>
    <pi>Makris, Yiorgos</pi>
  </document>
  <document>
    <docID>0916797</docID>
    <docDate>August 15, 2009</docDate>
    <docSource></docSource>
    <docText>AF:Small:Collaborative Research:Studies in nonuniformity, completeness, and reachability

   Computational complexity theory classifies computational problems into various complexity classes based on the amount of resources needed to solve them. This classification is done by measuring various resources such as time, space, nonuniformity, nondeterminism, and randomness.  A better understanding of the relationships among these various resources shed light on the computational difficulty of the problems that are encountered in practice.    This project explores several central questions regarding nonuniformity, complete problems, and space bounded computations.  This project attempts to discover improved upper bounds for problems with high circuit complexity.  Regarding complete sets, non-relativizing properties of complete sets will be explored. Space bounded computations will be investigated in the context of planar graph reachability problems.    This project addresses several basic questions in computational complexity theory. The results from this project will further our understanding of computational resources such as nonuniformity, nondeterminism, and space.  Research results will be published in peer-reviewed journals and will be presented at national and international conferences, thus enabling broad dissemination of the the results to enhance scientific understanding.  New courses will be created and taught along the themes of this project, thus integrating teaching and research.  The project supports various human resource development activities such as supporting and mentoring graduate students and inviting visitors.</docText>
    <division>CCF</division>
    <directorate>CSE</directorate>
    <award-instr>Standard Grant</award-instr>
    <programreferencecode>HPCC</programreferencecode>
    <programreferencecode>9218</programreferencecode>
    <fieldofapplication>0000912 Computer Science</fieldofapplication>
    <progmgr>Richard Beigel</progmgr>
    <organization>Iowa State University</organization>
    <state>IA</state>
    <pi>Aduri, Pavan</pi>
    <program>COMPLEXITY &amp; CRYPTOGRAPHY</program>
    <programelementcode>7927</programelementcode>
    <amount>198601</amount>
  </document>
  <document>
    <docID>0916782</docID>
    <docDate>September 1, 2009</docDate>
    <docSource></docSource>
    <docText>AF: Small: Computer Science and Decision Making

   Increasingly, automated economic transaction systems in eBay, Google and other institutions negotiate, buy and sell goods, services, advertisements etc. They use auctions to make decisions including pricing, allocation and optimization. As a result, we  now have auctions systems far greater in scale than the traditional "human scale" of negotiations and specialized auctions, and they impact our lives in sophisticated ways. These systems face many algorithmic challenges in the interface of Economics, Learning Theory, and Optimization, which is the focus of this project.    In this project researchers will (a) design and analyze models for the various parties (users, auctioneer, buyer and seller) and their impact on the auctions; (b) design and analyze mechanisms in the presence of parties with mixed utilities that go beyond the traditional linear profit; (c) quantify impacts of budgets in mechanisms on truthfulness, equilibria and utilities, which has been traditionally underemphasized; (d) study the  effect of bounded computational power and rationality on mechanisms; (e) design richer mechanisms for futures, combinatorial goods as well as dynamic settings; (f) study privacy, security and verifiability of  auction mechanisms; (g) study the various learning and optimization problems that are fundamental to the tasks above.    This project ultimately addresses the questions of how various parties with natural knobs (budget, utility) interact with automated economic transaction systems, how information is learned, used and controlled in such systems,  and how these systems will evolve over the long term. The project explores these questions via the specific research tasks above, as well as via training undergraduate and graduate students to work in the interface of Economics, Optimization and other areas.</docText>
    <division>CCF</division>
    <directorate>CSE</directorate>
    <programreferencecode>HPCC</programreferencecode>
    <award-instr>Continuing grant</award-instr>
    <keyword>security</keyword>
    <state>NJ</state>
    <programreferencecode>9218</programreferencecode>
    <fieldofapplication>0000912 Computer Science</fieldofapplication>
    <organization>Rutgers University New Brunswick</organization>
    <pi>Roberts, Fred</pi>
    <amount>100000</amount>
    <keyword>privacy</keyword>
    <progmgr>Tracy J. Kimbrel</progmgr>
    <program>QUANTUM COMMUNICATION</program>
    <programelementcode>7948</programelementcode>
    <copi>Rebecca Wright</copi>
  </document>
  <document>
    <docID>0916770</docID>
    <docDate>August 1, 2009</docDate>
    <docSource></docSource>
    <docText>SHF: Small: Interleaving Constrained Parallel Runtime System for Tolerating Concurrency Bugs

   Future processor chips are expected to have hundreds or even thousands of processor cores. To take advantage of this massive computing power, programmers need to parallelize their applications. Parallel programming, however, is notoriously difficult. Almost all the production concurrent software systems used today contain bugs costing billions of dollars. To address this challenge, this research is developing parallel runtime mechanisms that could make it possible for even buggy software to run correctly in a production system.    The fundamental problem with the current parallel programming models is that they expose an unbounded number of thread interleavings to the parallel runtime system, and a majority of the interleavings in a production system remain untested.  This research is exploring two directions to avoid incorrect interleavings from manifesting in a production run. The first approach uses a sampling-based low overhead data race detector for detecting incorrect interleavings, which are then avoided. The second approach constrains production run thread interleavings to a set of tested interleavings, which could provide comprehensive immunity against most types of concurrency bugs. Software tools developed as part of this research will help software developers and researchers. Students will also use these productivity tools in their course projects.</docText>
    <division>CCF</division>
    <directorate>CSE</directorate>
    <award-instr>Standard Grant</award-instr>
    <programreferencecode>HPCC</programreferencecode>
    <programreferencecode>9216</programreferencecode>
    <state>MI</state>
    <programreferencecode>9218</programreferencecode>
    <fieldofapplication>0000912 Computer Science</fieldofapplication>
    <organization>University of Michigan Ann Arbor</organization>
    <progmgr>Sol J. Greenspan</progmgr>
    <programreferencecode>9217</programreferencecode>
    <program>PROGRAMMING LANGUAGES</program>
    <programelementcode>7943</programelementcode>
    <pi>Narayanasamy, Satish</pi>
    <amount>499946</amount>
  </document>
  <document>
    <docID>0916763</docID>
    <docDate>August 15, 2009</docDate>
    <docSource></docSource>
    <docText>NetSE: Cross-domain Design Tools for Sensor Network and Architecture

   This award is funded under the American Recovery and Reinvestment Act of 2009 (Public Law 111-5).      This project will develop a novel tool, named Sunshine, to effectively support joint evaluation and design of sensor network (sensornet)  hardware and software.      Intellectual Merit:   A critical roadblock to the success of sensornets is the prohibitively slow and energy-wise impractical software implementations of many important applications. On the other hand, specialized hardware implementation can outperform, energy-wise as well as performance-wise, equivalent software implementations by orders of magnitude. Hence, the joint software-and-hardware design of sensornet applications is a very appealing, yet unexplored, approach. The objective of this project is to develop an effective tool, named Sunshine, to support such codesign. This project may fundamentally transform the relationship between the hardware and software communities of sensornet research.  These communities can use Sunshine to efficiently exchange mutual requirements and spread the latest technology advances in each other's fields.  Such evolutionary change will greatly improve the state-of-the-art in sensornet technology.  Novel hardware architecture and platforms that are unexplored in current designs can be created and tested through Sunshine's cross-domain design environment.     Broader Impact:   Serving as a valuable education tool, Sunshine will also foster the continued integration of research and education at the PIs' institution and benefit curriculum at other institutions. Sunshine can serve as the foundation for lab experiments and course projects in networking and embedded system engineering. Sunshine also offers the opportunity for innovative cross-domain education.</docText>
    <division>CCF</division>
    <directorate>CSE</directorate>
    <award-instr>Standard Grant</award-instr>
    <programreferencecode>HPCC</programreferencecode>
    <keyword>network</keyword>
    <keyword>architecture</keyword>
    <programreferencecode>9218</programreferencecode>
    <fieldofapplication>0000912 Computer Science</fieldofapplication>
    <state>VA</state>
    <keyword>networking</keyword>
    <keyword>education</keyword>
    <progmgr>Eun K. Park</progmgr>
    <organization>Virginia Polytechnic Institute and State University</organization>
    <programreferencecode>6890</programreferencecode>
    <program>NETWORK SCIENCE &amp; ENGINEERING</program>
    <programelementcode>7794</programelementcode>
    <programreferencecode>7794</programreferencecode>
    <programreferencecode>7923</programreferencecode>
    <pi>Yang, Yaling</pi>
    <copi>Patrick Schaumont</copi>
    <amount>424093</amount>
  </document>
  <document>
    <docID>0916752</docID>
    <docDate>August 1, 2009</docDate>
    <docSource></docSource>
    <docText>SHF: Small: The Chip Is the Network: Rethinking the Theoretical Foundations of Multicore Architecture Design

   Project ID: 0916752    Title: The Chip Is the Network: Rethinking the Theoretical Foundations of Multicore Architecture Design  PI Name: Radu Marculescu  Institution: Carnegie-Mellon University    ABSTRACT  Recent advances in CMOS technology allow the integration of tens or hundreds of individually programmable processing elements, together with large amounts of dedicated memory, on the same system-on-chip (SoC). In such multiprocessor systems, individual processing nodes can communicate and coordinate via networks-on-chip (NoCs). Therefore, a major challenge is to determine the mathematical techniques for designing and optimizing such on-chip networks in a rigorous manner. Traditional queuing and Markov chain approaches to buffer allocation are helpful to a certain extent, but capturing the traffic variability represents a major problem. Starting from these overarching ideas, this project introduces a new statistical-physics approach for performance analysis in multiprocessor SoCs. More precisely, we develop a completely new mathematical description of network traffic using an analogy between a Bose gas and the information flow in the communication network. This new modeling paradigm where networks are seen as gases can be further used to develop efficient on-chip buffer assignment algorithms.      The new design methodology enables the development of more efficient multiprocessor SoCs which have a dramatic impact on society via applications ranging from entertainment to gaming to security and to bio- and gene engineering. More broadly, the results of this project impact significantly other research communities by improving the level of understanding of networking concepts needed to design and control complex systems.</docText>
    <keyword>algorithms</keyword>
    <division>CCF</division>
    <directorate>CSE</directorate>
    <award-instr>Standard Grant</award-instr>
    <programreferencecode>HPCC</programreferencecode>
    <programreferencecode>9216</programreferencecode>
    <keyword>network</keyword>
    <keyword>security</keyword>
    <keyword>architecture</keyword>
    <programreferencecode>9218</programreferencecode>
    <fieldofapplication>0000912 Computer Science</fieldofapplication>
    <state>PA</state>
    <organization>Carnegie-Mellon University</organization>
    <keyword>networking</keyword>
    <progmgr>Sankar Basu</progmgr>
    <amount>450000</amount>
    <pi>Marculescu, Radu</pi>
    <programreferencecode>9217</programreferencecode>
    <program>COMPUTER ARCHITECTURE</program>
    <programelementcode>7941</programelementcode>
    <program>DES AUTO FOR MICRO &amp; NANO SYST</program>
    <programelementcode>7945</programelementcode>
  </document>
  <document>
    <docID>0916746</docID>
    <docDate>September 1, 2009</docDate>
    <docSource></docSource>
    <docText>SHF: Small: Thermal-Aware High-Performance DRAM Architectures in Multicore Technologies

   Environment Protection Agency estimates that by 2011 data centers nationwide would consume electricity amounting to the equivalent output of about 30 power plants. Clearly, improving the power and thermal behavior of these systems has a direct impact on their energy efficiency and reliable operation. DRAM memories constitute a significant fraction of the power consumed in computers. In addition, in the dawning era of multi-/many-core processors, the performance of a system is largely dependant on its main memory efficiency. This project investigates ways to operate DRAMs at full bandwidth utilization while spending the minimum power per unit of data communicated and maintaining lower operating temperatures. Specifically, this work aims at answering three fundamental questions: a) how can we enhance processor architectures to balance the activity on different DRAM chips to protect chips under thermal stress, b) how can we enhance the DRAM systems to reduce their power consumption and peak operating temperatures, and c) how can we enhance the operating systems to improve the thermal behavior of DRAM systems?       Techniques developed in this project will improve the thermal behavior of DRAM systems and hence will reduce the cost of thermal management and decrease the system energy consumption. Furthermore, these improvements will enable new generations of high-performance processors. This, in turn, will enhance the computational capabilities of future computing systems and enable progress in various fields. Finally, projects derived from this work will be integrated into courses contributing to the training of an engineering workforce for an energy-efficient and sustainable society.</docText>
    <division>CCF</division>
    <directorate>CSE</directorate>
    <award-instr>Standard Grant</award-instr>
    <programreferencecode>HPCC</programreferencecode>
    <programreferencecode>9216</programreferencecode>
    <programreferencecode>9218</programreferencecode>
    <fieldofapplication>0000912 Computer Science</fieldofapplication>
    <state>IL</state>
    <keyword>operating systems</keyword>
    <progmgr>Sankar Basu</progmgr>
    <organization>Northwestern University</organization>
    <amount>450000</amount>
    <programreferencecode>9217</programreferencecode>
    <copi>Gokhan Memik</copi>
    <program>DES AUTO FOR MICRO &amp; NANO SYST</program>
    <programelementcode>7945</programelementcode>
    <pi>Memik, Seda</pi>
  </document>
  <document>
    <docID>0916745</docID>
    <docDate>August 1, 2009</docDate>
    <docSource></docSource>
    <docText>SHF:Small: Locality-Driven Architectures for Scalable Multicore Systems

   The successive innovations in semiconductor manufacturing over the last 35 years of Moore's law have turned what used to be a room-sized computer system into a single chip composed of billions of transistors. These levels of integration have forced a change toward parallelism in computer system design, including both single-chip multiprocessors and systems-on-a-chip. Today, these chips have a few tens of individual processors but future scaling will make possible hundreds or thousands of them on a chip.  Two important challenges have emerged which threaten to hinder performance scaling in multicore systems.  First, while technology scaling will continue to enable increased transistor counts for the foreseeable future, power and thermal limitations will prevent all but a small fraction of them to be operating simultaneously at full speed. Second, the speed of the communication paths from the multicore chip to its external memory and to other processors is increasing at a slow rate. Because these communication paths must be shared by more and more on-chip processing cores, the paths must be used as efficiently as possible to prevent them from becoming a bottleneck in the system.    This project seeks to develop new computer hardware and software mechanisms that exploit data locality in high performance systems, including repeated use of a data item as well as use of multiple data items that lie near one another in memory. In particular, the project will develop hardware mechanisms for bulk data transfers that support renaming, packing, and integration into the virtual memory system. The PI will also develop hardware mechanisms in the on-chip memory system that will allow it to adapt to different programming primitives as well as to different coherence needs among the processing cores.  The mechanisms will be evaluated in terms of effectiveness and programmability using a range of applications.    This research aims to develop technologies critical to emerging parallel multicore chips, without which such chips will not be able to meet performance and power goals. Enabling enhanced performance in a power-efficient manner is critical to all deployments of future computing platforms, including those for science, commerce, and national security. The broader impact of this research will include training graduate and undergraduate students as researchers, while also working to increase participation of underrepresented groups in computing. The primary outreach activity will include participation in a summer camp to attract high-school girls to computer science.</docText>
    <division>CCF</division>
    <directorate>CSE</directorate>
    <state>TX</state>
    <award-instr>Standard Grant</award-instr>
    <programreferencecode>HPCC</programreferencecode>
    <keyword>security</keyword>
    <programreferencecode>9218</programreferencecode>
    <fieldofapplication>0000912 Computer Science</fieldofapplication>
    <organization>University of Texas at Austin</organization>
    <progmgr>Chitaranjan Das</progmgr>
    <pi>Keckler, Stephen</pi>
    <program>COMPUTER ARCHITECTURE</program>
    <programelementcode>7941</programelementcode>
    <amount>399301</amount>
  </document>
  <document>
    <docID>0916741</docID>
    <docDate>September 1, 2009</docDate>
    <docSource></docSource>
    <docText>SHF:  SMALL:  Stateful Interfaces

   Interfaces are used to specify and verify the interaction between components of a system in a wide variety of programming languages and distributed systems.  Stateful interfaces add expressive power by allowing the possible interactions to change over time.  The goals of this project are to develop a foundational framework for stateful interfaces, and to apply the framework in two domains: (a) typesafe, generic components for efficient XML stream processing, with application to web services and related distributed system components; (b) memory consistency specifications, with application to reliable shared-memory programs that take advantage of increasingly common multi-processor systems. This project integrates session types for communication centered programming and typestates for object protocols by providing a common foundational framework that includes the following key features: (a) polymorphism, allowing reuse of typed code; (b) copyable, non-linear use of objects and channels, allowing several clients to share a single reference to a server; (c) expressive quantificiation, allowing the specification of memory-consistency guarantees that are ubiquitous in shared-memory programming. The research will advance foundations that will help improve software development and debugging of shared memory multi-core programming.</docText>
    <division>CCF</division>
    <directorate>CSE</directorate>
    <award-instr>Standard Grant</award-instr>
    <programreferencecode>HPCC</programreferencecode>
    <programreferencecode>9216</programreferencecode>
    <programreferencecode>9218</programreferencecode>
    <fieldofapplication>0000912 Computer Science</fieldofapplication>
    <state>IL</state>
    <program>INFORMATION TECHNOLOGY RESEARC</program>
    <programelementcode>1640</programelementcode>
    <keyword>programming languages</keyword>
    <keyword>ubiquitous</keyword>
    <progmgr>Sol J. Greenspan</progmgr>
    <programreferencecode>9217</programreferencecode>
    <organization>DePaul University</organization>
    <program>SOFTWARE ENG &amp; FORMAL METHODS</program>
    <programelementcode>7944</programelementcode>
    <copi>James Riely</copi>
    <pi>Pitcher, Corin</pi>
    <copi>Radhakrishnan Jagadeesan</copi>
    <amount>499520</amount>
  </document>
  <document>
    <docID>0916725</docID>
    <docDate>August 1, 2009</docDate>
    <docSource></docSource>
    <docText>SHF: Small: Managing Non-Determinism in Multithreaded Software and Hardware

   "This award is funded under the American Recovery and Reinvestment Act of 2009 (Public Law 111-5)."    In the 21st century, the dominant computing platform has shifted to multicore chips that implement cache-coherent shared memory and run multi-threaded applications. Unfortunately, these chips do not provide a deterministic model to either software or hardware developers. Reasoning about and testing for multiple possible executions is much harder than reasoning about and testing for a single correct sequential execution, as was possible under the von Neumann model that dominated in the 20th century. Easing the burden of programming multicore chips is critical to provide society with the rapid, cost-effective performance gains that we have all come to expect. Moreover, broad impact requires practical solutions that do not ask industry to discard or rewrite billions of lines of existing general-purpose thread-based software.    To this end, research under this proposal will develop solutions for managing non-determinism with alterative implementation approaches that provide complementary benefits and opportunities. (1) Work will expand techniques of recording executions for deterministic replay to improve replay parallelism and extend the scope of record/replay to hardware debugging and fault-tolerance. (2) Work will develop and advance a deterministic coherence model that eliminates a major source of non-determinism in shared-memory multiprocessor systems: memory races. (3) Work will develop both all-software and hardware-accelerated implementations of deterministic coherence, in part, through extensions to the Wisconsin GEMS simulation infrastructure. (4) Finally, work will explore rebuilding coherence upon a formal deterministic foundation. Broader impacts will include embodying the proposed work in public software releases (e.g., GEMS) as well as dissemination to students and through courses, talks, industrial affiliates, and commercial influence.</docText>
    <division>CCF</division>
    <directorate>CSE</directorate>
    <award-instr>Standard Grant</award-instr>
    <programreferencecode>HPCC</programreferencecode>
    <programreferencecode>9216</programreferencecode>
    <programreferencecode>9218</programreferencecode>
    <fieldofapplication>0000912 Computer Science</fieldofapplication>
    <keyword>simulation</keyword>
    <state>WI</state>
    <organization>University of Wisconsin-Madison</organization>
    <progmgr>Chitaranjan Das</progmgr>
    <programreferencecode>9217</programreferencecode>
    <pi>Hill, Mark</pi>
    <copi>David Wood</copi>
    <program>COMPUTER ARCHITECTURE</program>
    <programelementcode>7941</programelementcode>
    <programreferencecode>6890</programreferencecode>
    <amount>499998</amount>
  </document>
  <document>
    <docID>0916716</docID>
    <docDate>September 1, 2009</docDate>
    <docSource></docSource>
    <docText>CIF: Small: A Stochastic Approximation Approach to Network Communications with Feedback

     Communication across networks with feedback and relays is an important, challenging, and largely open problem in information and communication theory. Systematic and scalable communication algorithms will enhance reliability, decrease coding complexity or delay, impart robustness to communication schemes by exploiting diversity, and in some cases increase the achievable communication rates. Since all modern communication systems employ multiple feedback mechanisms, a better understanding of communication feedback is imperative.    This research focuses on a deeper study of this topic by viewing it through the lenses of consensus algorithms and more general stochastic approximation algorithms. This approach yields scalable and robust algorithms for cases of extreme relevance to modern communication systems, e.g., network scenarios with noisy feedback. A confluence of problems, techniques and tools from information theory and distributed dynamic systems are utilized, with a potential transformative impact on both fields. In addition to analytical techniques and simulations, the team also utilizes facilities and experience realizing novel communication algorithms in a wireless network testbed based upon software-defined radios.    Any impact on the problem of communication across networks with noisy feedback will have immediate applications to most modern communication systems. Moreover, this research furthers the unification of the two aspects and research communities relevant to a more general information theory - one that considers both the transmission of data (classical information theory), as well as its utilization (classical dynamical systems). An emphasis on organizing special sessions in conferences, offering new graduate courses, including undergraduates in the experimental research, mentoring minority students, and furthering outreach to high school students interested in engineering is an integral part of the project.</docText>
    <keyword>algorithms</keyword>
    <division>CCF</division>
    <directorate>CSE</directorate>
    <award-instr>Standard Grant</award-instr>
    <programreferencecode>HPCC</programreferencecode>
    <keyword>network</keyword>
    <keyword>wireless</keyword>
    <programreferencecode>9218</programreferencecode>
    <state>IN</state>
    <fieldofapplication>0000912 Computer Science</fieldofapplication>
    <organization>University of Notre Dame</organization>
    <progmgr>William H Tranter</progmgr>
    <program>NETWORK CODING AND INFO THEORY</program>
    <programelementcode>7937</programelementcode>
    <pi>Laneman, J. Nicholas</pi>
    <copi>Vijay Gupta</copi>
    <amount>381155</amount>
  </document>
  <document>
    <docID>0916715</docID>
    <docDate>August 1, 2009</docDate>
    <docSource></docSource>
    <docText>SHF: Small: Collaborative Research: Specification Language Foundations for Modular Reasoning Methodologies

   This project extends the semantical foundations of object-oriented (OO) languages to cover methodologies for modular reasoning. Modular reasoning means verifying software components assuming the specification of each used component. Modularity is important for productivity and scalability, but is difficult to achieve for OO software. To support modular reasoning, researchers have proposed several methodologies that restrict programs and their specifications. The goal of this project is to provide a theoretical basis that supports practical techniques for justifying and using methodologies.    This project provides guidance for the designers of programming and specification languages, verification logics, and associated tools. The results will improve the utility and extensibility of verification tools --- a key goal of the Verified Software grand challenge.  Software developers may benefit from the integration and harmonious interoperation of best-practice methodologies. This project is potentially transformative: it aims to enable combinations and customizations of methodologies by tool users, scalable to real applications.    Improved OO programming methodologies may greatly improve programming practice, especially in applications needing high assurance, reliability, and security.  This will benefit society, which increasingly depends on computing systems built using OO components. Unification of methodologies and streamlining of tools also facilitates the education of software developers.</docText>
    <division>CCF</division>
    <directorate>CSE</directorate>
    <award-instr>Standard Grant</award-instr>
    <programreferencecode>HPCC</programreferencecode>
    <programreferencecode>9216</programreferencecode>
    <keyword>verification</keyword>
    <keyword>security</keyword>
    <programreferencecode>9218</programreferencecode>
    <fieldofapplication>0000912 Computer Science</fieldofapplication>
    <keyword>object-oriented</keyword>
    <state>FL</state>
    <keyword>education</keyword>
    <programreferencecode>9217</programreferencecode>
    <pi>Leavens, Gary</pi>
    <organization>University of Central Florida</organization>
    <program>PROGRAMMING LANGUAGES</program>
    <programelementcode>7943</programelementcode>
    <progmgr>Lenore D. Zuck</progmgr>
    <amount>249981</amount>
  </document>
  <document>
    <docID>0916714</docID>
    <docDate>August 1, 2009</docDate>
    <docSource></docSource>
    <docText>SHF: Small: Energy-Recycling VLSI Systems

   "This award is funded under the American Recovery and Reinvestment Act of 2009   (Public Law 111-5)."    ID: 0916714       Papaefthymiou   Marios    University of Michigan Ann Arbor          SHF:Small: Energy-Recycling VLSI Systems     This research project will investigate novel technologies for the design of very-large scale integrated (VLSI) computer systems that achieve unprecedented levels of energy-efficient operation through energy recycling.  In contrast to conventional computer systems that consume all the energy supplied to them while computing, energy-recycling computers reclaim and reuse any energy that remains undissipated during their operation.  Therefore, they have the potential to operate with substantially lower energy consumption than conventional computers.  This project will encompass a broad spectrum of design technologies for energy-recycling computers, including circuitry, computing architectures, and design methodologies.  The effectiveness of these technologies will be assessed through the design, fabrication, and experimental evaluation of proof-of-concept hardware prototypes.    With power consumption in high-performance microprocessors exceeding 100Watts, the design of energy-efficient computers has become a top priority in electronic design due to reliability concerns caused by excessive heat generation.  Furthermore, energy-efficient computers play a key role in the development of new mobile applications due to battery-life considerations.  And last, but not least, the power requirements of computing devices, including high-performance servers, desktops, and laptops, is placing an increasing burden on the power grid, with emissions from all these sources growing at a reported annual compound rate of 6% and thus posing a serious environmental concern.  The outcomes of this research project can therefore be transformative, resulting in innovative design technologies for realizing next-generation computer systems that achieve unprecedented levels of reliable and energy-efficient operation, enable new mobile applications, and promote sustainability.</docText>
    <division>CCF</division>
    <directorate>CSE</directorate>
    <award-instr>Standard Grant</award-instr>
    <programreferencecode>HPCC</programreferencecode>
    <programreferencecode>9216</programreferencecode>
    <state>MI</state>
    <programreferencecode>9218</programreferencecode>
    <fieldofapplication>0000912 Computer Science</fieldofapplication>
    <keyword>vlsi</keyword>
    <organization>University of Michigan Ann Arbor</organization>
    <progmgr>Sankar Basu</progmgr>
    <pi>Papaefthymiou, Marios</pi>
    <amount>450000</amount>
    <programreferencecode>9217</programreferencecode>
    <program>DES AUTO FOR MICRO &amp; NANO SYST</program>
    <programelementcode>7945</programelementcode>
    <programreferencecode>6890</programreferencecode>
  </document>
  <document>
    <docID>0916713</docID>
    <docDate>September 1, 2009</docDate>
    <docSource></docSource>
    <docText>CIF:  Small:  Structured Transmission Strategies for Wireless Networks

   Abstract  0916713 - CIF: Small: Structured Transmission Strategies for Wireless Networks    In this project, we use lattice and other structured coding techniques to induce alignment in wireless networks. This effort uses these codes on three different fronts: a.) Interference networks, where we use structured codes to align the interference seen at each receiver. The objective is to determine the capacity of this channel to within a constant gap using these codes. b.) Cognitive networks - where we use lattice codes to mitigate the interference seen by both the licensed and the cognitive radios. We exploit code structure to both (partially) learn the interfering signal at the cognitive radio and then use this knowledge to precode/align our interference signal. c.) Secure wireless networks: again, we utilize the structure of the codebook to determine simple transformations at the source in order to keep eavesdroppers in the network at bay. We employ these codes to detect, and depending on code structure, correct for modification attacks on the codebook.</docText>
    <division>CCF</division>
    <directorate>CSE</directorate>
    <state>TX</state>
    <award-instr>Standard Grant</award-instr>
    <programreferencecode>HPCC</programreferencecode>
    <keyword>network</keyword>
    <keyword>wireless</keyword>
    <programreferencecode>9218</programreferencecode>
    <fieldofapplication>0000912 Computer Science</fieldofapplication>
    <organization>University of Texas at Austin</organization>
    <progmgr>William H Tranter</progmgr>
    <program>NETWORK CODING AND INFO THEORY</program>
    <pi>Vishwanath, Sriram</pi>
    <programelementcode>7937</programelementcode>
    <program>COMM &amp; INFORMATION THEORY</program>
    <programelementcode>7935</programelementcode>
    <amount>209993</amount>
  </document>
  <document>
    <docID>0916708</docID>
    <docDate>September 15, 2009</docDate>
    <docSource></docSource>
    <docText>Theoretical Foundations of Evolving Knowledge Bases

   This project studies evolving knowledge bases, using tools from theoretical computer science.  As opposed to a database containing facts that can be queried, a knowledge base contains general statements that can be used to derive further implications. Developing a knowledge base, in particular, a knowledge base containing commonsense knowledge that can be used for commonsense reasoning, is a fundamental task of artificial intelligence (AI). This task is taking on a somewhat different focus nowadays, as even partial solutions would have important applications in intelligent agent technology.  One common feature of current approaches to the development of commonsense knowledge bases is the interactive acquisition of web-based user input of knowledge.    Algorithms for developing commonsense knowledge bases have to perform several different tasks, such as reasoning, revising (i.e., updating the current knowledge in the presence of new, potentially conflicting information), and learning (i.e., improving the quality of the knowledge base over the long run). This research addresses all three of these areas.    The bulk of the research uses Horn formulas as the formalism for knowledge representation. Horn formulas are an important class of logical expressions that have been studied for decades in complexity theory, logic programming, databases, and AI, with efficient algorithms for basic reasoning tasks.  Evolving knowledge bases present many new problems for Horn knowledge bases. Particular problems addressed by this research, based on the challenges referred to above, include: Horn-to-Horn belief revision, learning Horn formulas in the model of learning from entailment, approximate minimization of Horn formulas, probabilistic analysis of the set of consequences of random Horn formulas and related combinatorial problems, Horn approximation of knowledge bases and complexity problems for non-classical generalizations of Horn formulas. The latter point towards extending the knowledge representation formalism to handle different aspects of commonsense reasoning.    In more general terms, the objective of the research is to develop algorithms for building knowledge bases that can evolve over time. This task is relevant for both short and long term applications. The research contains a comprehensive approach to several important areas which so far have been mostly been studied separately. In the long term, research in this area will contribute to the development of tools for building better intelligent agents possessing commonsense knowledge and capable of commonsense reasoning. Such agents will expand the scope of and improve the quality of automated services.</docText>
    <keyword>algorithms</keyword>
    <division>CCF</division>
    <directorate>CSE</directorate>
    <award-instr>Standard Grant</award-instr>
    <programreferencecode>HPCC</programreferencecode>
    <programreferencecode>9218</programreferencecode>
    <fieldofapplication>0000912 Computer Science</fieldofapplication>
    <progmgr>Richard Beigel</progmgr>
    <state>IL</state>
    <program>INFORMATION TECHNOLOGY RESEARC</program>
    <programelementcode>1640</programelementcode>
    <keyword>database</keyword>
    <keyword>artificial intelligence</keyword>
    <organization>University of Illinois at Chicago</organization>
    <keyword>intelligent agent</keyword>
    <pi>Turan, Gyorgy</pi>
    <copi>Robert Sloan</copi>
    <amount>498589</amount>
  </document>
  <document>
    <docID>0916699</docID>
    <docDate>September 1, 2009</docDate>
    <docSource></docSource>
    <docText>III:HCC:Small: Measuring and Monitoring Technical Debt

   A major obstacle to delivering the increasingly complex software systems that society demands is the resource drain from maintaining existing systems. The high expense of maintenance is related to the tendency of software quality to decline over time. Maintenance is often performed under tight resource constraints, with the minimal amount of effort required. Typically, there is a gap between this minimal amount of work and the amount required to maintain the software's quality. This gap can be viewed as a type of debt, which brings a short-term benefit (usually shorter release time) but which might have to be paid back, with ?interest? (decreased productivity), later.  Many practitioners find this metaphor intuitively appealing and it is already transforming the way that long-term software maintenance is viewed. But its lack of a sound theoretical basis, empirically-based models, and practical implementation hinder its ability to transform how maintenance is done. Thus the contribution of this work is to provide empirically based models describing, and validated mechanisms for managing, technical debt. This project also supports the PI's activities in mentoring a diverse population of students, as well as UMBC's nation-wide prominence in the advancement of women and minorities in science and technology.</docText>
    <division>CCF</division>
    <directorate>CSE</directorate>
    <award-instr>Standard Grant</award-instr>
    <programreferencecode>HPCC</programreferencecode>
    <state>MD</state>
    <programreferencecode>9218</programreferencecode>
    <fieldofapplication>0000912 Computer Science</fieldofapplication>
    <progmgr>Sol J. Greenspan</progmgr>
    <organization>University of Maryland Baltimore County</organization>
    <fieldofapplication>0116000 Human Subjects</fieldofapplication>
    <pi>Seaman, Carolyn</pi>
    <program>SOFTWARE ENG &amp; FORMAL METHODS</program>
    <programelementcode>7944</programelementcode>
    <programreferencecode>7364</programreferencecode>
    <programreferencecode>7923</programreferencecode>
    <amount>464538</amount>
  </document>
  <document>
    <docID>0916689</docID>
    <docDate>September 1, 2009</docDate>
    <docSource></docSource>
    <docText>SHF: Small: An Adaptive Architecture Fabric for Constructing Resilient Multicore Systems

   As semiconductor technologies scale continues to shrink, building fault-tolerant, defect-free microprocessors becomes increasingly difficult.  Tighter design constraints, lower operating voltages, and increasing power densities have lead to circuits that are more susceptible to manufacturing defects, transient faults, and wearout-related failures. It is anticipated that future designs will consist of 100 billion transistors, many of which will be unusable due to manufacturing defects and many will fail over time due to wearout and other errors.  Traditional mainframes and mission-critical systems rely on redundancy to overcome such failures.  Reliability is essentially viewed as a tax that is levied in the form of additional silicon area devoted to constant double and triple checking of results that end-users must pay to ensure correct operation.  As reliability concerns invade the desktop and cellphone environments, large scale redundancy is impractical due to the high cost and energy overheads.      This research proposes StageNet, a new style of microprocessor architecture in which reliability is not a tax, but rather built in to the natural operation of the system.  StageNet is both introspective to enable continuous monitoring and adaptation to reliability hazards and reconfigurable at a fine-grain level to minimize the lifetime performance impact that individual failures have on the system.  StageNet consists of three major components: an adaptive computing substrate that enables dynamic reorganization of individual microprocessors, armored cache designs to provide high defect tolerance with low area overhead for on-chip caches, and a dynamic adaptation system to manage the execution of applications and organization of the hardware over its lifetime.  The broader impact of this research is that it creates cost-effective ways of dealing with faulty transistors that will enable the proliferation of embedded computers into more aspects of life, where robustness and reliability are current barriers.</docText>
    <division>CCF</division>
    <directorate>CSE</directorate>
    <award-instr>Standard Grant</award-instr>
    <programreferencecode>HPCC</programreferencecode>
    <programreferencecode>9216</programreferencecode>
    <state>MI</state>
    <keyword>architecture</keyword>
    <programreferencecode>9218</programreferencecode>
    <fieldofapplication>0000912 Computer Science</fieldofapplication>
    <organization>University of Michigan Ann Arbor</organization>
    <amount>450000</amount>
    <progmgr>Chitaranjan Das</progmgr>
    <programreferencecode>9217</programreferencecode>
    <pi>Mahlke, Scott</pi>
    <program>COMPUTER ARCHITECTURE</program>
    <programelementcode>7941</programelementcode>
  </document>
  <document>
    <docID>0916683</docID>
    <docDate>September 1, 2009</docDate>
    <docSource></docSource>
    <docText>SHF: Small: Collaborative Research: Modeling, Simulation, and Design for Performance and Reliability in Carbon-based Electronics

   Carbon-based nano-materials such as carbon nanotubes (CNTs) and, more recently, graphene layers and graphene nanoribbons (GNRs), have attracted strong interest as alternative device technologies for future nanoelectronics applications. This collaborative research project will potentially result in transformative advances required to harness the early science of these nano-materials into practical design technologies.    Specifically, PIs will develop a multi-scale simulation framework that integrates quantum simulations with compact model development for CNT and GNR field-effect transistors (CNTFETs and GNRFETs).  They will develop ambipolar logic circuits and ultra-steep sub-threshold logic circuits as two promising candidate solutions with applications to both CNTFETs and GNRFETs.  PIs will identify, model, and explore the effect of different variability and defect mechanisms in these devices to provide expedient means to systematically understand and predict their effects on the performance and reliability of practical carbon-based circuits.    Results will be disseminated through an integrated testbed for research and education in beyond-silicon computing, with an emphasis on carbon-based electronics. Through collaborations with a broad range of academic investigators as well as government and industry affiliates, this collaborative effort will strengthen ties between the device and CAD communities, help create links among them, and accelerate convergence to key design parameters essential for large scale integration of carbon-based electronics. Additionally, the development of learning modules, inter-disciplinary courses, and outreach efforts such as the Design Automation Summer School will bring the architectures, design tools and methodologies -- alongside fabrication and basic physics -- that will most likely define the first generation of nano-computing systems into the mainstream academic curriculum.</docText>
    <division>CCF</division>
    <directorate>CSE</directorate>
    <award-instr>Standard Grant</award-instr>
    <programreferencecode>HPCC</programreferencecode>
    <programreferencecode>9216</programreferencecode>
    <amount>250000</amount>
    <programreferencecode>9218</programreferencecode>
    <fieldofapplication>0000912 Computer Science</fieldofapplication>
    <keyword>simulation</keyword>
    <organization>University of Florida</organization>
    <state>FL</state>
    <keyword>education</keyword>
    <progmgr>Dmitry Maslov</progmgr>
    <programreferencecode>9217</programreferencecode>
    <program>NANOCOMPUTING</program>
    <programelementcode>7947</programelementcode>
    <pi>Guo, Jing</pi>
  </document>
  <document>
    <docID>0916664</docID>
    <docDate>September 1, 2009</docDate>
    <docSource></docSource>
    <docText>CIF: Small: Cost and Value of Information for Resource Allocation in Wireless Networks

   Resource allocation in wireless networks concerns the decisions of what rate each node injects data into the network, where and when it sends out data packets with potentially different destinations, and what level of transmit power it uses at every point in time, based on the information available at the node on the system state. It is well-known that feedback of relevant ``network state information'' is of paramount importance to the efficient utilization of the scarce network resources. Therefore, in a realistic system, the cost and value of obtaining the necessary network state information is of crucial importance and demands a comprehensive study, which constitutes the broad objective of this research. The inclusion of these factors causes drastic changes to the widely-used design paradigms.  To that end, the main objectives of this project are: to develop a well-founded theoretical framework for (1) establishing the value and cost of information obtained by distributed network state estimators; (2) building a joint estimation and resource allocation component for new generation wireless networks; and (3) designing distributed network controllers with asymmetric partial information. This study requires fundamental developments in wireless communications, estimation theory, information theory and optimization theory.</docText>
    <division>CCF</division>
    <directorate>CSE</directorate>
    <award-instr>Standard Grant</award-instr>
    <programreferencecode>HPCC</programreferencecode>
    <state>OH</state>
    <keyword>network</keyword>
    <keyword>wireless</keyword>
    <programreferencecode>9218</programreferencecode>
    <fieldofapplication>0000912 Computer Science</fieldofapplication>
    <organization>Ohio State University Research Foundation</organization>
    <progmgr>William H Tranter</progmgr>
    <program>COMM &amp; INFORMATION THEORY</program>
    <programelementcode>7935</programelementcode>
    <pi>Koksal, Can</pi>
    <copi>Atilla Eryilmaz</copi>
    <amount>458515</amount>
  </document>
  <document>
    <docID>0916652</docID>
    <docDate>August 1, 2009</docDate>
    <docSource></docSource>
    <docText>CCF-SHF: CSR: Small: Compilation for Multi-core Processors with Limited Local Memories

   Multi-core processors provide the only way to continue improving peak performance without much increase in the power consumption. However, there are serious challenges not only in expressing all the parallelism in the application, but also in exploiting the available parallelism by efficient application management on modern multi-core architectures. These challenges are only compounded by the trend of the absence of memory virtualization in the hardware, that is observed in futuristic processors, like the IBM Cell, and the Intel experimental 80-core processor. Memory management cannot be supported in hardware, because cache coherency protocols do not scale to 100s or 1000s of cores, and also because memory management in hardware consumes significant energy. Memory management in software can exploit application and data characteristics to reduce the overhead, however, it increases the burden of the application programmer. This project aims to develop tools and techniques to automatically manage the limited local memories present in each of the cores of a multi-core processor. In addition to power-efficient execution, the main objective of the project is to relieve the application programmer of the burden of carefully crafting the application, dividing and mapping it onto the cores to ensure its correct execution and portability.</docText>
    <division>CCF</division>
    <directorate>CSE</directorate>
    <award-instr>Standard Grant</award-instr>
    <programreferencecode>HPCC</programreferencecode>
    <programreferencecode>9216</programreferencecode>
    <state>AZ</state>
    <programreferencecode>9218</programreferencecode>
    <progmgr>Almadena Y. Chtchelkanova</progmgr>
    <fieldofapplication>0000912 Computer Science</fieldofapplication>
    <organization>Arizona State University</organization>
    <program>COMPILERS</program>
    <programelementcode>7329</programelementcode>
    <programreferencecode>9217</programreferencecode>
    <amount>499995</amount>
    <pi>Shrivastava, Aviral</pi>
  </document>
  <document>
    <docID>0916636</docID>
    <docDate>September 1, 2009</docDate>
    <docSource></docSource>
    <docText>SHF: Small: Collaborative Research: Modeling, Simulation, and Design for Performance and Reliability in Carbon-based Electronics

   Carbon-based nano-materials such as carbon nanotubes (CNTs) and, more recently, graphene layers and graphene nanoribbons (GNRs), have attracted strong interest as alternative device technologies for future nanoelectronics applications. This collaborative research project will potentially result in transformative advances required to harness the early science of these nano-materials into practical design technologies.    Specifically, PIs will develop a multi-scale simulation framework that integrates quantum simulations with compact model development for CNT and GNR field-effect transistors (CNTFETs and GNRFETs).  They will develop ambipolar logic circuits and ultra-steep sub-threshold logic circuits as two promising candidate solutions with applications to both CNTFETs and GNRFETs.  PIs will identify, model, and explore the effect of different variability and defect mechanisms in these devices to provide expedient means to systematically understand and predict their effects on the performance and reliability of practical carbon-based circuits.    Results will be disseminated through an integrated testbed for research and education in beyond-silicon computing, with an emphasis on carbon-based electronics. Through collaborations with a broad range of academic investigators as well as government and industry affiliates, this collaborative effort will strengthen ties between the device and CAD communities, help create links among them, and accelerate convergence to key design parameters essential for large scale integration of carbon-based electronics. Additionally, the development of learning modules, inter-disciplinary courses, and outreach efforts such as the Design Automation Summer School will bring the architectures, design tools and methodologies -- alongside fabrication and basic physics -- that will most likely define the first generation of nano-computing systems into the mainstream academic curriculum.</docText>
    <division>CCF</division>
    <directorate>CSE</directorate>
    <state>TX</state>
    <award-instr>Standard Grant</award-instr>
    <programreferencecode>HPCC</programreferencecode>
    <programreferencecode>9216</programreferencecode>
    <amount>250000</amount>
    <programreferencecode>9218</programreferencecode>
    <fieldofapplication>0000912 Computer Science</fieldofapplication>
    <keyword>simulation</keyword>
    <keyword>education</keyword>
    <organization>William Marsh Rice University</organization>
    <progmgr>Dmitry Maslov</progmgr>
    <programreferencecode>9217</programreferencecode>
    <pi>Mohanram, Kartik</pi>
    <program>NANOCOMPUTING</program>
    <programelementcode>7947</programelementcode>
  </document>
  <document>
    <docID>0916606</docID>
    <docDate>July 15, 2009</docDate>
    <docSource></docSource>
    <docText>AF: Small: Algorithmic Problems in Applied Computational Geometry

   Computer technologies play an important role in modern medicine and life  sciences, especially in diagnostic imaging, human genome study, treatment  optimization, and medical data management.  Many computational problems   arising in the field of biomedicine call for efficient and good quality   algorithmic solutions.  This project aims to develop new geometric   computing and algorithmic techniques for solving computational problems   in biomedical and engineering applications.    This research investigates a number of geometric optimization problems   that are theoretically challenging and practically relevant.  The target   problems belong to fundamental topics of computational geometry, such as   geometric partition, covering, shaping, approximation, motion planning,   and clustering; they also arise in important applied areas such as   radiation cancer treatment, medical imaging, biology, computer-aided   manufacturing, and data mining.  Some of the algorithms and software   developed during the preliminary studies of this research have produced   significantly better solutions for real application problems (for example,   much improved radiation cancer therapy plans over those computed by the  current commercial radiation treatment planning systems).  The research   will draw diverse techniques from other theoretical areas such as graph   algorithms, combinatorial optimization, discrete mathematics, and   operations research.  It will also provide a rich source of interesting   new problems/questions and new ideas to prod further development of   algorithmic techniques in computational geometry and other theoretical   areas.  This project is expected to generate broader impacts beyond   computational geometry and even computer science. It will produce   efficient and effective algorithms and software for solving key problems   in radiation cancer therapy and surgery, medical imaging, biology, and   other applied areas.  Furthermore, the newly developed algorithms and   software will be incorporated into practical applications such as   clinical radiation cancer treatment systems.  Hence, this research will   help unite and integrate the power of computational geometry, computer   algorithms, and modern biomedicine for diagnostic imaging, radiation   cancer treatment, and other applications, and improve the quality of   life for the patients.</docText>
    <keyword>algorithms</keyword>
    <division>CCF</division>
    <directorate>CSE</directorate>
    <award-instr>Standard Grant</award-instr>
    <programreferencecode>HPCC</programreferencecode>
    <programreferencecode>9218</programreferencecode>
    <state>IN</state>
    <fieldofapplication>0000912 Computer Science</fieldofapplication>
    <organization>University of Notre Dame</organization>
    <keyword>computational geometry</keyword>
    <keyword>data mining</keyword>
    <progmgr>Dmitry Maslov</progmgr>
    <fieldofapplication>0116000 Human Subjects</fieldofapplication>
    <pi>Chen, Danny</pi>
    <program>COMPUTATIONAL GEOMETRY</program>
    <programelementcode>7929</programelementcode>
    <amount>439999</amount>
  </document>
  <document>
    <docID>0916605</docID>
    <docDate>July 15, 2009</docDate>
    <docSource></docSource>
    <docText>SHF: Small: Automated Debugging Techniques for Modern Software Systems

   Proposal Number: CCF 0916605  TITLE: SHF: Small: Automated Debugging Techniques for Modern Software Systems  PI: Alessandro Orso    Debugging, which consists of identifying and removing software faults, is a human-intensive activity responsible for much of the cost of software maintenance. Existing approaches for automated debugging can help lower this cost, but have limitations that hinder their effectiveness and applicability. This project aims to overcome these limitations by developing a family of debugging techniques that (1) target realistic debugging scenarios, in which faults can involve multiple statements and manifest themselves only in specific contexts,  (2) apply advanced static and dynamic analysis techniques to automatically reduce the amount of both statements and inputs that developers must examine when investigating a failure, (3) leverage information collected from the field to increase the relevance and effectiveness of the debugging process. These newly defined techniques will be evaluated through rigorous experimentation performed on real software, in real settings, and under realistic assumptions. Debugging tools, infrastructure, and experimental subjects developed within the project will be made freely available to researchers and practitioners to help dissemination and enable further research. By advancing the state of the art of debugging, this research will help developers build more reliable software systems and, ultimately, increase the overall quality of our software infrastructure.</docText>
    <division>CCF</division>
    <directorate>CSE</directorate>
    <award-instr>Standard Grant</award-instr>
    <programreferencecode>HPCC</programreferencecode>
    <programreferencecode>9216</programreferencecode>
    <organization>GA Tech Research Corporation - GA Institute of Technology</organization>
    <state>GA</state>
    <programreferencecode>9218</programreferencecode>
    <fieldofapplication>0000912 Computer Science</fieldofapplication>
    <progmgr>Sol J. Greenspan</progmgr>
    <programreferencecode>9217</programreferencecode>
    <program>SOFTWARE ENG &amp; FORMAL METHODS</program>
    <programelementcode>7944</programelementcode>
    <pi>Orso, Alessandro</pi>
    <amount>445249</amount>
  </document>
  <document>
    <docID>0916583</docID>
    <docDate>August 15, 2009</docDate>
    <docSource></docSource>
    <docText>SHF: Small: In Vivo Software Monitoring: Architectural and Compiler Support

   Monitoring of software's execution is crucial in numerous software development tasks.  Current monitoring efforts generally require extensive instrumentation of the software or dedicated hardware---it resembles studying the software specimens in-vitro.  To fully understand software's behaviors, the production software must be studied in-vivo---in its operational environment. To address these fundamental software engineering challenges, this research addresses a framework for in-vivo monitoring and observation of software-intensive systems.    Three fundamental requirements are placed on in-vivo monitoring  frameworks: non-intrusive, low-overhead, and predictable.  These frameworks must also allow low-level monitoring and be highly flexible to enable a broad range of monitoring activities.  To satisfy these requirements, this research changes how software is compiled and how hardware is designed by pursuing the following specific aims: (i) provide flexible architectural support shared by a variety of monitoring activities; (ii) develop a monitor-aware compiler that generates the monitor together with the software to be monitored; and (iii) develop state extraction optimizations to efficiently extract program states from an executing application and forward the states to the monitor. The resulting framework is empirically evaluated to assess its performance as compared to related solutions and assess its flexibility for a variety of software engineering monitoring tasks.</docText>
    <division>CCF</division>
    <directorate>CSE</directorate>
    <award-instr>Standard Grant</award-instr>
    <programreferencecode>HPCC</programreferencecode>
    <programreferencecode>9216</programreferencecode>
    <organization>University of Minnesota-Twin Cities</organization>
    <state>MN</state>
    <keyword>compiler</keyword>
    <programreferencecode>9218</programreferencecode>
    <keyword>software engineering</keyword>
    <progmgr>Almadena Y. Chtchelkanova</progmgr>
    <fieldofapplication>0000912 Computer Science</fieldofapplication>
    <program>COMPILERS</program>
    <programelementcode>7329</programelementcode>
    <programreferencecode>9217</programreferencecode>
    <pi>Zhai, Antonia</pi>
    <copi>Mats Per Erik Heimdahl</copi>
    <amount>499271</amount>
  </document>
  <document>
    <docID>0916574</docID>
    <docDate>September 1, 2009</docDate>
    <docSource></docSource>
    <docText>AF:  Small:  A Theory of Cryptography and the Physical World

   The traditional goal of cryptography is to design cryptographic algorithms for well-defined tasks, such as public-key encryption. We propose to study the following conceptually intriguing question: when can we embed a cryptographic function into a function which was not designed for this purpose, say a function created by nature?    In a more abstract setting, the collection of possible concepts or ?objects? is represented by a function class {f_c}, where c is a description of the (unknown) object. We do not have control over the function class {f_c}, but rather it is given by ?nature?. We assume that an object c is chosen (by ?nature?) from a distribution which has a sufficiently large entropy. Each input x represents a different measurement, or ?query?, that can be made to the object. The goal is to design an algorithm for learning c (or a ?good approximation? of c) by making queries x and observing the answers y = f_c(x). The algorithm should have the following nontrivial hiding property. Any computationally bounded eavesdropper who only observes the sequence of queries and responses (x,y) cannot learn any ?useful information? about c.</docText>
    <keyword>algorithms</keyword>
    <division>CCF</division>
    <directorate>CSE</directorate>
    <award-instr>Standard Grant</award-instr>
    <programreferencecode>HPCC</programreferencecode>
    <programreferencecode>9218</programreferencecode>
    <state>CA</state>
    <fieldofapplication>0000912 Computer Science</fieldofapplication>
    <progmgr>Richard Beigel</progmgr>
    <organization>University of California-Los Angeles</organization>
    <keyword>cryptography</keyword>
    <amount>400000</amount>
    <program>COMPLEXITY &amp; CRYPTOGRAPHY</program>
    <programelementcode>7927</programelementcode>
    <program>TRUSTWORTHY COMPUTING</program>
    <programelementcode>7795</programelementcode>
    <pi>Sahai, Amit</pi>
    <copi>Rafail Ostrovsky</copi>
  </document>
  <document>
    <docID>0916569</docID>
    <docDate>September 1, 2009</docDate>
    <docSource></docSource>
    <docText>SHF:Small:Collaborative Research:Dynamic Invariant Inference, Enhanced

   In just a decade, dynamic invariant inference has emerged as one of the most promising directions in program analysis, with a variety of applications. An invariant inference system observes a program during test execution and filters a large number of candidate invariants (i.e., suspected relations between program data), finally reporting only those that hold with high confidence. However, inferred invariants are not always true (they depend on the quality of a test suite), and the few really useful invariants discovered are often accompanied by many more true but trivial and irrelevant facts. This work improves the quality of discovered invariants by ensuring their consistency with facts that are known statically. For instance, even though the invariants describing the behavior of two functions f1 and f2 may be unknown, we may know that any valid input for f1 is also valid for f2. This fact can be incorporated in the inference process to eliminate inconsistent invariants. More generally, the work explores techniques for expressing, discovering, and employing such consistency constraints to improve the quality of produced invariants, from type information and other sources including static analysis and user-supplied annotation.    The work will impact many aspects of software engineering, including scientific and industrial uses. Concrete benefits will be in the form of publications, usable software (released under an academic open-source license), software prototypes, and educational activities and resources (enhancement of a textbook and current courses, internships for high school students).</docText>
    <division>CCF</division>
    <directorate>CSE</directorate>
    <award-instr>Standard Grant</award-instr>
    <programreferencecode>HPCC</programreferencecode>
    <programreferencecode>9216</programreferencecode>
    <state>MA</state>
    <programreferencecode>9218</programreferencecode>
    <keyword>software engineering</keyword>
    <fieldofapplication>0000912 Computer Science</fieldofapplication>
    <organization>University of Massachusetts Amherst</organization>
    <programreferencecode>9217</programreferencecode>
    <pi>Smaragdakis, Yannis</pi>
    <program>PROGRAMMING LANGUAGES</program>
    <programelementcode>7943</programelementcode>
    <progmgr>Lenore D. Zuck</progmgr>
    <amount>167000</amount>
  </document>
  <document>
    <docID>0916568</docID>
    <docDate>July 1, 2009</docDate>
    <docSource></docSource>
    <docText>CIF:Small: Recursive Estimation of Randomly Modulated Processes

   Project Abstract:  CCF 0916568    ?CIF:  Small:  Recursive Estimation of Randomly Modulated Processes?    Many phenomena observed in science and engineering exhibit random variations over time.  Internet traffic, speech signals, and biological signals, are a few such examples.  Choosing a random process to model such phenomena involves a tradeoff between accuracy versus complexity. This project investigates fast computational methods for modeling random phenomena using a class of versatile random processes called randomly modulated processes.  A randomly modulated process consists of two simpler random processes, one which is observable and another which modulates the observable process.  By exploiting the structural properties of randomly modulated processes, the investigators are devising efficient and accurate methods to model a wide class of random phenomena. Specifically, the project develops recursive estimators to characterize Internet traffic accurately in real-time.  Other important applications of the estimators can be found in speech processing, nuclear medicine, biology, genetics, and finance.    The project focuses on the intertwined problems of signal and parameter estimation of randomly modulated processes.  Using a transformation of measure approach, the investigators are developing recursive estimators for such processes and investigating feasible approaches for solving the associated stochastic differential equations.  The research involves in-depth investigation and comparison of the transformation of measure approach with respect to traditional likelihood-based approaches that lead invariably to batch algorithms that can only be executed offline.  The project also involves the derivation of asymptotic properties of maximum likelihood estimators for randomly modulated processes.  Implementations of the recursive estimators are being applied to Internet traffic traces, with the objective of leveraging the estimators for network admission control and anomaly detection.</docText>
    <keyword>algorithms</keyword>
    <division>CCF</division>
    <directorate>CSE</directorate>
    <award-instr>Standard Grant</award-instr>
    <programreferencecode>HPCC</programreferencecode>
    <keyword>network</keyword>
    <programreferencecode>9218</programreferencecode>
    <progmgr>John Cozzens</progmgr>
    <fieldofapplication>0000912 Computer Science</fieldofapplication>
    <state>VA</state>
    <organization>George Mason University</organization>
    <program>SIGNAL PROCESSING</program>
    <programelementcode>7936</programelementcode>
    <copi>Brian Mark</copi>
    <pi>Ephraim, Yariv</pi>
    <amount>473235</amount>
  </document>
  <document>
    <docID>0916539</docID>
    <docDate>August 1, 2009</docDate>
    <docSource></docSource>
    <docText>SHF: Small: Energy-Efficient Memory Subsystems for the Many-Core Era

   The energy consumed by the memory subsystem is increasing as a fraction of the overall server energy consumption.  It is anticipated that upcoming low-power, byte-addressable, persistent-memory technologies, namely Phase-Change RAM (PC-RAM) and Spin-Transfer Torque RAM (STT-RAM), are likely to play a major role in conserving server energy.  These technologies are far superior to Flash and, most interestingly, may actually replace DRAM as well.    The research will study hybrid memory subsystems by combining these technologies and DRAM, as well as DRAM-free memory subsystems.  The outcomes of this investigation will be: (1) a body of knowledge about PC-RAM and STT-RAM and their potential benefits and limitations; (2) a collection of memory controller and operating system techniques for using these technologies to conserve energy, while bounding performance degradation to user-defined limits; and (3) a simulation and operating system infrastructure that can be used by others in their investigations of memory and energy issues. This work can promote a new direction in memory subsystem design and energ conservation, one that can have a profound impact on the design of future servers.</docText>
    <division>CCF</division>
    <directorate>CSE</directorate>
    <award-instr>Standard Grant</award-instr>
    <programreferencecode>HPCC</programreferencecode>
    <programreferencecode>9216</programreferencecode>
    <state>NJ</state>
    <programreferencecode>9218</programreferencecode>
    <fieldofapplication>0000912 Computer Science</fieldofapplication>
    <keyword>operating system</keyword>
    <keyword>simulation</keyword>
    <organization>Rutgers University New Brunswick</organization>
    <progmgr>Chitaranjan Das</progmgr>
    <programreferencecode>9217</programreferencecode>
    <program>COMPUTER ARCHITECTURE</program>
    <programelementcode>7941</programelementcode>
    <pi>Bianchini, Ricardo</pi>
    <amount>386942</amount>
  </document>
  <document>
    <docID>0916534</docID>
    <docDate>September 1, 2009</docDate>
    <docSource></docSource>
    <docText>NetSE: Small: Complex Adaptive Networks: Generative Models and Statistical Analysis

   Our society is becoming increasingly dependent on various technological networks, such as transportation systems, electrical power?distribution grids, computer networks, and so on. As those networks evolve and grow in complexity, their dynamical behavior is becoming difficult to understand and predict. This project will develop a general framework for modeling growth and evolution of such complex adaptive networks, based on the notion of interacting stochastic processes. The intuition behind this approach is that the interactions that form the network are informed by the collective state of the stochastic processes, while those processes themselves are affected by the forming network structure. The presence of such a feedback mechanism is vital for capturing realistic behavior of many real-world networks. The research will develop rigorous mathematical methods for analyzing structural and dynamical properties of adaptive networks, and define novel information?theoretic measures for quantifying their complexity.    Broader Impact: Our nation?s technological infrastructure of future will depend on our ability to control large?scale, dynamic networks of interconnected heterogeneous entities.  This work will help to better understand, characterize, and predict the collective behavior of such networks. The project will train new professionals and scientists in an important interdisciplinary area, and develop a graduate course material on complex adaptive networks.</docText>
    <division>CCF</division>
    <directorate>CSE</directorate>
    <programreferencecode>HPCC</programreferencecode>
    <award-instr>Continuing grant</award-instr>
    <keyword>network</keyword>
    <programreferencecode>9218</programreferencecode>
    <state>CA</state>
    <fieldofapplication>0000912 Computer Science</fieldofapplication>
    <organization>University of Southern California</organization>
    <progmgr>Eun K. Park</progmgr>
    <program>NETWORK SCIENCE &amp; ENGINEERING</program>
    <programelementcode>7794</programelementcode>
    <programreferencecode>7794</programreferencecode>
    <programreferencecode>7923</programreferencecode>
    <pi>Schorr, Herbert</pi>
    <copi>Aram Galstyan</copi>
    <amount>162728</amount>
  </document>
  <document>
    <docID>0916526</docID>
    <docDate>September 1, 2009</docDate>
    <docSource></docSource>
    <docText>AF:Small:A Novel Algorithmic Approach for Real-Time Image-to-Mesh Conversion of Brain MRI

       A Novel Algorithmic Approach for Real-Time Image-to-Mesh Conversion of Brain MRI    Abstract:  Image-to-Mesh (I2M) conversion   is the  tessellation of images   into simpler  geometrical   shapes  (or    elements)  like   triangles  and tetrahedral for 2D and  3D images, respectively.  In Computer Assisted Surgery (CAS) this tessellation (or finite element mesh) is a critical component  for  patient-specific  bio-mechanics  and  bio-fluid finite element (FE)  simulations.  In this project, we target I2M conversion for image guided  neurosurgery and endoscopic neck and head surgery.  Specifically, we  focus  on FE-based non-rigid  registration methods  which  use patient-specific   bio-mechanical  models  to fuse pre-operative  intra-operative brain  images (eg.   Magnetic Resonance Images and/or Computed Tomography Scans).    The objective of  this project is to  extend the Delaunay  refinement  algorithms and theory for guaranteed quality    I2M   conversion  that  meets     additional requirements related to:  (1)  accuracy of non-rigid registration   of brain images, and (2)  real-time constrains imposed by neurosurgery or head and neck surgery. The intellectual merit of this work is the development of novel  theoretical framework  which  extends existing point  insertion methods for both scalar  and parallel guaranteed quality Delaunay mesh generation.  These  extensions increase algorithm flexibility which is important to  satisfy application-specific requirements like fidelity.    The  proposal will have a  broader impact on several areas in both  CAS and Computer Aided  Design (CAD).  Non-rigid registration of medical images is an enabling  technology for many applications in CAS which is  a  rapidly  growing  area in   health  care industry.    Our algorithms will contribute in the prevention of medical errors and the  use of new (more  effective/accurate)  technologies which can lead  to products (i.e., image  guided neuro-navigation systems) that will help reduce medical and  hospitalization expenses.  Specifically, (1) image guided neurosurgery  increases  the  percentage  of  successful  tumor resections while minimizing the  potential for neurological deficit by preserving critical tissue  and hence improves prognosis for  patient, and (2) minimally invasive  endoscopic  surgery results in less  blood loss  and reduced  post-operative  pain  lead  to faster recovery  and earlier discharge of patients.   In addition  technology based on  our I2M conversion algorithms can be  used in medical simulators which can improve doctor training and minimize errors in medical procedures.</docText>
    <keyword>algorithms</keyword>
    <division>CCF</division>
    <directorate>CSE</directorate>
    <award-instr>Standard Grant</award-instr>
    <programreferencecode>HPCC</programreferencecode>
    <programreferencecode>9218</programreferencecode>
    <fieldofapplication>0000912 Computer Science</fieldofapplication>
    <state>VA</state>
    <pi>Chrisochoides, Nikos</pi>
    <organization>College of William and Mary</organization>
    <amount>500000</amount>
    <progmgr>Lenore M. Mullin</progmgr>
    <program>PARAL/DISTRIBUTED ALGORITHMS</program>
    <programelementcode>7934</programelementcode>
  </document>
  <document>
    <docID>0916525</docID>
    <docDate>August 15, 2009</docDate>
    <docSource></docSource>
    <docText>AF: Small: Collaborative Research: Studies in Nonuniformity, Completeness, and Reachability

   Computational complexity theory classifies computational problems into various complexity classes based on the amount of resources needed to solve them. This classification is done by measuring various resources such as time, space, nonuniformity, nondeterminism, and randomness. A better understanding of the relationships among these various resources shed light on the computational difficulty of the problems that are encountered in practice.     This project explores several central questions regarding nonuniformity, complete problems, and space bounded computations. This project attempts to discover improved upper bounds for problems with high circuit complexity. Regarding complete sets, non-relativizing properties of complete sets will be explored. Space bounded computations will be investigated in the context of planar graph reachability problems.     This project addresses several basic questions in computational complexity theory. The results from this project will further our understanding of computational resources such as nonuniformity, nondeterminism, and space. Research results will be published in peer-reviewed journals and will be presented at national and international conferences, thus enabling broad dissemination of the the results to enhance scientific understanding. New courses will be created and taught along the themes of this project, thus integrating teaching and research. The project supports various human resource development activities such as supporting and mentoring graduate students and inviting visitors.</docText>
    <division>CCF</division>
    <directorate>CSE</directorate>
    <award-instr>Standard Grant</award-instr>
    <programreferencecode>HPCC</programreferencecode>
    <programreferencecode>9218</programreferencecode>
    <fieldofapplication>0000912 Computer Science</fieldofapplication>
    <progmgr>Richard Beigel</progmgr>
    <organization>University of Nebraska-Lincoln</organization>
    <state>NE</state>
    <programreferencecode>9150</programreferencecode>
    <pi>Variyam, Vinodchandran</pi>
    <program>COMPLEXITY &amp; CRYPTOGRAPHY</program>
    <programelementcode>7927</programelementcode>
    <amount>272031</amount>
  </document>
  <document>
    <docID>0916492</docID>
    <docDate>July 1, 2009</docDate>
    <docSource></docSource>
    <docText>CIF: Small: List Decoding for Algebraic Geometry Codes: Theoretical Analysis, Efficient Algorithms, Practical Implementation

   CIF:Small:Decoding of Algebraic Geometry Codes:  Theoretical Analysis, Efficient Algorithms,  Practical Implementation    Error control coding ensures the reliability of  data transmitted in a noisy environment and is therefore a critical component of communications systems. By adding a bit of redundancy to data, and using sophisticated mathematical algorithms to encode and decode,  errors in the system can be reduced to an arbitrarily low threshold. This project concerns algebraic geometry (AG) codes, a large and powerful family of codes that includes Reed-Solomon (RS) codes, which are the standard code used in commercial products today. The standard decoding algorithm for Reed-Solomon codes is the Berlekamp-Massey algorithm, which decodes up to the sphere-packing bound. In the 1980's and 1990's, AG codes were discovered that yielded better error correction performance than RS codes, and efficient algorithms generalizing Berlekamp-Massey were developed. A method for efficiently decoding beyond the sphere-packing bound, called list decoding, was discovered in the 1990's by Sudan.    This project advances the theoretical, algorithmic and applied understanding of list decoding for AG codes. There is strong evidence that Sudan's method, when used on high-rate AG codes,  can perform much better than current analysis predicts, so a primary focus is improving the  theoretical underpinnings of list decoding to discover its maxim capabilities for AG codes. The investigators also improve the efficiency of current algorithms and tailor them to hardware implementation by  combining classical Berlekamp-Massey type methods and recent innovations due to several researchers. The investigators  work with hardware and communication engineers in industry and in academia to identify applications where the special properties of AG codes will be particularly advantageous.</docText>
    <keyword>algorithms</keyword>
    <division>CCF</division>
    <directorate>CSE</directorate>
    <award-instr>Standard Grant</award-instr>
    <programreferencecode>HPCC</programreferencecode>
    <programreferencecode>9218</programreferencecode>
    <state>CA</state>
    <fieldofapplication>0000912 Computer Science</fieldofapplication>
    <progmgr>William H Tranter</progmgr>
    <program>COMM &amp; INFORMATION THEORY</program>
    <programelementcode>7935</programelementcode>
    <pi>O'Sullivan, Michael</pi>
    <organization>San Diego State University Foundation</organization>
    <amount>223974</amount>
  </document>
  <document>
    <docID>0916481</docID>
    <docDate>September 15, 2009</docDate>
    <docSource></docSource>
    <docText>SHF:Small: EXACT: Explicit Dynamic-Branch Prediction with Active Updates

   A computer program consists of many low-level instructions that are executed by a microprocessor. The key to executing a program faster is executing more instructions in parallel. Branch instructions hinder this process since a branch must be executed before subsequent instructions can be executed. A microprocessor attempts to circumvent this constraint by predicting the outcome of the branch, enabling instructions from the predicted target to be executed speculatively and without delay. Because it is so critical to performance, branch prediction has been studied and steadily improved for decades. Microprocessor performance is projected to be flat for the foreseeable future, after decades of exponential growth. A breakthrough in branch predictor design would be transformational.     This project provides insight into why conventional branch predictors are limited. A whole new direction in branch predictor design is revealed by this understanding. Two interrelated problems are exposed: 1) conventional predictors often fail to distinguish dynamic branches for which specialized predictions are required, especially memory-dependent branches, and 2) explicitly specializing predictions for these dynamic branches does not fix the problem alone, because stores to their dependent memory addresses change their future outcomes anyway. This project proposes two unprecedented principles for branch predictor design: first, explicitly identifying dynamic branches in order to provide them with specialized predictions and, second, actively updating their predictions when stores occur to their dependent memory addresses. Together, these two principles are called EXACT, stands for EXplicit dynamic-branch prediction with ACTive updates.    The goal of the proposed research is to apply these two principles to design predictors that achieve leaps in branch prediction accuracy, halving or more than halving the number of mispredictions with respect to the best known predictor. Results with idealized implementations demonstrate such leaps in accuracy are possible and a first realistic implementation already achieves a significant fraction of this potential. To achieve broader impact, project participants will collaborate closely with industry partners, Intel and IBM, to translate EXACT technology into future microprocessor designs.</docText>
    <division>CCF</division>
    <directorate>CSE</directorate>
    <award-instr>Standard Grant</award-instr>
    <programreferencecode>HPCC</programreferencecode>
    <programreferencecode>9216</programreferencecode>
    <programreferencecode>9218</programreferencecode>
    <fieldofapplication>0000912 Computer Science</fieldofapplication>
    <organization>North Carolina State University</organization>
    <state>NC</state>
    <pi>Rotenberg, Eric</pi>
    <progmgr>Chitaranjan Das</progmgr>
    <programreferencecode>9217</programreferencecode>
    <program>COMPUTER ARCHITECTURE</program>
    <programelementcode>7941</programelementcode>
    <amount>206330</amount>
  </document>
  <document>
    <docID>0916471</docID>
    <docDate>August 1, 2009</docDate>
    <docSource></docSource>
    <docText>CIF:Small:Visual Information Measures for Task-Based Imaging Applications

   Many digital images are not acquired for documentary evidence or for archival use, but instead are intermediate pieces of information to be ultimately used by a human to assess a situation, make a decision, or reach a conclusion. Often, the image need not provide "picture-perfect quality" in order for a human to successfully perform a task - consider security screening of carry-on baggage, for example. Many tasks can be easily performed with images that would be considered to be severely degraded in a purely aesthetic sense.  To date, however, image assessment algorithms have been primarily focused on evaluating aesthetic quality.  These algorithms are typically designed for relatively high-quality images, and they do not perform well on highly degraded images which exhibit low aesthetic quality but remain useful for human-performed tasks.    This research characterizes the suitability of an image for recognition and the perceived utility in terms of conveying information about content. The characterization is performed in terms of properties of the image, rather than in terms of the response of higher-level vision to the image, and is based upon extensive subjective experiments quantifing the perceived utility of highly degraded images and identifing recognition thresholds for images - maximally degraded images that still allow recognition.  A utility measure is developed which takes as input the original image and the distorted image and outputs a distance quantifying the amount of degradation in the image relative to both the recognition threshold (at the low end) and to the original or a visually lossless representation of the original (at the high end).  Use of this measure is demonstrated by integration this measure into imaging applications including compression and enhancement.</docText>
    <keyword>algorithms</keyword>
    <division>CCF</division>
    <directorate>CSE</directorate>
    <award-instr>Standard Grant</award-instr>
    <programreferencecode>HPCC</programreferencecode>
    <keyword>security</keyword>
    <programreferencecode>9218</programreferencecode>
    <progmgr>John Cozzens</progmgr>
    <state>NY</state>
    <fieldofapplication>0000912 Computer Science</fieldofapplication>
    <organization>Cornell University</organization>
    <keyword>vision</keyword>
    <program>SIGNAL PROCESSING</program>
    <programelementcode>7936</programelementcode>
    <pi>Hemami, Sheila</pi>
    <amount>268261</amount>
  </document>
  <document>
    <docID>0916465</docID>
    <docDate>September 1, 2009</docDate>
    <docSource></docSource>
    <docText>CIF: Small: A Space Dimension Approach for Wireless Netowrk Information Theory

   This project considers the physical limits of communication in a wireless network and how these limits can be achieved by communication protocols in an effective way. Specifically, it aims at determining the fundamental limits of the capacity of the network using an innovative approach based on physics, rather than postulating random propagation channel models. The project focuses on the characterization of the amount of spatial diversity that a wireless networks can provide, which is shown to be one of the central issues to determine its capacity. The spatial diversity is quantified in terms of the dimensionality of the propagating field, which is what carries the information through the network. Hence, drawing connections between information theory, functional analysis of continuous vector spaces, electromagnetic theory, and networks, the project aims at developing an information theory for wireless networks. The project considers different geometric configurations of wireless network, and determines their corresponding number of spatial degrees of freedom. It then considers both the effects of narrow-band and wide-band frequency transmission. Results are in terms of scaling laws, as well as capacity laws that are not asymptotic in the number of nodes in the network.</docText>
    <division>CCF</division>
    <directorate>CSE</directorate>
    <award-instr>Standard Grant</award-instr>
    <programreferencecode>HPCC</programreferencecode>
    <keyword>network</keyword>
    <keyword>wireless</keyword>
    <programreferencecode>9218</programreferencecode>
    <state>CA</state>
    <fieldofapplication>0000912 Computer Science</fieldofapplication>
    <organization>University of California-San Diego</organization>
    <progmgr>William H Tranter</progmgr>
    <program>COMM &amp; INFORMATION THEORY</program>
    <programelementcode>7935</programelementcode>
    <pi>Franceschetti, Massimo</pi>
    <amount>262331</amount>
  </document>
  <document>
    <docID>0916452</docID>
    <docDate>September 1, 2009</docDate>
    <docSource></docSource>
    <docText>MSC: Sequential Classification and Detection via Markov Models in Point Clouds of Urban Scenes

   One of the most important problems in 3D computer vision and graphics is the automatic scene reconstruction from 2D and 3D images. Recently, the reconstruction of complex urban scenes has attracted significant interest. This is because accurate 3D city models are paramount in the further development of a variety of fields such as urban planning, architecture, and archeology. They are also very important for applications commonly used in everyday life such as street map visualization and navigation, as well as in the film and construction industries. Automatic 3D image reconstruction and classification of urban scenes, though, is a problem whose complexity still challenges today?s research community. 3D reconstruction of city models is achieved through data acquisition using a variety of devices such as laser scanners and regular cameras. While laser scanners provide dense, detailed and accurate 3D points, they suffer from slow speed which dramatically increases the cost of acquisition.    This project, which is led by a multi-disciplinary team, combines expertise from computer vision, mathematical modeling and statistics to address this limitation.  The goal of this work is to develop and implement real-time detection and classification techniques applied to streams of 3D point-cloud data. This allows focused acquisition of objects of interest (e.g.  facades, etc.) and thus increases speed and reduces power consumption.  It also aids high-level recognition processes in detecting and classifying objects in urban scenes. Reduction of the high-dimensional nature of the data is achieved by the clever innovative selection of a measurement model.  A new formulation using hidden Markov models is used to capture the complexity of urban scenes. The real-time algorithms are tested on point-cloud data acquired in a real urban setting by the latest generation of laser range scanning technology.    On the education front, this project provides a stimulating research environment for both undergraduate and graduate students on the interdisciplinary frontier of mathematics and computer science. It also provides a framework for innovating the curriculum at both Brooklyn, a minority-serving institution, and Hunter Colleges through the development of interdisciplinary courses.</docText>
    <keyword>algorithms</keyword>
    <division>CCF</division>
    <directorate>CSE</directorate>
    <award-instr>Standard Grant</award-instr>
    <programreferencecode>HPCC</programreferencecode>
    <keyword>visualization</keyword>
    <keyword>architecture</keyword>
    <programreferencecode>9218</programreferencecode>
    <state>NY</state>
    <program>SPECIAL PROJECTS - CCF</program>
    <programelementcode>2878</programelementcode>
    <fieldofapplication>0000912 Computer Science</fieldofapplication>
    <progmgr>Richard Beigel</progmgr>
    <keyword>graphics</keyword>
    <program>INFORMATION TECHNOLOGY RESEARC</program>
    <programelementcode>1640</programelementcode>
    <keyword>education</keyword>
    <keyword>computer vision</keyword>
    <keyword>vision</keyword>
    <organization>CUNY Hunter College</organization>
    <program>OFFICE OF MULTIDISCIPLINARY AC</program>
    <programelementcode>1253</programelementcode>
    <pi>Stamos, Ioannis</pi>
    <copi>Olympia Hadjiliadis</copi>
    <amount>379998</amount>
  </document>
  <document>
    <docID>0916451</docID>
    <docDate>August 1, 2009</docDate>
    <docSource></docSource>
    <docText>SHF: Small: Reliability Enhancement via Adaptive Checkpoingint in Wireless Grids

     This research aims to turn existing wireless mesh networks (WMNs) into productive and reliable computing platforms, made possible innovatively by reliability enhancement via adaptive checkpointing (REACT) to yield wireless Grids (WiGs).  WiGs can expand immensely the wired Grid in support of rapidly growing cloud applications, besides serving as their original role of ubiquitous communications.  It is extremely challenging and yet interesting to realize effective checkpointing in WiGs, due to their unique characteristics.  This REACT project deals with three technical challenges, which together constitute the basis of our Checkpoint Manager, able to render WMNs into productive WiGs for enhancing and complementing wired Grids.    The project holds great promise to advance technical understanding and scientific frontiers of effective checkpointing in WiGs.  It will also improve the research and educational activities on Grid computing and wireless systems strongly in the University of Louisiana, with the testbed established under this project deemed a valuable asset. New research findings and technologies for effective checkpointing and wireless communication performance enhancement will be incorporated into relevant courses, helping to integrate research and education for enriched teaching, training, and learning experience and to educate quality future scientists critical to the NSF mission.  Underrepresented students will be recruited aggressively to participate in this project, taking advantage of the established REACT testbed and working collaboratively with funded graduate research assistants to stimulate their research interest.</docText>
    <division>CCF</division>
    <directorate>CSE</directorate>
    <award-instr>Standard Grant</award-instr>
    <programreferencecode>HPCC</programreferencecode>
    <programreferencecode>9216</programreferencecode>
    <keyword>wireless</keyword>
    <programreferencecode>9218</programreferencecode>
    <fieldofapplication>0000912 Computer Science</fieldofapplication>
    <state>LA</state>
    <keyword>ubiquitous</keyword>
    <keyword>education</keyword>
    <progmgr>Chitaranjan Das</progmgr>
    <programreferencecode>9217</programreferencecode>
    <pi>Tzeng, Nian-Feng</pi>
    <organization>University of Louisiana at Lafayette</organization>
    <program>COMPUTER ARCHITECTURE</program>
    <programelementcode>7941</programelementcode>
    <amount>364000</amount>
  </document>
  <document>
    <docID>0916438</docID>
    <docDate>August 1, 2009</docDate>
    <docSource></docSource>
    <docText>Runtime and Static Verification of Concurrent Systems

   The project will develop techniques for monitoring systems to check if their executions satisfy a property specified by an automaton or a temporal logic specification. Systems to be monitored are modeled as a stochastic system. The project proposes accuracy measures that denote how accurately the desired property is monitored.  The research will implement the accuracy measures as monitors for such systems. The research will also develop active monitors that interact with the underlying system to ensure the correctness properties, as well as techniques for detection of failures from a system?s external behavior  and static verification techniques based on model checking employing symmetry based reduction.  The work will lead to mathematically rigorous and powerful techniques that will improve the reliability of increasingly complex systems.</docText>
    <division>CCF</division>
    <directorate>CSE</directorate>
    <award-instr>Standard Grant</award-instr>
    <programreferencecode>HPCC</programreferencecode>
    <programreferencecode>9216</programreferencecode>
    <keyword>verification</keyword>
    <programreferencecode>9218</programreferencecode>
    <fieldofapplication>0000912 Computer Science</fieldofapplication>
    <state>IL</state>
    <progmgr>Sol J. Greenspan</progmgr>
    <programreferencecode>9217</programreferencecode>
    <organization>University of Illinois at Chicago</organization>
    <pi>Sistla, Aravinda</pi>
    <program>SOFTWARE ENG &amp; FORMAL METHODS</program>
    <programelementcode>7944</programelementcode>
    <amount>485491</amount>
  </document>
  <document>
    <docID>0916436</docID>
    <docDate>September 1, 2009</docDate>
    <docSource></docSource>
    <docText>SHF: Small: Hardware/Software Management of Large Multi-Core Memory Hierarchies

       In future high-performance microprocessors, memory system organization and management is perhaps the most critical looming issue.  Accesses to memory will incur long delays and energy overheads in various queuing structures and in long wires.  Each access will experience non-uniform delay and energy overheads based on the location of the stored data. Efficient layout of data within the memory hierarchy is therefore essential for high performance and low power.  In this proposal, the PIs put forth a comprehensive hardware/software strategy for data placement in cache/memory structures with non-uniform delay and power. Novel mechanisms are proposed to cost-effectively migrate pages within the memory hierarchy.  These mechanisms will attempt to leverage hardware structures, OS support, compiler hints, and compiler transformations.  The PIs also plan to engage in broader impact activities that encourage minority participation and augment research infrastructure.</docText>
    <division>CCF</division>
    <directorate>CSE</directorate>
    <programreferencecode>HPCC</programreferencecode>
    <programreferencecode>9216</programreferencecode>
    <award-instr>Continuing grant</award-instr>
    <keyword>compiler</keyword>
    <programreferencecode>9218</programreferencecode>
    <fieldofapplication>0000912 Computer Science</fieldofapplication>
    <organization>University of Utah</organization>
    <state>UT</state>
    <progmgr>Chitaranjan Das</progmgr>
    <programreferencecode>9217</programreferencecode>
    <copi>Mary Hall</copi>
    <pi>Balasubramonian, Rajeev</pi>
    <program>COMPUTER ARCHITECTURE</program>
    <programelementcode>7941</programelementcode>
    <amount>141000</amount>
  </document>
  <document>
    <docID>0916415</docID>
    <docDate>September 1, 2009</docDate>
    <docSource></docSource>
    <docText>SHF: Small: Collaborative Research: Correlation Mining and its Applications in Test Cost Reduction, Yield Enhancement, and Performance Calibration in Analog/RF Circuits

   This project seeks to improve the quality and reliability of Analog/Radio-Frequency (RF) integrated electronic circuits (ICs) by developing an intelligent system for systematically exploring the wealth of information generated throughout their production lifetime and applying it towards improving the effectiveness of their design, manufacturing, and testing. While a large amount of data is made available through extensive design simulations and measurements on actual fabricated circuits, there currently exists a striking lack of formal methods to efficiently extract meaningful information from this data. The research activities that will be carried out through this project aim to fill this void by developing correlation mining methods based on the most recent developments in the fields of machine learning and data mining. Ultimately, using data from actual IC productions provided by industrial partners (i.e. IBM and Texas Instruments), the objective of this project is to demonstrate the impact that such correlations can have on reducing the cost of testing, enhancing the yield of the production and enabling post-manufacturing calibration of analog/RF circuits.     This project will facilitate the cost-effective realization of robust electronic circuits and systems, thus enabling more reliable computing and promoting technology trustworthiness. The proposed research is complemented by educational and outreach activities, including the development of a new graduate-level course on applications of Machine-Learning in Computer Aided Design and Test and the involvement of graduate, undergraduate and high-school students in research with the groups of the Principal Investigators, the industrial partners, and the research laboratory of the international collaborator.</docText>
    <division>CCF</division>
    <directorate>CSE</directorate>
    <award-instr>Standard Grant</award-instr>
    <programreferencecode>HPCC</programreferencecode>
    <programreferencecode>9216</programreferencecode>
    <programreferencecode>9218</programreferencecode>
    <state>NY</state>
    <fieldofapplication>0000912 Computer Science</fieldofapplication>
    <progmgr>Sankar Basu</progmgr>
    <keyword>formal methods</keyword>
    <keyword>machine learning</keyword>
    <keyword>data mining</keyword>
    <programreferencecode>9217</programreferencecode>
    <amount>209999</amount>
    <organization>Rensselaer Polytechnic Institute</organization>
    <pi>Drineas, Petros</pi>
    <program>DES AUTO FOR MICRO &amp; NANO SYST</program>
    <programelementcode>7945</programelementcode>
  </document>
  <document>
    <docID>0916400</docID>
    <docDate>June 1, 2009</docDate>
    <docSource></docSource>
    <docText>AF: Small: Graph Isomorphism and Quantum Random Walks by Anyons

   Quantum computers offer the potential to exponentially speed up the solution of certain classically hard computational problems.  It is already known, for example, that quantum computers can efficiently factor numbers (something modern computers cannot do), and this fact implies that quantum computers can break the majority of cryptographic systems which protect our nation's cyber-infrastructure.  The quantum factoring algorithm is the main motivation behind current research into actually building a quantum computer.  In this grant, the investigator proposes a new approach to efficiently solving a computational problem--the graph isomorphism problem--which might also admit an exponential speedup over the best classical algorithm for the problem.  The graph isomorphism problem is to tell whether two given graphs (a collection of vertices with edges connecting them) can be made to look identical to each other by permuting the different vertices.  The approach taken here is different from that taken by the majority of the quantum algorithms community and centers on a novel class of quantum random walks, those in which the walkers carry topological quantum numbers.  This approach follows from a series of failed proposals to graph isomorphism based on random walks by hard-core bosons or fermions and is motivated by the form in which these proposals fail.  Finding an efficient quantum algorithm for the graph isomorphism problem would be potentially transformative and would provide a major new justification for building a large quantum computer.  The approach chosen by the PI also introduces a novel quantum algorithm technique--quantum random walks by anyons--which has the potential to be useful a primitive outside of the graph isomorphism problem.   Finally, the award will be used to support the training of graduate students who work on the boundary between computer science and physics, and thus strengthen connections across this interdisciplinary divide.</docText>
    <keyword>algorithms</keyword>
    <division>CCF</division>
    <directorate>CSE</directorate>
    <award-instr>Standard Grant</award-instr>
    <programreferencecode>HPCC</programreferencecode>
    <programreferencecode>9218</programreferencecode>
    <fieldofapplication>0000912 Computer Science</fieldofapplication>
    <organization>University of Washington</organization>
    <state>WA</state>
    <progmgr>Dmitry Maslov</progmgr>
    <pi>Bacon, Dave</pi>
    <program>QUANTUM COMPUTING</program>
    <programelementcode>7928</programelementcode>
    <amount>499922</amount>
  </document>
  <document>
    <docID>0916389</docID>
    <docDate>August 1, 2009</docDate>
    <docSource></docSource>
    <docText>AF: Small: Algorithms for Active Learning of Interaction Networks

   The project will seek efficient algorithms for extracting the structure of interaction networks: systems consisting of finite populations of elements in which the state of each element may change as a result of interactions with a small set of other elements according to specific rules of interaction.  Such networks are ubiquitous in the physical and social sciences, and include standard models such as Boolean circuits, Bayesian networks, social networks, chemical systems, gene regulation networks, and epidemiological models of the spread of disease.  The research carried out will apply methods of active learning based on recent progress by the principal investigators on determining the structure of certain kinds of Boolean, analog and probabilistic circuits and social networks using experiments.</docText>
    <keyword>algorithms</keyword>
    <division>CCF</division>
    <directorate>CSE</directorate>
    <award-instr>Standard Grant</award-instr>
    <programreferencecode>HPCC</programreferencecode>
    <programreferencecode>9218</programreferencecode>
    <fieldofapplication>0000912 Computer Science</fieldofapplication>
    <progmgr>Richard Beigel</progmgr>
    <keyword>ubiquitous</keyword>
    <organization>Yale University</organization>
    <state>CT</state>
    <amount>500000</amount>
    <program>ALGORITHMS</program>
    <programelementcode>7926</programelementcode>
    <pi>Angluin, Dana</pi>
    <copi>James Aspnes</copi>
  </document>
  <document>
    <docID>0916387</docID>
    <docDate>August 1, 2009</docDate>
    <docSource></docSource>
    <docText>SHF: Small: RUI: Collaborative Research:Accelerators to Applications - Supercharging the Undergraduate Computer Science Curriculum

   The project integrates graduate research activities in hybrid, accelerated computing applications with undergraduate computer and computational science curricula, preparing undergraduates for graduate school and industry professions with application development experience in technologies essential to emerging high-performance computing and peta-scale systems. Curriculum enhancements across multiple computer science and engineering courses are investigated using real research activities to identify specific improvements needed at the undergraduate level. The research focuses on the use of leading accelerator technologies (multi-core CPUs, GPUs, and FPGAs) in real scientific computing challenges and translating the insights, concepts, and examples for use in undergraduate computer science and engineering instruction. The significance of pairing research investigations with curricular development affords the opportunity to bring real experiences into the undergraduate classroom. Research level investigations will help to characterize the unique inter-dependency of computer architectures and high-performance applications. The resources, strategies and examples created in this project are available to undergraduate programs across the country that wish to provide instruction on the next generation hardware and software environments. The project also reaches several underrepresented populations through outreach efforts at local high schools, regional HBCUs, and leverages existing REU programs.</docText>
    <division>CCF</division>
    <directorate>CSE</directorate>
    <award-instr>Standard Grant</award-instr>
    <programreferencecode>HPCC</programreferencecode>
    <programreferencecode>9218</programreferencecode>
    <progmgr>Almadena Y. Chtchelkanova</progmgr>
    <fieldofapplication>0000912 Computer Science</fieldofapplication>
    <keyword>computational science</keyword>
    <keyword>scientific computing</keyword>
    <program>EXP PROG TO STIM COMP RES</program>
    <programelementcode>9150</programelementcode>
    <programreferencecode>9150</programreferencecode>
    <keyword>high-performance computing</keyword>
    <programreferencecode>9229</programreferencecode>
    <organization>Clemson University</organization>
    <state>SC</state>
    <program>HIGH-PERFORMANCE COMPUTING</program>
    <programelementcode>7942</programelementcode>
    <pi>Smith, Melissa</pi>
    <amount>309416</amount>
  </document>
  <document>
    <docID>0916384</docID>
    <docDate>September 1, 2009</docDate>
    <docSource></docSource>
    <docText>SHF: Small: Leveraging the Interplay between Process Variation and NBTI in Nanoscale Reliable NoC Architecture Design

     The trend towards multi-/many- core design has made network-on-chip (NoC) a crucial hardware component of future microprocessors. With the continuous down-scaling of CMOS processing technologies, reliability is becoming a primary target in NoC design. Negative Bias Temperature Instability (NBTI) is a critical reliability threat for deep sub-micrometer CMOS technologies. NBTI increases the PMOS transistor threshold voltage and reduces the drive current, causing failures in logic circuits and storage structures due to timing violations or minimum voltage limitations. Meanwhile, process variation (PV) - the divergence of transistor process parameters from their design specifications - caused by the difficulty in controlling sub-wavelength lithography and channel doping as CMOS manufacturing technology scales, results in variability in circuit performance/power and has become a major challenge in the design and fabrication of future microprocessors and NoCs. Since NBTI and PV affect both NoC delay and power, it is imperative to address these challenges at the NoC architecture design stage to ensure its efficiency as the underlying CMOS fabrication technologies continue to scale.     The goal of this project is to develop techniques for designing novel, cost-effective router microarchitectures and adaptive routing schemes that mitigate NBTI and PV impact on NoCs by leveraging the interplay between the two. The scalability and sustainability of future many-core processors crucially depend on the dependability of NoCs. Mechanisms that can simultaneously tolerate PV and NBTI will be investigated for enhancing the reliability of NoCs fabricated using nanoscale transistor technologies. The educational and outearch activities include recruiting graduate and undergraduate students from under-represented groups for this project and integration of research and education.</docText>
    <division>CCF</division>
    <directorate>CSE</directorate>
    <award-instr>Standard Grant</award-instr>
    <programreferencecode>HPCC</programreferencecode>
    <programreferencecode>9216</programreferencecode>
    <keyword>network</keyword>
    <keyword>architecture</keyword>
    <programreferencecode>9218</programreferencecode>
    <fieldofapplication>0000912 Computer Science</fieldofapplication>
    <organization>University of Florida</organization>
    <state>FL</state>
    <keyword>education</keyword>
    <progmgr>Dmitry Maslov</progmgr>
    <programreferencecode>9217</programreferencecode>
    <program>COMPUTER ARCHITECTURE</program>
    <programelementcode>7941</programelementcode>
    <pi>Li, Tao</pi>
    <program>NANOCOMPUTING</program>
    <programelementcode>7947</programelementcode>
    <copi>Jose Fortes</copi>
    <amount>407092</amount>
  </document>
  <document>
    <docID>0916351</docID>
    <docDate>September 1, 2009</docDate>
    <docSource></docSource>
    <docText>SHF: Small: Programming Abstractions for Algorithmic Software Synthesis

     This award is funded under the American Recovery and Reinvestment Act of 2009 (Public Law 111-5).    In contrast to software verification, software synthesis "writes" programs rather than merely checks them for errors.  While verification has recently reached the programmer, the success of synthesis remains in the hands of formally trained experts.  To ease the adoption of synthesis, this proposal develops algorithmic synthesis, which is to deductive synthesis what model checking is to deductive verification: Rather than deducing a program with a theorem prover, algorithmic synthesis systematically finds the program in a space of candidate implementations.     A key remaining challenge is how to describe this candidate space.  Each synthesizer must be "programmed" with insights about the domain and its implementation tricks.  In deductive synthesis, the insight is conveyed by a domain theory.  In algorithmic synthesis, programmers typically communicate their insight by writing a partial program that syntactically defines the candidate space.  The partial program is then completed by the synthesizer.  Since the program is specified partially, programmers can control the candidate space size, making algorithmic synthesis feasible while leaving tedious program details to the synthesizer.     This project investigates linguistic aspects of algorithmic synthesis, addressing three issues: (1) How to debug partial programs?  Angelically non-deterministic oracles will be used for gradual development of partial programs.  (2) What is domain insight and how to communicate it?  Programming abstractions will be developed for defining the candidate space naturally. (3) How to refine the insight with the goal of aiding the synthesizer scalability?  An interactive dialogue between the programmer and the synthesizer will help the programmer refine and formalize her insight.</docText>
    <division>CCF</division>
    <directorate>CSE</directorate>
    <award-instr>Standard Grant</award-instr>
    <programreferencecode>HPCC</programreferencecode>
    <programreferencecode>9216</programreferencecode>
    <keyword>verification</keyword>
    <programreferencecode>9218</programreferencecode>
    <state>CA</state>
    <fieldofapplication>0000912 Computer Science</fieldofapplication>
    <organization>University of California-Berkeley</organization>
    <pi>Bodik, Rastislav</pi>
    <programreferencecode>9217</programreferencecode>
    <amount>500000</amount>
    <program>PROGRAMMING LANGUAGES</program>
    <programelementcode>7943</programelementcode>
    <programreferencecode>6890</programreferencecode>
    <progmgr>Lenore D. Zuck</progmgr>
  </document>
  <document>
    <docID>0916350</docID>
    <docDate>July 15, 2009</docDate>
    <docSource></docSource>
    <docText>SHF: Small: Collaborative Research: Specification and Verification of Safety Critical Java

   Software is increasingly important in aircraft, spacecraft, cars, and medical devices, which are all safety-critical.  As the size and complexity of the software increases, so does the likelihood for defects with potentially catastrophic consequences. This research aims to simultaneously increase the level of assurance and raise the level of abstraction in safety critical systems, by supporting Safety Critical Java that uses C for driver code (SCJ+C).  The project will implement and evaluate SCJ+C and provide modular specification techniques and verification tools for it.  Few such tools exist for object-oriented real-time programs, and thus there has been little critical evaluation of techniques and tools for real-time safety-critical programming.  Modular reasoning about timing constraints is a known hard problem, due to the dependence of a method's timing on all methods it calls.    The project will leverage the Java Modeling Language (JML) as a specification tool to build a set of practical JML-based tools for the timing analysis of SCJ+C programs. The research will allow the application of formal methods for certification, correctness, bug-finding, and timing properties for real-time critical systems. This will help productivity, by allowing programmers to develop and reason about their systems at an appropriate level of abstraction.</docText>
    <division>CCF</division>
    <directorate>CSE</directorate>
    <award-instr>Standard Grant</award-instr>
    <programreferencecode>HPCC</programreferencecode>
    <programreferencecode>9216</programreferencecode>
    <keyword>verification</keyword>
    <programreferencecode>9218</programreferencecode>
    <fieldofapplication>0000912 Computer Science</fieldofapplication>
    <keyword>object-oriented</keyword>
    <state>FL</state>
    <progmgr>Sol J. Greenspan</progmgr>
    <keyword>formal methods</keyword>
    <programreferencecode>9217</programreferencecode>
    <pi>Leavens, Gary</pi>
    <organization>University of Central Florida</organization>
    <program>PROGRAMMING LANGUAGES</program>
    <programelementcode>7943</programelementcode>
    <amount>249981</amount>
  </document>
  <document>
    <docID>0916314</docID>
    <docDate>July 1, 2009</docDate>
    <docSource></docSource>
    <docText>CIF: Small: Collaborative Research: Signal Design for Low-Complexity Active Sensing

   Abstract    "This award is funded under the American Recovery and Reinvestment Act of 2009  (Public Law 111-5)."    This research program is motivated by the recognition that the volume of sensor data is expected to overwhelm even the enormous performance improvements in silicon technology expressed by Moore's Law. The focus is the development of a low-complexity alternative to non-adaptive image formation through innovations in signal design. The objectives support closer monitoring of weather patterns and may lead to a more detailed understanding of climate change. They also impact a wider range of surveillance applications from microwave landing systems to through-wall imaging. The research program is highly interdisciplinary with signal processing as the bridge between application domains and the mathematics of sequence design.  Current hardware allows transmission of wavefields that vary across space, polarization, time and frequency and which can be changed in rapid succession. However, sensing resolution is limited, not by hardware, but by the complexity of remote image formation. This research program develops new signal design principles that enable fast and reliable active sensing with minimal receiver signal processing complexity. The basic unit of transmission is a unitary matrix of phase coded waveforms indexed by array element and by pulse repetition interval, where the polarization of constituent waveforms may vary. Golay Complementary waveforms appear as entries of these matrices. Appropriate sequencing of unitary waveform matrices in time eliminates Doppler induced range sidelobes and provides resilience to multipath without compromising the simplicity of signal processing. OFDM signaling of complementary waveforms improves performance beyond conventional matched filtering by introducing nonlinear signal processing that exchanges static sidelobes for more dynamic cross-terms. The development of a new mathematical framework based on group theory enables the systematic construction of new complementary sequences.</docText>
    <division>CCF</division>
    <directorate>CSE</directorate>
    <award-instr>Standard Grant</award-instr>
    <programreferencecode>HPCC</programreferencecode>
    <programreferencecode>9218</programreferencecode>
    <progmgr>John Cozzens</progmgr>
    <fieldofapplication>0000912 Computer Science</fieldofapplication>
    <state>CO</state>
    <organization>Colorado State University</organization>
    <program>WIRELESS COMM &amp; SIGNAL PROCESS</program>
    <programelementcode>7939</programelementcode>
    <programreferencecode>6890</programreferencecode>
    <pi>Pezeshki, Ali</pi>
    <amount>161545</amount>
  </document>
  <document>
    <docID>0916310</docID>
    <docDate>July 15, 2009</docDate>
    <docSource></docSource>
    <docText>SHF: Small: Collaborative Research: Specification and Verification of Safety Critical Java

   Software is increasingly important in aircraft, spacecraft, cars, and medical devices, which are all safety-critical.  As the size and complexity of the software increases, so does the likelihood for defects with potentially catastrophic consequences. This research aims to simultaneously increase the level of assurance and raise the level of abstraction in safety critical systems, by supporting Safety Critical Java that uses C for driver code (SCJ+C).  The project will implement and evaluate SCJ+C and provide modular specification techniques and verification tools for it.  Few such tools exist for object-oriented real-time programs, and thus there has been little critical evaluation of techniques and tools for real-time safety-critical programming.  Modular reasoning about timing constraints is a known hard problem, due to the dependence of a method's timing on all methods it calls.    The project will leverage the Java Modeling Language (JML) as a specification tool to build a set of practical JML-based tools for the timing analysis of SCJ+C programs. The research will allow the application of formal methods for certification, correctness, bug-finding, and timing properties for real-time critical systems. This will help productivity, by allowing programmers to develop and reason about their systems at an appropriate level of abstraction.</docText>
    <division>CCF</division>
    <directorate>CSE</directorate>
    <award-instr>Standard Grant</award-instr>
    <programreferencecode>HPCC</programreferencecode>
    <programreferencecode>9216</programreferencecode>
    <amount>250000</amount>
    <keyword>verification</keyword>
    <programreferencecode>9218</programreferencecode>
    <organization>Purdue University</organization>
    <state>IN</state>
    <fieldofapplication>0000912 Computer Science</fieldofapplication>
    <keyword>object-oriented</keyword>
    <progmgr>Sol J. Greenspan</progmgr>
    <keyword>formal methods</keyword>
    <pi>Vitek, Jan</pi>
    <programreferencecode>9217</programreferencecode>
    <program>PROGRAMMING LANGUAGES</program>
    <programelementcode>7943</programelementcode>
  </document>
  <document>
    <docID>0916309</docID>
    <docDate>September 1, 2009</docDate>
    <docSource></docSource>
    <docText>NetSE: Small: Multi-Resolution Analysis of Network Matrices

   This award is funded under the American Recovery and Reinvestment Act of 2009 (Public Law 111-5).      Network matrices, such as traffic matrices, delay matrices, adjacency matrices, and social proximity matrices, are essential inputs to a wide range of network applications.  Network matrices and the underlying network often exhibit a multi-faceted scaling behavior.  To capture such multi-scale behavior, a particularly promising approach is Multi-Resolution Analysis (MRA), which creates multiple approximate representations of network matrix at different resolutions.  This project will (i) develop a novel framework to enable network-centric MRA of network matrices, and (ii) use the framework to develop novel solutions to several network management tasks: missing value inference, design of experiments, traffic synthesis, and anomaly detection.    Intellectual Merit: The project is multi-disciplinary by nature and will foster effective synergy between networking, statistics, data mining, and scientific computing.  The MRA framework and its applications will deepen the understanding of the spatial and temporal characteristics of network matrices at different scales, and advance the state of art in several significant network management tasks.    Broader Impact: The MRA framework is valuable to multiple scientific fields.  The project is expected to produce publications in leading conferences and journals, and software that will be publicly available online.  Through technology transfer, the network management solutions can potentially improve the operations of real ISP networks. The project will provide several graduate students' thesis research and honors undergraduate research projects. The research results will also be integrated into undergraduate and graduate curricula as well as outreach activities.</docText>
    <division>CCF</division>
    <directorate>CSE</directorate>
    <state>TX</state>
    <award-instr>Standard Grant</award-instr>
    <programreferencecode>HPCC</programreferencecode>
    <keyword>network</keyword>
    <programreferencecode>9218</programreferencecode>
    <fieldofapplication>0000912 Computer Science</fieldofapplication>
    <keyword>networking</keyword>
    <keyword>scientific computing</keyword>
    <organization>University of Texas at Austin</organization>
    <progmgr>Eun K. Park</progmgr>
    <keyword>data mining</keyword>
    <programreferencecode>6890</programreferencecode>
    <program>NETWORK SCIENCE &amp; ENGINEERING</program>
    <programelementcode>7794</programelementcode>
    <programreferencecode>7794</programreferencecode>
    <programreferencecode>7923</programreferencecode>
    <amount>499996</amount>
    <pi>Zhang, Yin</pi>
    <copi>Inderjit Dhillon</copi>
    <copi>Lili Qiu</copi>
  </document>
  <document>
    <docID>0916303</docID>
    <docDate>June 1, 2009</docDate>
    <docSource></docSource>
    <docText>SHF: Small: Global Manipulation in Solid-State Quantum Information Processing - Protocols and Implementation

   Quantum physics has been applied to study problems in computing complexity in recent years, which has become a new frontier in computer science. Computer hardware that is operated according to the laws of quantum mechanics can realize novel quantum protocols and bring enormous speed-up for certain computationally hard problems.  The key issue in implementing such hardware is in achieving highly accurate and fast control on the quantum logic elements so that they can beat the hazardous effects from the environmental noise.  For solid-state quantum processors, including superconducting systems and semiconductor systems, such control is usually achieved via adjustable local parameters, where careful designing of the circuit and the connections to external sources are required.  In this project, a quantum global mode will be exploited to achieve efficient implementation of the quantum protocols.  Here, the quantum global mode is the microwave photon mode in a nanoscale quantum resonator that has millimeter wavelength, can couple with multiple quantum logic elements simultaneously, and has demonstrated microsecond quantum coherence times.  Meanwhile, the global mode will also be considered as a probe to measure quantum entanglement and quantum coherence effects in the solid-state quantum processors.  Two questions will be studied in this project. First,  solid-state quantum simulators that can emulate quantum many-body systems involving arrays of solid-state elements will be studied, where the global quantum mode will act as a control as well as a detector of the quantum phase transitions in the simulators.  Second, a universal quantum computer of  spurious two-level fluctuators in the superconducting system will be studied where the global mode can provide individual control, effective coupling, and readout of the fluctuator states.  Both the hardware aspect and the software aspect will be investigated.</docText>
    <division>CCF</division>
    <directorate>CSE</directorate>
    <award-instr>Standard Grant</award-instr>
    <programreferencecode>HPCC</programreferencecode>
    <programreferencecode>9218</programreferencecode>
    <state>CA</state>
    <fieldofapplication>0000912 Computer Science</fieldofapplication>
    <progmgr>Dmitry Maslov</progmgr>
    <program>QUANTUM COMPUTING</program>
    <programelementcode>7928</programelementcode>
    <program>QUANTUM COMMUNICATION</program>
    <programelementcode>7948</programelementcode>
    <organization>University of California - Merced</organization>
    <pi>Tian, Lin</pi>
    <amount>300967</amount>
  </document>
  <document>
    <docID>0916302</docID>
    <docDate>September 1, 2009</docDate>
    <docSource></docSource>
    <docText>SHF: Small: Designing QoS-Aware MPI and File Systems Protocols for Emerging InfiniBand Clusters

   The emergence of affordable, high performance networking technology like InfiniBand is fueling the growth of high-end computing (HEC) systems. However, there are no schemes in these systems to provide a minimal Quality of Service (QoS) for the execution of parallel jobs by taking network-level contention into account. InfiniBand provides feature-rich QoS mechanisms. The research focuses on the following novel research directions: 1) How to take advantage of InfiniBand QoS mechanisms to design a QoS-aware MPI library? 2) How to take advantage of these mechanisms to design a QoS-aware parallel file system? 3) How to dynamically provide QoS by monitoring network traffic and making adjustments to virtual lane arbitration at InfiniBand's switch and adapter hardware? 4) How to design and establish job priority guidelines with the proposed QoS framework? and 5) What kind of performance, scalability, efficiency and productivity benefits can be achieved by this proposed QoS framework with petascale applications? The transformative impact of the research enables next generation InfiniBand clusters and applications to be QoS-aware and highly efficient in addition to delivering performance and scalability. The research has significant impact on the design, deployment, and utilization of next generation ultra-scale systems with QoS support.</docText>
    <division>CCF</division>
    <directorate>CSE</directorate>
    <award-instr>Standard Grant</award-instr>
    <programreferencecode>HPCC</programreferencecode>
    <programreferencecode>9216</programreferencecode>
    <state>OH</state>
    <keyword>network</keyword>
    <programreferencecode>9218</programreferencecode>
    <progmgr>Almadena Y. Chtchelkanova</progmgr>
    <fieldofapplication>0000912 Computer Science</fieldofapplication>
    <keyword>networking</keyword>
    <organization>Ohio State University Research Foundation</organization>
    <programreferencecode>9217</programreferencecode>
    <pi>Panda, Dhabaleswar</pi>
    <program>HIGH-PERFORMANCE COMPUTING</program>
    <programelementcode>7942</programelementcode>
    <amount>491570</amount>
  </document>
  <document>
    <docID>0916284</docID>
    <docDate>September 1, 2009</docDate>
    <docSource></docSource>
    <docText>SHF: Small: Collaborative Research: Evidence-based Reliability Assessment of Software Product Lines

   This proposal will be awarded using funds made available by the American Recovery and Reinvestment Act of 2009 (Public Law 111-5), and meets the requirements established in Section 2 of the White House Memorandum entitled, Ensuring Responsible Spending of Recovery Act Funds, dated March 20, 2009. I also affirm, as the cognizant Program Officer, that the proposal does not support projects described in Section 1604 of Division A of the Recovery Act.    This collaborative research will create techniques that improve the reliability of software product lines. A software product line is a family of software systems that share certain common features and differ according to a set of specified variations. Use of software product lines has grown rapidly in industry because such reuse reduces the cost of building new systems.   Reliability is important to product-line developers since many product lines, such as mobile phones, industrial robots, and surgical imaging systems, require reliable operation. This project focuses on development of a rigorous framework for incremental assessment and prediction of software product line reliability (SPL-iRAP). The research has three major thrusts: (1) developing reliability modeling techniques for software product lines to handle the effects of variations and ongoing changes, (2) investigating the use of reliability models for prediction across the product line based on empirical data, and (3) quantifying the benefit of the reuse on software quality. The researchers will train students, particularly women and underrepresented groups, in software reliability techniques, create new curriculum units for teaching, and partner with industrial developers of product lines to demonstrate the new techniques.</docText>
    <division>CCF</division>
    <directorate>CSE</directorate>
    <award-instr>Standard Grant</award-instr>
    <programreferencecode>HPCC</programreferencecode>
    <programreferencecode>9216</programreferencecode>
    <programreferencecode>9218</programreferencecode>
    <fieldofapplication>0000912 Computer Science</fieldofapplication>
    <progmgr>Sol J. Greenspan</progmgr>
    <programreferencecode>9150</programreferencecode>
    <organization>West Virginia University Research Corporation</organization>
    <state>WV</state>
    <programreferencecode>9217</programreferencecode>
    <program>SOFTWARE ENG &amp; FORMAL METHODS</program>
    <programelementcode>7944</programelementcode>
    <programreferencecode>6890</programreferencecode>
    <pi>Goseva-Popstojanova, Katerina</pi>
    <amount>245837</amount>
  </document>
  <document>
    <docID>0916275</docID>
    <docDate>September 1, 2009</docDate>
    <docSource></docSource>
    <docText>SHF: Small: Collaborative Research: Evidence-based Reliability Assessment of Software Product Lines

   This proposal will be awarded using funds made available by the American Recovery and Reinvestment Act of 2009 (Public Law 111-5), and meets the requirements established in Section 2 of the White House Memorandum entitled, Ensuring Responsible Spending of Recovery Act Funds, dated March 20, 2009. I also affirm, as the cognizant Program Officer, that the proposal does not support projects described in Section 1604 of Division A of the Recovery Act.    This collaborative research will create techniques that improve the reliability of software product lines. A software product line is a family of software systems that share certain common features and differ according to a set of specified variations. Use of software product lines has grown rapidly in industry because such reuse reduces the cost of building new systems.   Reliability is important to product-line developers since many product lines, such as mobile phones, industrial robots, and surgical imaging systems, require reliable operation. This project focuses on development of a rigorous framework for incremental assessment and prediction of software product line reliability (SPL-iRAP). The research has three major thrusts: (1) developing reliability modeling techniques for software product lines to handle the effects of variations and ongoing changes, (2) investigating the use of reliability models for prediction across the product line based on empirical data, and (3) quantifying the benefit of the reuse on software quality. The researchers will train students, particularly women and underrepresented groups, in software reliability techniques, create new curriculum units for teaching, and partner with industrial developers of product lines to demonstrate the new techniques.</docText>
    <division>CCF</division>
    <directorate>CSE</directorate>
    <award-instr>Standard Grant</award-instr>
    <programreferencecode>HPCC</programreferencecode>
    <programreferencecode>9216</programreferencecode>
    <programreferencecode>9218</programreferencecode>
    <fieldofapplication>0000912 Computer Science</fieldofapplication>
    <organization>Iowa State University</organization>
    <state>IA</state>
    <progmgr>Sol J. Greenspan</progmgr>
    <programreferencecode>9217</programreferencecode>
    <pi>Lutz, Robyn</pi>
    <program>SOFTWARE ENG &amp; FORMAL METHODS</program>
    <programelementcode>7944</programelementcode>
    <programreferencecode>6890</programreferencecode>
    <amount>248901</amount>
  </document>
  <document>
    <docID>0916270</docID>
    <docDate>July 15, 2009</docDate>
    <docSource></docSource>
    <docText>CIF: Imperfection-Resilient Scalable Digital Signal Processing Algorithms and Architectures Using Significance Driven Computation

   Present-day integrated circuits are expected to deliver high-quality/high-performance levels under ever-diminishing power budgets. Due to quadratic dependence of power on voltage, supply voltage scaling has been investigated as an effective method to reduce power. However, supply scaling increases the delays in all computation paths and can result in incorrect or incomplete computation of certain paths. Besides power dissipation, process variations also pose a major design concern with technology scaling. Supply voltage can be scaled-up or logic gates can be up-sized to prevent delay failures and to achieve higher parametric yield. However, such techniques come at the cost of increased power and/or die area. Meeting the contradictory requirements of high yield, low power and high quality are becoming exceedingly challenging in nanometer designs. Hence, there is a need for a scalable design methodology in which minimal output quality degradation is achieved under changing power constraints and process conditions. In addition, for a prescribed power consumption level and process, design methodology must take into account the effects of input signal noise and distortion on the fidelity of the Digital Signal Processing (DSP) computation and ensure that graceful output quality degradation is achieved under varying degrees of noise and distortion through proper algorithm and hardware design.                  The research involves development of a systematic methodology for reorganizing (transforming) algorithmic level computations, data and underlying hardware in such a way that minimum performance degradation in DSP systems is achieved under reduced power supply, increased process variations and reduced input signal quality. It has been observed that for DSP applications/systems, all computations are not equally important in shaping the output response. This information is exploited by the investigators to develop suitable algorithms/architectures that provide the ?right? trade-offs between output quality vs. energy consumption (supply scaling) vs. parametric yield due to process variations vs. input signal noise. To address resilience to process variations, the investigators identify the significant/not-so-significant components of such systems based on output sensitivities. Under such a scenario, with scaled supply voltage and/or parameter variations, if there are potential delay failures in some paths, only the less-significant computations are affected. In other words, using carefully designed algorithms and architectures, the investigators provide unequal error protection (under voltage over-scaling) to significant/not-so-significant computation elements, thereby achieving large improvements in power dissipation with graceful degradation in output signal quality.</docText>
    <keyword>algorithms</keyword>
    <division>CCF</division>
    <directorate>CSE</directorate>
    <award-instr>Standard Grant</award-instr>
    <programreferencecode>HPCC</programreferencecode>
    <amount>250000</amount>
    <organization>GA Tech Research Corporation - GA Institute of Technology</organization>
    <state>GA</state>
    <programreferencecode>9218</programreferencecode>
    <progmgr>John Cozzens</progmgr>
    <fieldofapplication>0000912 Computer Science</fieldofapplication>
    <pi>Chatterjee, Abhijit</pi>
    <program>SIGNAL PROCESSING</program>
    <programelementcode>7936</programelementcode>
  </document>
  <document>
    <docID>0916260</docID>
    <docDate>September 1, 2009</docDate>
    <docSource></docSource>
    <docText>III: Small: Collaborative Research: Creating and Evolving Software via Searching, Selecting and Synthesizing Relevant Source Code

   Software developers rely on reusing source code snippets from existing libraries or applications to develop software features on time and within budget. The reality is such that most previously implemented features are embedded in billions of lines of scattered source code. State-of-the-art code search engines provide no guarantee that retrieved code snippets implement these features. Even if relevant code fragments are located, developers face rather complex task of selecting and moving these fragments into their applications. Finally, synthesizing new functionality by composing selected code fragments requires sophisticated reasoning about the behavior of these fragments and the consequent code. The result of this process is an overwhelming complexity, a steep learning curve, and a significant cost of building customized software.    This research program proposes an integrated model for addressing fundamental problems of searching, selecting, and synthesizing (S3) source code. The S3 model relies on integrating program analysis and information retrieval to produce transformative models to automatically search, select, and synthesize relevant source code fragments. The S3 model will directly support new methodologies for software change and automated tools that assist programmers with various development, reuse and maintenance activities. Among the broader impacts the project includes collaboration with industry to transfer technology.</docText>
    <division>CCF</division>
    <directorate>CSE</directorate>
    <award-instr>Standard Grant</award-instr>
    <programreferencecode>HPCC</programreferencecode>
    <programreferencecode>9218</programreferencecode>
    <fieldofapplication>0000912 Computer Science</fieldofapplication>
    <state>VA</state>
    <organization>College of William and Mary</organization>
    <progmgr>Sol J. Greenspan</progmgr>
    <keyword>information retrieval</keyword>
    <program>SOFTWARE ENG &amp; FORMAL METHODS</program>
    <programelementcode>7944</programelementcode>
    <programreferencecode>7364</programreferencecode>
    <programreferencecode>7923</programreferencecode>
    <pi>Poshyvanyk, Denys</pi>
    <amount>203641</amount>
  </document>
  <document>
    <docID>0916218</docID>
    <docDate>August 15, 2009</docDate>
    <docSource></docSource>
    <docText>AF:  Small:  Mathematical Programming Methods in Approximation

   Mathematical programming techniques like linear programming and semide&amp;#64257;nite programming have &amp;#64257;rmly established themselves as valuable tools in the approximation algorithm design toolkit. They are often used as tractable relaxations to hard combinatorial optimization problems and as design guides to obtain approximation algorithms. This project attempts to enhance our understanding of the strengths and weaknesses of mathematical programming techniques for several fundamental optimization problems and proposes to investigate general methods to strengthen our currently known mathematical programming techniques.    The broad goals of this project are the following: (a) Attempt to devise better algorithms for unique games ? a constraint satisfaction problem that is known to capture the limitations of current semide&amp;#64257;nite programming methods used in approximation algorithms. Beating the current best algorithms will necessarily involve developing new techniques that overcome the limitations of current SDP approaches.  (b) Understand the structure of strengthened relaxations obtained by lift-and-project procedures and develop techniques to exploit the additional information provided by these stronger relaxations to obtain better approximation algorithms.  (c) Work towards closing large gaps in our understanding of the approximability of fundamental optimization problems.    Successfully achieving the project goals will entail signi&amp;#64257;cant advances in the state of the art for approximation algorithms. The research could potentially develop tools and techniques with broad applicability to several optimization problems. Course materials for graduate and undergraduate courses will be developed distilling research results of this project, as well as new developments in the &amp;#64257;eld.</docText>
    <keyword>algorithms</keyword>
    <division>CCF</division>
    <directorate>CSE</directorate>
    <award-instr>Standard Grant</award-instr>
    <programreferencecode>HPCC</programreferencecode>
    <state>NJ</state>
    <programreferencecode>9218</programreferencecode>
    <fieldofapplication>0000912 Computer Science</fieldofapplication>
    <progmgr>Richard Beigel</progmgr>
    <organization>Princeton University</organization>
    <pi>Charikar, Moses</pi>
    <program>ALGORITHMS</program>
    <programelementcode>7926</programelementcode>
    <amount>499996</amount>
  </document>
  <document>
    <docID>0916209</docID>
    <docDate>September 1, 2009</docDate>
    <docSource></docSource>
    <docText>NetSE: Small: Game Theoretic  Coverage and Connectivity Services

   This award is funded under the American Recovery and Reinvestment Act of 2009 (Public Law 111-5).    Robotic Sensor Networks (RSNs) are finding increasing use in critical  applications such as surveillance, environmental monitoring, emergency  response and search-and-rescue. With recent advances in embedded  technologies, devices that can be used as RSN units are becoming available  for everyday use.     Intellectual Merit:  This project focuses on pursuit-evasion games where one or more  pursuers tries to "capture" an evader who, in turn, tries to avoid  capture. Robust, provably correct solutions to many RSN   tasks (such as coverage and connectivity) can be obtained by modeling them as pursuit-evasion games.    Existing solutions to pursuit-evasion games usually assume that  (i) all players can observe each other at all times and (ii) there is  a centralized authority that coordinates all pursuers. Hence, such  solutions are not applicable for modeling RSN applications where the  network faces severe sensing and communication limitations. The  primary goals of the proposed work are to understand the effect of these  limitations on the outcome of the game, and to design strategies to  overcome them.     Broader Impacts:  Sensing and actuation are expected to play significant roles in the  evolution of information technology and the Internet. This  research will contribute to this evolution in two major ways. First,  it will deliver algorithms, tools and techniques to address  communication, sensing and actuation issues simultaneously. Second,  it will help scientists and engineers participating in this development acquire a broad  range of skills in areas such as algorithms, perception, robotics and communications. This  will be achieved through outreach programs and by incorporating this research in PI's courses.</docText>
    <keyword>algorithms</keyword>
    <division>CCF</division>
    <directorate>CSE</directorate>
    <award-instr>Standard Grant</award-instr>
    <programreferencecode>HPCC</programreferencecode>
    <organization>University of Minnesota-Twin Cities</organization>
    <state>MN</state>
    <keyword>network</keyword>
    <programreferencecode>9218</programreferencecode>
    <fieldofapplication>0000912 Computer Science</fieldofapplication>
    <progmgr>Eun K. Park</progmgr>
    <keyword>robotics</keyword>
    <pi>Isler, Ibrahim</pi>
    <programreferencecode>6890</programreferencecode>
    <program>NETWORK SCIENCE &amp; ENGINEERING</program>
    <programelementcode>7794</programelementcode>
    <programreferencecode>7794</programreferencecode>
    <programreferencecode>7923</programreferencecode>
    <amount>382000</amount>
  </document>
  <document>
    <docID>0916181</docID>
    <docDate>July 1, 2009</docDate>
    <docSource></docSource>
    <docText>AF: Small: Ground State Complexity in Quantum Many-Body Systems

   One of the central goals of quantum information theory is to understand quantum systems from the standpoint of computational complexity. Physicists have been using computers for decades to understand various aspects of quantum systems, but these methods are typically heuristic and achieve success on only limited classes of systems. Understanding quantum systems through the lens of computational and information-theoretic complexity has already lead to new powerful computational methods in physics and deeper insight into what causes these methods to fail once we step outside specific classes. Meanwhile hardness results often have important implications for quantum computation. If computing a property of a system is shown to be as difficult as computing the output of an arbitrary quantum circuit, that system becomes a candidate for a quantum computer.    This proposal focuses specifically on the complexity of ground states, the lowest energy state of a system. How hard is it to compute the ground energy of a quantum system? What are the properties of a system that give rise to provably efficient algorithms to compute the ground state? What is the structure of the ground state? Under what circumstances does the ground state have a succinct representation? The PI will pursue these questions in the context of one-dimensional systems and will begin work on two-dimensional systems about which much less is known.</docText>
    <keyword>algorithms</keyword>
    <division>CCF</division>
    <directorate>CSE</directorate>
    <award-instr>Standard Grant</award-instr>
    <programreferencecode>HPCC</programreferencecode>
    <programreferencecode>9218</programreferencecode>
    <state>CA</state>
    <fieldofapplication>0000912 Computer Science</fieldofapplication>
    <organization>University of California-Irvine</organization>
    <progmgr>Dmitry Maslov</progmgr>
    <pi>Irani, Sandra</pi>
    <program>QUANTUM COMPUTING</program>
    <programelementcode>7928</programelementcode>
    <amount>498878</amount>
  </document>
  <document>
    <docID>0916180</docID>
    <docDate>September 1, 2009</docDate>
    <docSource></docSource>
    <docText>NetSE:Small: Human Behavior Inspired Cognitive Radio Network Design

   Cognitive radios enabling dynamic spectrum access are envisioned to sense the environment and self-learn to maximize an individual or group utility function. This results in cheating, irrational behavior, inequality aversion, altruism, learning from past memory, etc. These traits are strikingly similar to human behavior and social interactions. Therefore, this project explores this parallelism going beyond traditional game theoretic analysis.     What are the implications if communication protocols in a cognitive radio network resemble human behavioral and psychological interactions? Will the network develop its own psychology with random perturbations, similar to human evolution?  These are the fundamental questions addressed in this project using tools from social science and behavioral games.  Some of the main theoretical ideas will be implemented in SpiderRadio, a cognitive radio network prototype developed in the PIs? laboratory at Stevens.     Intellectual Merit: The intellectual merit of this project is an inter-disciplinary effort that  overlaps human behavioral models, cognitive psychology, economic models, decision theory and dynamic spectrum access. Emerging social science concepts such as evolutionary and cognitive psychology, behavioral economics, drama theory, personal and social dilemmas are used to model various types of interactions among cognitive radio nodes in a network.     Broader Impact: The outcomes of this project will have a broader impact on wireless networking research and spectrum policy making communities. This project also gives a unique opportunity for students in engineering and psychology to collaborate. Finally, some of the ideas presented here will impact the next generation standards in cognitive radio networking.</docText>
    <division>CCF</division>
    <directorate>CSE</directorate>
    <programreferencecode>HPCC</programreferencecode>
    <award-instr>Continuing grant</award-instr>
    <keyword>network</keyword>
    <keyword>wireless</keyword>
    <state>NJ</state>
    <programreferencecode>9218</programreferencecode>
    <fieldofapplication>0000912 Computer Science</fieldofapplication>
    <keyword>networking</keyword>
    <organization>Stevens Institute of Technology</organization>
    <progmgr>Eun K. Park</progmgr>
    <program>NETWORK SCIENCE &amp; ENGINEERING</program>
    <programelementcode>7794</programelementcode>
    <programreferencecode>7794</programreferencecode>
    <programreferencecode>7923</programreferencecode>
    <pi>Chandramouli, Rajarathnam</pi>
    <copi>Koduvayur Subbalakshmi</copi>
    <amount>154018</amount>
  </document>
  <document>
    <docID>0916160</docID>
    <docDate>August 1, 2009</docDate>
    <docSource></docSource>
    <docText>AF:Small:Pseudorandomness, Codes, and Distributed Computing

   Randomness is useful in many areas of computer science, including algorithms, Monte Carlo simulations, cryptography, and distributed computing.  In practice, however, it is expensive or impossible to get truly random numbers.  Therefore, computers rely on pseudorandom generators.  However, scientists have reported problems with practical pseudorandom generators.  Can we construct pseudorandom generators that are provably good?  The PI proposes to address this question and the related question of how to extract high-quality randomness from low-quality random sources.    These questions have unexpected connections to error-correcting codes and distributed computing, which the PI proposes to explore further.  He also proposes to attack fundamental questions in these areas.  In coding theory, these questions relate to his recent results on decoding the important Reed-Muller codes.  In distributed computing, he proposes to advance his work on network extractor protocols.  These are protocols to extract high-quality randomness from low-quality random sources in a distributed setting.  Such protocols could be very useful in cryptography.</docText>
    <keyword>algorithms</keyword>
    <division>CCF</division>
    <directorate>CSE</directorate>
    <state>TX</state>
    <award-instr>Standard Grant</award-instr>
    <programreferencecode>HPCC</programreferencecode>
    <keyword>network</keyword>
    <programreferencecode>9218</programreferencecode>
    <fieldofapplication>0000912 Computer Science</fieldofapplication>
    <progmgr>Richard Beigel</progmgr>
    <keyword>distributed computing</keyword>
    <organization>University of Texas at Austin</organization>
    <keyword>cryptography</keyword>
    <pi>Zuckerman, David</pi>
    <program>COMPLEXITY &amp; CRYPTOGRAPHY</program>
    <programelementcode>7927</programelementcode>
    <amount>499637</amount>
  </document>
  <document>
    <docID>0916156</docID>
    <docDate>September 1, 2009</docDate>
    <docSource></docSource>
    <docText>SHF: Small: Nanocomputing Processes and Artifacts: Fundamental Description and Physical-Information-Theoretic Assessment

   As silicon integrated circuit technology approaches its ultimate scaling and performance limits, we can expect a rapid proliferation of innovative proposals for fundamentally new information processing technologies. The quest for the first post-CMOS general purpose computing machines will likely emphasize digital computation in systems constructed from nanoscale building blocks. Proposals for new nanocomputing technologies will, however, be dificult to evaluate, both because nanocircuits are dificult to build and test experimentally and because phenomena that compromise the reliable physical representation and manipulation of information in nanoscale systems will pose new and unfamiliar challenges. These considerations motivate the development of new theoretical tools for assessing the fundamental physical limits to reliable processing of classical information in nanoscale systems, limits that follow from generic space, time and power constraints imposed by the technological objective of superseding silicon technology at the end of scaling.    This project aims to advance the fundamental physical description of digital information processing in (generally noisy and faulty) nanosystems and to develop approaches, built from such a description, that can be used to evaluate the ultimate information processing capabilities of proposed nanocomputing technologies. The first prototype assessment studies will emphasize two existing proposals---quantum-dot cellular automata and nanowire-based NASIC fabric implementations---and will integrate results from physical information theoretic analyses and physical circuit models. Other explorations will aim to provide technology-independent insights into issues of generic importance for nanocomputation, such as the physical costs of error correction. These investigations, taken together, will help to clarify the nature of fundamental physical limits in information processing and their practical consequences, which will become increasingly important as the quest  for new nanocomputing technologies intensifies.</docText>
    <division>CCF</division>
    <directorate>CSE</directorate>
    <award-instr>Standard Grant</award-instr>
    <programreferencecode>HPCC</programreferencecode>
    <programreferencecode>9216</programreferencecode>
    <state>MA</state>
    <programreferencecode>9218</programreferencecode>
    <fieldofapplication>0000912 Computer Science</fieldofapplication>
    <organization>University of Massachusetts Amherst</organization>
    <progmgr>Dmitry Maslov</progmgr>
    <programreferencecode>9217</programreferencecode>
    <pi>Anderson, Neal</pi>
    <program>NANOCOMPUTING</program>
    <programelementcode>7947</programelementcode>
    <amount>348945</amount>
  </document>
  <document>
    <docID>0916139</docID>
    <docDate>September 1, 2009</docDate>
    <docSource></docSource>
    <docText>III: Small: Collaborative Research: Creating and Evolving Software via Searching, Selecting and Synthesizing Relevant Source Code

   Software developers rely on reusing source code snippets from existing libraries or applications to develop software features on time and within budget. The reality is such that most previously implemented features are embedded in billions of lines of scattered source code. State-of-the-art code search engines provide no guarantee that retrieved code snippets implement these features. Even if relevant code fragments are located, developers face rather complex task of selecting and moving these fragments into their applications. Finally, synthesizing new functionality by composing selected code fragments requires sophisticated reasoning about the behavior of these fragments and the consequent code. The result of this process is an overwhelming complexity, a steep learning curve, and a significant cost of building customized software.    This research program proposes an integrated model for addressing fundamental problems of searching, selecting, and synthesizing (S3) source code. The S3 model relies on integrating program analysis and information retrieval to produce transformative models to automatically search, select, and synthesize relevant source code fragments. The S3 model will directly support new methodologies for software change and automated tools that assist programmers with various development, reuse and maintenance activities. Among the broader impacts the project includes collaboration with industry to transfer technology.</docText>
    <division>CCF</division>
    <directorate>CSE</directorate>
    <award-instr>Standard Grant</award-instr>
    <programreferencecode>HPCC</programreferencecode>
    <programreferencecode>9218</programreferencecode>
    <fieldofapplication>0000912 Computer Science</fieldofapplication>
    <state>IL</state>
    <progmgr>Sol J. Greenspan</progmgr>
    <keyword>information retrieval</keyword>
    <organization>University of Illinois at Chicago</organization>
    <amount>150000</amount>
    <program>SOFTWARE ENG &amp; FORMAL METHODS</program>
    <programelementcode>7944</programelementcode>
    <programreferencecode>7364</programreferencecode>
    <programreferencecode>7923</programreferencecode>
    <pi>Grechanik, Mark</pi>
  </document>
  <document>
    <docID>0916133</docID>
    <docDate>August 1, 2009</docDate>
    <docSource></docSource>
    <docText>AF:Small: Computation in Very Large Groups

   Mathematical group theory has wide applications to the sciences and to other branches of mathematics.  Some important examples of current interest are fast matrix multiplication, search in the presence of symmetry, and symmetries to be found in physics and chemistry.  Current algorithms do not always scale or are not always practical in implementation.  Some levels beyond which current algorithms tend to become impractical are permutations of a million points, matrix group dimensions beyond a few tens, and coset methods (defining equations on groups) beyond 100 million cosets.  We call such groups "very large groups".    This project will develop a new class of algorithms for very large groups.  The new algorithms will take advantage of the experience of the P.I. and his lab in previous computations and algorithms using terabytes of parallel disk storage.  The feasibility of a many-disk approach had previously been shown in a popular demonstration concerning Rubik's cube: Rubik's cube can be solved in 26 moves or less.  Both that and more traditional problems will be used to further develop the disk-based language, Roomy.    Emphasis will be given to well-known problems not known to be in polynomial time (centralizer, group intersection, normalizer, etc.).  These problems have seen little progress during the last decade.  They are considered hard in part due to their close connection with the conjugate group action of a group on itself.  In this conjugate action view, a group is seen as a permutation group acting on almost as many points as there are elements in the group itself.  In this view, even moderate size groups quickly turn into very large groups under the conjugate action.  Novel methods such as the biased tadpole, coupled with the power of the Roomy language, will enable a resumption of progress in this area.    The broader impact lies in the ability to harness these new algorithms and implementations in pursuit of applications outside of group theory such as those mentioned earlier.  Researchers outside of group theory have long had the potential to generate groups beyond the capabilities of standard software, such as the free and open source GAP package.  Extending the capabilities of GAP and other familiar tools will enable new discoveries.  The further development of the Roomy platform is also an important byproduct, whose value will extend far beyond its group theory origins.</docText>
    <keyword>algorithms</keyword>
    <division>CCF</division>
    <directorate>CSE</directorate>
    <award-instr>Standard Grant</award-instr>
    <programreferencecode>HPCC</programreferencecode>
    <state>MA</state>
    <programreferencecode>9218</programreferencecode>
    <fieldofapplication>0000912 Computer Science</fieldofapplication>
    <progmgr>Richard Beigel</progmgr>
    <organization>Northeastern University</organization>
    <pi>Cooperman, Gene</pi>
    <program>ALGORITHMS</program>
    <programelementcode>7926</programelementcode>
    <amount>392882</amount>
  </document>
  <document>
    <docID>0916127</docID>
    <docDate>August 1, 2009</docDate>
    <docSource></docSource>
    <docText>SHF: Small: Reducing the Cost of Computation in CMPs

   "This award is funded under the American Recovery and Reinvestment Act of 2009 (Public Law 111-5)."     Computer processor industry has moved fully into the multi-core era to enable continual scaling of performance, but at the cost of increased energy consumption and increased cooling costs due to higher temperatures and thermal gradients.  This proposal describes three major research thrusts that address these costs in multiple ways: (1) New modeling and simulation tools:  We will integrate performance, power, temperature, reliability and cooling estimation, so that the designers will be able to analyze the impact of design choices and runtime decisions over significant time spans. (2) Runtime thread scheduling policies:  We will identify and demonstrate power and thermal scheduling mechanisms that maintain performance, reduce the total energy consumption, and eliminate or reduce hot spots, but also maximize processor lifetime. The policies will use the data from thermal sensors and performance counters to proactively drive the management decisions. (3) New cooling strategies:  Our goal is to create thermal management and cooling control algorithms that work in tandem to reduce the overall energy consumption.    The proposed research forms the basis for discovery and learning in the areas of multi core processors, and, more generally, system design and management.  Graduate and undergraduate students will be involved in various parts of the proposed research and help in connecting this work with other NSF sponsored projects. The results of research, tools and coursework materials developed will be freely and easily distributed to engineering community at large.</docText>
    <keyword>algorithms</keyword>
    <division>CCF</division>
    <directorate>CSE</directorate>
    <award-instr>Standard Grant</award-instr>
    <programreferencecode>HPCC</programreferencecode>
    <programreferencecode>9216</programreferencecode>
    <programreferencecode>9218</programreferencecode>
    <state>CA</state>
    <fieldofapplication>0000912 Computer Science</fieldofapplication>
    <keyword>simulation</keyword>
    <progmgr>Sankar Basu</progmgr>
    <organization>University of California-San Diego</organization>
    <programreferencecode>9217</programreferencecode>
    <program>DES AUTO FOR MICRO &amp; NANO SYST</program>
    <programelementcode>7945</programelementcode>
    <programreferencecode>6890</programreferencecode>
    <pi>Rosing, Tajana</pi>
    <amount>476155</amount>
  </document>
  <document>
    <docID>0916112</docID>
    <docDate>September 1, 2009</docDate>
    <docSource></docSource>
    <docText>TC: Small:Automata Based String Analysis for Detecting Vulnerabilities in Web Applications

   Web applications contain numerous vulnerabilities that can be exploited  by attackers to gain unauthorized access to confidential information and  to manipulate sensitive data. Many of these vulnerabilities are due to  inadequate manipulation of string variables. String analysis, a technique  that captures the string values that a certain variable might hold at a  particular program point, can be used to identify such flaws.  In this  project, novel and precise string analysis techniques will be developed  using an automata-based approach that represents possible values of a  string variable at a program point as an automaton.  Techniques that  support path-sensitivity and that enable precise analysis of loops using  automata-based widening operations will be developed. Basic string analysis  techniques will be extended to a composite analysis where relationships among  string variables and other types of variables can be automatically discovered  and analyzed.  The precision of string analysis plays a central role for  obtaining good results with static vulnerability detection tools. The  precise string analysis techniques developed in this project will enable  analysis of programs that cannot be analyzed with existing techniques. The  results of these improved string analysis techniques will lead to novel  software security solutions and detection of novel types of vulnerabilities.</docText>
    <division>CCF</division>
    <directorate>CSE</directorate>
    <award-instr>Standard Grant</award-instr>
    <programreferencecode>HPCC</programreferencecode>
    <keyword>security</keyword>
    <programreferencecode>9218</programreferencecode>
    <state>CA</state>
    <fieldofapplication>0000912 Computer Science</fieldofapplication>
    <organization>University of California-Santa Barbara</organization>
    <amount>349999</amount>
    <pi>Bultan, Tevfik</pi>
    <program>TRUSTWORTHY COMPUTING</program>
    <progmgr>Lenore D. Zuck</progmgr>
    <programelementcode>7795</programelementcode>
    <programreferencecode>7923</programreferencecode>
    <copi>Christopher Kruegel</copi>
  </document>
  <document>
    <docID>0916105</docID>
    <docDate>July 15, 2009</docDate>
    <docSource></docSource>
    <docText>CIF:SMALL:COLLABORATIVE: Soft-Logic Modeling and Design for Synthetic Biology

   This project is a multi-institutional collaboration in which we plan to investigate a new soft-logic approach for creating ?designer gene? circuits. Genetic circuits are crafted in the laboratory using genomic building blocks, and are used to control specific behaviors in engineered bacteria. A major research challenge for genetic circuits is that there is a high level of randomness in the cell?s internal environment. Belief networks provide a well-defined solution for handling the effects of randomness in genetic systems. We propose to study how belief networks can be applied to control and even exploit randomness to achieve new and useful genetic behaviors. Our research results will be used to improve a software application for genetic design called iBioSim.    There are many anticipated benefits for synthetic genetic circuits, including industrial, environmental, and medical applications. For example, bacteria can theoretically be engineered to clean oil spills, kill tumors, and deliver medicines, but only if we can precisely control when and how the bacteria perform their functions. Our investigation will illuminate the unique challenges involved in controlling highly random bacterial systems and will provide the community with rigorous theory and practicable techniques that resolve these challenges.</docText>
    <division>CCF</division>
    <directorate>CSE</directorate>
    <award-instr>Standard Grant</award-instr>
    <programreferencecode>HPCC</programreferencecode>
    <programreferencecode>9218</programreferencecode>
    <fieldofapplication>0000912 Computer Science</fieldofapplication>
    <progmgr>Mitra Basu</progmgr>
    <state>UT</state>
    <organization>Utah State University</organization>
    <program>COMPUTATIONAL BIOLOGY</program>
    <programelementcode>7931</programelementcode>
    <pi>Winstead, Chris</pi>
    <amount>188000</amount>
  </document>
  <document>
    <docID>0916083</docID>
    <docDate>September 1, 2009</docDate>
    <docSource></docSource>
    <docText>SHF: Small: A Generic Micro-Architecture for Accuracy-Aware Ultra Low Power Multimedia Processing

     Mobile devices supporting a wide variety of multimedia applications under a very stringent energy budget are a key driver of electronic systems in future. The objective of the proposed research is to explore a generic, programmable, reconfigurable, and energy-efficient architectural platform for future mobile devices for real-time multimedia processing. The aim is to exploit the inherent error tolerance in multimedia applications for run-time energy-accuracy trade-off. The proposed research will analyze the interaction of ultra-low-power computing and error characteristics of real-time multimedia processing. This research will pursue a circuit-architecture-algorithm co-design approach to model, analyze, and demonstrate a reconfigurable hardware platform for memories, datapath, and buses to exploit the error characteristics of real-time multimedia processing algorithms for ultra-low power.      This generic architecture for energy-efficient multimedia systems can lay the foundation of future mobile supercomputers performing wide array of applications with minimal energy. The PIs will disseminate the research results through project website, conference and journal publications. The existing interactions with leading microprocessor and mobile handset manufacturers will provide opportunities for technology transfer. The educational goal is to create next generation engineers who understand the effects of energy and accuracy on computations. The PIs will engage in recruiting students from underrepresented groups and mentor students under the Summer Undergraduate Research Experience for minorities (SURE) program at Georgia Tech.</docText>
    <keyword>algorithms</keyword>
    <division>CCF</division>
    <directorate>CSE</directorate>
    <award-instr>Standard Grant</award-instr>
    <programreferencecode>HPCC</programreferencecode>
    <programreferencecode>9216</programreferencecode>
    <organization>GA Tech Research Corporation - GA Institute of Technology</organization>
    <state>GA</state>
    <keyword>architecture</keyword>
    <programreferencecode>9218</programreferencecode>
    <keyword>multimedia</keyword>
    <progmgr>Chitaranjan Das</progmgr>
    <programreferencecode>9217</programreferencecode>
    <copi>Wayne Wolf</copi>
    <program>COMPUTER ARCHITECTURE</program>
    <programelementcode>7941</programelementcode>
    <pi>Mukhopadhyay, Saibal</pi>
    <amount>485638</amount>
  </document>
  <document>
    <docID>0916081</docID>
    <docDate>September 1, 2009</docDate>
    <docSource></docSource>
    <docText>SHF: Small: RUI: Making Sense of Source Code: Improving Software through Information Retrieval

   The cost-effective construction of software is increasingly important to businesses and consumers. Given software's ever-increasing size and complexity, modern software construction employs significant tool support. Recent tools complement traditional static analysis tools by exploiting the natural language found within a program's text through the use of Information Retrieval (IR). Best known for its use by search engines on the Internet, IR encompasses a growing collection of techniques that apply to large repositories of natural language. New tools using IR have tackled problems previously requiring considerable human effort.  However, to reap the full benefit of IR techniques, the language across all software artifacts (e.g., requirement and design documents, test plans, as well as source code) must be normalized.  Normalization align the vocabulary found in source code with that of other software artifacts. In addition to improving existing tools, normalization will also encourage the development of new techniques and methodologies useful in future tools. Empirical study of successful tool improvements will aid technology transfer of the tools expected to improve programmer productivity.  Beyond its technical goals, this research promotes discovery in Loyola's undergraduate curriculum through the direct involvement of undergraduate students in scientific research and by integrating research results into classroom learning.</docText>
    <division>CCF</division>
    <directorate>CSE</directorate>
    <award-instr>Standard Grant</award-instr>
    <programreferencecode>HPCC</programreferencecode>
    <programreferencecode>9216</programreferencecode>
    <state>MD</state>
    <programreferencecode>9218</programreferencecode>
    <fieldofapplication>0000912 Computer Science</fieldofapplication>
    <progmgr>Sol J. Greenspan</progmgr>
    <keyword>information retrieval</keyword>
    <programreferencecode>9217</programreferencecode>
    <programreferencecode>9229</programreferencecode>
    <organization>Loyola College in Maryland</organization>
    <fieldofapplication>0116000 Human Subjects</fieldofapplication>
    <program>SOFTWARE ENG &amp; FORMAL METHODS</program>
    <programelementcode>7944</programelementcode>
    <pi>Lawrie, Dawn</pi>
    <copi>David Binkley</copi>
    <amount>309757</amount>
  </document>
  <document>
    <docID>0916073</docID>
    <docDate>July 1, 2009</docDate>
    <docSource></docSource>
    <docText>CIF:Small:Physical Layer Optimization for Cognitive Sensor Networks

   Physical Layer Optimization for Cognitive Sensor Networks    The cognitive radio concept has been a revolutionary development in wireless communications systems.  Cognitive, software-defined radios are able to adjust link and network resources in order to optimize communications performance. However, high rate, robust communications is often just one of many possible network objectives. For example, in sensing applications, the goal is to maximize coverage, detect important events with high probability, and track objects of interest with high accuracy.  These goals are often at odds with those for optimum communications; improved coverage requires more widely dispersed sensors, complicating network connectivity. High resolution sensing requires more bits of information, which in turn place a strain on network throughput. Power devoted to routing or packet forwarding reduces a sensors lifetime.  Clearly, a different paradigm is needed when sensing performance is the critical factor, or perhaps most interestingly, when both communications and sensing performance must be considered in tandem.  This research effort introduces Cognitive Sensing as a concept dual to that of cognitive communications, and investigates the competing objectives of sensing and communications networks.  A cognitive sensor would adaptively adjust its operating parameters in response to the environment it finds itself in so as to optimize sensing performance, or perhaps a dual performance metric that includes both sensing and communications functions. Parameters relevant to sensing performance could include sensor position, speed and heading, antenna beampattern and polarization, transmit waveform type and bandwidth, imaging camera zoom, orientation, resolution, pointing angle, etc. The question of how to allocate such sensor resources is central to this effort.</docText>
    <division>CCF</division>
    <directorate>CSE</directorate>
    <award-instr>Standard Grant</award-instr>
    <programreferencecode>HPCC</programreferencecode>
    <keyword>network</keyword>
    <keyword>wireless</keyword>
    <programreferencecode>9218</programreferencecode>
    <progmgr>John Cozzens</progmgr>
    <state>CA</state>
    <fieldofapplication>0000912 Computer Science</fieldofapplication>
    <pi>Swindlehurst, Arnold</pi>
    <organization>University of California-Irvine</organization>
    <program>SIGNAL PROCESSING</program>
    <programelementcode>7936</programelementcode>
    <amount>305948</amount>
  </document>
  <document>
    <docID>0916042</docID>
    <docDate>July 15, 2009</docDate>
    <docSource></docSource>
    <docText>CIF:SMALL:COLLABORATIVE: Soft-Logic Modeling and Design for Synthetic Biology

   This project is a multi-institutional collaboration in which we plan to investigate a new soft-logic approach for creating ?designer gene? circuits. Genetic circuits are crafted in the laboratory using genomic building blocks, and are used to control specific behaviors in engineered bacteria. A major research challenge for genetic circuits is that there is a high level of randomness in the cell?s internal environment. Belief networks provide a well-defined solution for handling the effects of randomness in genetic systems. We propose to study how belief networks can be applied to control and even exploit randomness to achieve new and useful genetic behaviors. Our research results will be used to improve a software application for genetic design called iBioSim.    There are many anticipated benefits for synthetic genetic circuits, including industrial, environmental, and medical applications. For example, bacteria can theoretically be engineered to clean oil spills, kill tumors, and deliver medicines, but only if we can precisely control when and how the bacteria perform their functions. Our investigation will illuminate the unique challenges involved in controlling highly random bacterial systems and will provide the community with rigorous theory and practicable techniques that resolve these challenges.</docText>
    <division>CCF</division>
    <directorate>CSE</directorate>
    <award-instr>Standard Grant</award-instr>
    <programreferencecode>HPCC</programreferencecode>
    <programreferencecode>9218</programreferencecode>
    <fieldofapplication>0000912 Computer Science</fieldofapplication>
    <progmgr>Mitra Basu</progmgr>
    <organization>University of Utah</organization>
    <state>UT</state>
    <amount>262000</amount>
    <program>COMPUTATIONAL BIOLOGY</program>
    <programelementcode>7931</programelementcode>
    <pi>Myers, Chris</pi>
  </document>
  <document>
    <docID>0916035</docID>
    <docDate>September 1, 2009</docDate>
    <docSource></docSource>
    <docText>NetSE: Small:Autonomous Wireless Swarms: Integrating Science and Engineering

   This project will advance the understanding of swarms of simple vehicles that can collectively accomplish complex tasks.  Prof. Rossi and Shen take their inspiration from social animals such as flocks of birds and schools of fish that communicate using simple rules to coordinate motion and make decisions for the entire group.  There can be significant differences between rules found in biology and technological applications.  For instance, birds coordinate motion with visual cues whereas networked robots coordinate activities using wireless communication.  These two types of communication provide different kinds of information and have different limitations. Profs. Shen and Rossi are particularly interested in autonomous underwater vehicles because they face the challenge of low or irregular communication quality and poor position information.    Profs. Shen and Rossi will combine mathematical modeling and analysis with engineering applications to study specific problems.  First, they will explore leadership within swarms to understand how small numbers of individuals within a swarm can shape decision making for the entire group.  Second, they will study swarm behavior in the presence of background flows to understand how currents can distort or disassemble swarms that would be effective in calm conditions.  Third, they will study threat avoidance strategies to understand how complex motion can protect a swarm when individual evasion is impossible.  Finally, they will study coordinated detection of a scalar field such as nutrients or contaminants in the ocean.  Profs. Shen and Rossi will create an interdisciplinary research team around these problems involving students from both mathematics and computer science.</docText>
    <division>CCF</division>
    <directorate>CSE</directorate>
    <award-instr>Standard Grant</award-instr>
    <programreferencecode>HPCC</programreferencecode>
    <keyword>wireless</keyword>
    <programreferencecode>9218</programreferencecode>
    <fieldofapplication>0000912 Computer Science</fieldofapplication>
    <organization>University of Delaware</organization>
    <state>DE</state>
    <programreferencecode>9150</programreferencecode>
    <progmgr>Eun K. Park</progmgr>
    <pi>Shen, Chien-Chung</pi>
    <copi>Louis Rossi</copi>
    <program>NETWORK SCIENCE &amp; ENGINEERING</program>
    <programelementcode>7794</programelementcode>
    <programreferencecode>7794</programreferencecode>
    <programreferencecode>7923</programreferencecode>
    <amount>442000</amount>
  </document>
  <document>
    <docID>0916034</docID>
    <docDate>April 1, 2009</docDate>
    <docSource></docSource>
    <docText>WORKSHOP: Usable Verification.

   This workshop proposal requests funds to partially support a meeting to bring together researchers who have developed formal methods and applied them to industrial use, in order to discuss the current state of applicability of formal methods.  The meeting takes place at the cusp of two related conference VMCAI and POPL, the first being a conference about verification and the second being a conference about programming languages. It is highly desirable to get representatives of the group together for this meeting. If such a consensus is reached, an Organizing Committee will be formed and plan a follow-up workshop that will allow for in-depth examination of the issues raised.</docText>
    <division>CCF</division>
    <directorate>CSE</directorate>
    <award-instr>Standard Grant</award-instr>
    <programreferencecode>HPCC</programreferencecode>
    <keyword>verification</keyword>
    <programreferencecode>9218</programreferencecode>
    <state>NY</state>
    <fieldofapplication>0000912 Computer Science</fieldofapplication>
    <keyword>programming languages</keyword>
    <progmgr>Sol J. Greenspan</progmgr>
    <keyword>formal methods</keyword>
    <organization>New York University</organization>
    <amount>4000</amount>
    <program>PROGRAMMING LANGUAGES</program>
    <programelementcode>7943</programelementcode>
    <pi>Pnueli, Amir</pi>
  </document>
  <document>
    <docID>0916031</docID>
    <docDate>September 15, 2009</docDate>
    <docSource></docSource>
    <docText>TC: Small: Provably Anonymous Networking Through Secure Function Evaluation

   Anonymous communication in computer networks generally relies upon the &amp;#64257;ltering of tra&amp;#64259;c through a cascade of mixes. Clients select a number of proxy nodes that modify and obscure the origin of a message so as to make the detection of a relationship between source and destination extremely di&amp;#64259;cult. While this architecture is known to not be robust against a globally passive adversary, an ever growing body of literature has demonstrated that even moderately capable adversaries can link the communications between two parties using these networks. Accordingly, new techniques ensuring stronger levels of anonymity must be explored. This project will develop a new architecture for anonymity networks o&amp;#64256;ering cryptographic guarantees of anonymity based on a foundation of Secure Function Evaluation. These Provably Anonymous Networks (PANs) protect the participants of communication from tra&amp;#64259;c analysis attacks by remaining unaware that the exchange of messages has occurred. However, realizing a more trustworthy architecture is not simply the result of haphazardly assembling the above components. Rather, this system must be carefully composed so as to avoid the leakage of information useful in the identi&amp;#64257;cation of a communication channel. The results of this project will not only be used to enhance graduate and undergraduate curriculum, but will also be used to develop a tool to assist members of the Carter Center administer observe elections without fear of eavesdropping.</docText>
    <division>CCF</division>
    <directorate>CSE</directorate>
    <award-instr>Standard Grant</award-instr>
    <programreferencecode>HPCC</programreferencecode>
    <organization>GA Tech Research Corporation - GA Institute of Technology</organization>
    <state>GA</state>
    <keyword>architecture</keyword>
    <programreferencecode>9218</programreferencecode>
    <progmgr>Richard Beigel</progmgr>
    <keyword>networking</keyword>
    <amount>200000</amount>
    <program>TRUSTWORTHY COMPUTING</program>
    <programelementcode>7795</programelementcode>
    <programreferencecode>7923</programreferencecode>
    <pi>Traynor, Patrick</pi>
  </document>
  <document>
    <docID>0916015</docID>
    <docDate>September 1, 2009</docDate>
    <docSource></docSource>
    <docText>TC: Small: Collaborative Research: Towards a Dynamic and Composable Model of Trust

   People rely on two types of trust when making everyday decisions:  vertical and horizontal trust. Vertical trust captures trust  relationships between individuals and institutions, while horizontal  trust represents the trust inferred from the observations and opinions  of other peers. Although significant benefit could be realized by  combining horizontal and vertical trust mechanisms, they have evolved  independently in computing systems.    This project focuses on developing a composable trust model capable of  tightly coupling vertical and horizontal trust in a manner that is  both amenable to formal analysis and efficiently deployable.  This  research advances the state of the art in trust management through a  series of innovative results, including the design of a unified  framework for specifying composite trust policies and the design and  analysis of efficient algorithms for policy evaluation. The composite  trust management approach championed by this project also enables  policy authors to move beyond simple proof of compliance to identify  the "top-k" preferred users satisfying security policies including  subjective assessments.  The beneficiaries of this research range from  administrators of traditional computing systems who can better  incorporate previous history into their decision-making processes, to  users in social networks who can more carefully manage the exposure of  their personal data.</docText>
    <keyword>algorithms</keyword>
    <division>CCF</division>
    <directorate>CSE</directorate>
    <award-instr>Standard Grant</award-instr>
    <programreferencecode>HPCC</programreferencecode>
    <keyword>security</keyword>
    <programreferencecode>9218</programreferencecode>
    <fieldofapplication>0000912 Computer Science</fieldofapplication>
    <state>PA</state>
    <organization>University of Pittsburgh</organization>
    <program>TRUSTWORTHY COMPUTING</program>
    <progmgr>Lenore D. Zuck</progmgr>
    <programelementcode>7795</programelementcode>
    <programreferencecode>7923</programreferencecode>
    <pi>Lee, Adam</pi>
    <amount>231248</amount>
  </document>
  <document>
    <docID>0915996</docID>
    <docDate>September 1, 2009</docDate>
    <docSource></docSource>
    <docText>MCS: Reconstructing and  Inferring Topology and Geometry from Point Cloud Data

   Point cloud data (PCD) is pervasive across numerous areas in science and engineering. This project addresses two issues, namely reconstruction in three dimension and inference from PCD in high dimensions.  In reconstruction, the problem of approximating a three dimensional shape from its PCD is considered. This problem becomes hopeless from computational view point for shapes sitting in high dimensional spaces.  Here, the project focuses on inferring topological and geometric properties of the hidden object from its sampled representation rather than reconstructing it completely.    A successful implementation of this project will enable many areas of science and engineering to enhance their scope in modeling, analyzing, prototyping, and visualizing input data with assurance of accuracy. Designing machine parts in automotive industry, creating virtual environments with buildings, simulating cracks and shocks in scientific studies are few examples where new algorithms are needed for reconstructing shapes in presence of non-smoothness.  This will be addressed in the reconstruction section of the project. Various scientific and social studies such as the ones in medicine, economics, climate, disease control produce data that presumably sample a hidden parameter space (a manifold). They will benefit from the research on the topology and geometry inference section of the project.</docText>
    <keyword>algorithms</keyword>
    <division>CCF</division>
    <directorate>CSE</directorate>
    <award-instr>Standard Grant</award-instr>
    <programreferencecode>HPCC</programreferencecode>
    <state>OH</state>
    <programreferencecode>9218</programreferencecode>
    <program>SPECIAL PROJECTS - CCF</program>
    <programelementcode>2878</programelementcode>
    <fieldofapplication>0000912 Computer Science</fieldofapplication>
    <progmgr>Richard Beigel</progmgr>
    <program>INFORMATION TECHNOLOGY RESEARC</program>
    <programelementcode>1640</programelementcode>
    <organization>Ohio State University Research Foundation</organization>
    <amount>420000</amount>
    <pi>Dey, Tamal</pi>
    <program>OFFICE OF MULTIDISCIPLINARY AC</program>
    <copi>Dan Burghelea</copi>
    <programelementcode>1253</programelementcode>
  </document>
  <document>
    <docID>0915994</docID>
    <docDate>September 1, 2009</docDate>
    <docSource></docSource>
    <docText>CIF: Small: Collaborative Research: Cooperative Sensing and Communications for Cognitive Radio Networks

   NSF Proposal Number: 0915969  PI: Vosoughi  Title: CIF: Small: Collaborative Research: Cooperative Sensing and Communications for Cognitive Networks    Project Abstract:    The emerging cognitive radio network (CRN) paradigm has a great potential to solve what seems to be a spectrum crisis, by allowing the unlicensed or secondary users (SUs) to opportunistically and dynamically utilize the white spaces within the licensed bands, without causing harmful interference to the licensed or primary users (PUs). This research investigates two essential components of CRNs: spectrum sensing and spectrum access and sharing. More specifically, the PIs study: 1) novel integrated signal processing and communication designs for data fusion in cooperative spectrum sensing, and 2) novel cooperative spectrum sharing and communication schemes that benefit both PUs and SUs.    In contrast to the existing data fusion rules that assume error-free communication channels with capacity constraints, this research involves novel integrated designs that consider the deteriorating effects of communication channels between the radios and the fusion point and therefore are robust against channel errors and provide higher detection reliability. The robustness can further be improved by employing distributed space-time coding and harvesting diversity gain. Novel cooperative communication schemes are developed based on modern coding and enable SUs to relay PUs? rateless coded data packets in a fashion that is completely seamless to PUs. The schemes have mutual benefits for both PUs and SUs and differ from the existing ones in which SUs are silent during PUs? transmission. Broader impacts include (1) bonding the research groups from OSU and the UR and enhancing research and education through this partnership, (2) making a significant impact on the theory and practice of CRNs, (3) increasing the participation of under-represented students in PIs? research groups and promoting engineering among high school students, and (4) integrating research and education through development of new courses.</docText>
    <division>CCF</division>
    <directorate>CSE</directorate>
    <award-instr>Standard Grant</award-instr>
    <programreferencecode>HPCC</programreferencecode>
    <keyword>network</keyword>
    <programreferencecode>9218</programreferencecode>
    <fieldofapplication>0000912 Computer Science</fieldofapplication>
    <keyword>education</keyword>
    <programreferencecode>9150</programreferencecode>
    <progmgr>William H Tranter</progmgr>
    <state>OK</state>
    <organization>Oklahoma State University</organization>
    <program>COMM &amp; INFORMATION THEORY</program>
    <programelementcode>7935</programelementcode>
    <pi>Rahnavard, Nazanin</pi>
    <amount>191998</amount>
  </document>
  <document>
    <docID>0915984</docID>
    <docDate>September 1, 2009</docDate>
    <docSource></docSource>
    <docText>AF: Small: Approximation, Covering and Clustering in Computational Geometry

   Computational geometry is the branch of theoretical computer science devoted to the design, analysis, and implementation of geometric algorithms and data structures.  Computational geometry has deep roots in reality: Geometric problems arise naturally in any computational field that simulates or interacts with the physical world---computer graphics, robotics, geographic information systems, computer aided-design, and molecular modeling, to name a few---as well as in more abstract domains such as combinatorial geometry and algebraic topology.     This research focuses on fundamental problems in computational geometry. These problems include set-cover, hitting set, independent set, and other related problems.  These problems have numerous applications from wireless networking to optimization.    The main theme of this research is to combine ``classical'' Computational Geometry techniques (like cuttings, epsilon-nets, etc) together with techniques used in Operation Research (Linear Programming, rounding techniques, etc).    This research aims to greatly improve our understanding of the structure of these fundamental problems.  The research may lead to improved approximation algorithms for these problems.      The algorithms and insights obtained from the technical work will benefit computer science and related disciplines where geometric algorithms are widely used.  This research has potential to broaden the scope of Computational Geometry by introducing new techniques into the field.     A book partially based on the research in this award will be published in the near future. This will make the developed techniques available to wide audience consisting of students and researchers from several disciplines include engineering, mathematics, and the natural and social sciences.</docText>
    <keyword>algorithms</keyword>
    <division>CCF</division>
    <directorate>CSE</directorate>
    <award-instr>Standard Grant</award-instr>
    <programreferencecode>HPCC</programreferencecode>
    <keyword>wireless</keyword>
    <programreferencecode>9218</programreferencecode>
    <fieldofapplication>0000912 Computer Science</fieldofapplication>
    <organization>University of Illinois at Urbana-Champaign</organization>
    <state>IL</state>
    <keyword>graphics</keyword>
    <keyword>networking</keyword>
    <keyword>computer graphics</keyword>
    <keyword>computational geometry</keyword>
    <keyword>robotics</keyword>
    <progmgr>Dmitry Maslov</progmgr>
    <pi>Har-Peled, Sariel</pi>
    <amount>410000</amount>
    <program>COMPUTATIONAL GEOMETRY</program>
    <programelementcode>7929</programelementcode>
  </document>
  <document>
    <docID>0915978</docID>
    <docDate>September 1, 2009</docDate>
    <docSource></docSource>
    <docText>SHF: Small: User-Centered Software Analysis Tools

   The proposed work explores techniques for making static analysis tools  more effective in the hands of users.  This will lead to the  development of new static analysis algorithms, techniques, and  interfaces that provide the information users need to find, verify,  and fix defects.    The core of the proposed work will be a framework for static analysis  visualization and interaction, with several components. First, the  framework will include checklists to help users triage defect reports,  i.e., decide whether they are true or false positives.  The aim is to  develop ways to instrument static analyses to automatically generate  checklists based on imprecision introduced during the analysis.  Second, the framework will include lightweight query and search  facilities to help users work with static analysis tool results. Users  need effective ways to query the knowledge-base generated by a tool  when trying to understand an error report; current static error  reports tend to provide too little or too much information. Third, the  framework will include a generic visualization for program paths, a  core part of many static analysis tools' defect reports. While some  tools include simple path visualization, our framework will aim for  far more effective interfaces by applying information visualization  principles.</docText>
    <keyword>algorithms</keyword>
    <division>CCF</division>
    <directorate>CSE</directorate>
    <award-instr>Standard Grant</award-instr>
    <programreferencecode>HPCC</programreferencecode>
    <programreferencecode>9216</programreferencecode>
    <keyword>visualization</keyword>
    <organization>University of Maryland College Park</organization>
    <state>MD</state>
    <programreferencecode>9218</programreferencecode>
    <fieldofapplication>0000912 Computer Science</fieldofapplication>
    <programreferencecode>9217</programreferencecode>
    <keyword>information visualization</keyword>
    <amount>500000</amount>
    <fieldofapplication>0116000 Human Subjects</fieldofapplication>
    <pi>Foster, Jeffrey</pi>
    <program>SOFTWARE ENG &amp; FORMAL METHODS</program>
    <programelementcode>7944</programelementcode>
    <progmgr>Lenore D. Zuck</progmgr>
    <copi>Michael Hicks</copi>
    <copi>Vibha Sazawal</copi>
  </document>
  <document>
    <docID>0915969</docID>
    <docDate>September 1, 2009</docDate>
    <docSource></docSource>
    <docText>CIF: Small: Collaborative Research: Cooperative Sensing and Communications for Cognitive Radio Networks

   The emerging cognitive radio network (CRN) paradigm has a great potential to solve what seems to be a spectrum crisis, by allowing the unlicensed or secondary users (SUs) to opportunistically and dynamically utilize the white spaces within the licensed bands, without causing harmful interference to the licensed or primary users (PUs). This research investigates two essential components of CRNs: spectrum sensing and spectrum access and sharing. More specifically, the PIs study: 1) novel integrated signal processing and communication designs for data fusion in cooperative spectrum sensing, and 2) novel cooperative spectrum sharing and communication schemes that benefit both PUs and SUs.    In contrast to the existing data fusion rules that assume error-free communication channels with capacity constraints, this research involves novel integrated designs that consider the deteriorating effects of communication channels between the radios and the fusion point and therefore are robust against channel errors and provide higher detection reliability. The robustness can further be improved by employing distributed space-time coding and harvesting diversity gain. Novel cooperative communication schemes are developed based on modern coding and enable SUs to relay PUs? rateless coded data packets in a fashion that is completely seamless to PUs. The schemes have mutual benefits for both PUs and SUs and differ from the existing ones in which SUs are silent during PUs? transmission. Broader impacts include (1) bonding the research groups from OSU and the UR and enhancing research and education through this partnership, (2) making a significant impact on the theory and practice of CRNs, (3) increasing the participation of under-represented students in PIs? research groups and promoting engineering among high school students, and (4) integrating research and education through development of new courses.</docText>
    <division>CCF</division>
    <directorate>CSE</directorate>
    <award-instr>Standard Grant</award-instr>
    <programreferencecode>HPCC</programreferencecode>
    <keyword>network</keyword>
    <programreferencecode>9218</programreferencecode>
    <state>NY</state>
    <fieldofapplication>0000912 Computer Science</fieldofapplication>
    <keyword>education</keyword>
    <progmgr>William H Tranter</progmgr>
    <organization>University of Rochester</organization>
    <program>COMM &amp; INFORMATION THEORY</program>
    <programelementcode>7935</programelementcode>
    <pi>Vosoughi, Azadeh</pi>
    <amount>255360</amount>
  </document>
  <document>
    <docID>0915966</docID>
    <docDate>June 1, 2009</docDate>
    <docSource></docSource>
    <docText>CIF: Small: Optical Diffusion Tomography, with Application to in Vivo Fluorescence Resonance Energy Transfer Imaging

   "This award is funded under the American Recovery and Reinvestment Act of 2009  (Public Law 111-5)."      Optical Diffusion Tomography, with Application to In Vivo Fluorescence Resonance Energy Transfer Imaging     Kevin Webb, Purdue University    Optical sensing and imaging will continue to become more important for in vivo medicine. In most cases, light can be modeled with a diffusion equation, and the reconstruction of images based on this model is the basis of optical diffusion tomography (ODT). Enhanced contrast can be achieved with targeting of a fluorophore to cancer cells, for example, and targeted anti-cancer drugs can be delivered. Another molecular imaging opportunity involves fluorescence resonance energy transfer (FRET) parameters. FRET has proved to be of immense value in the study of chemical transport into cells and the underlying cause of disease, and by coupling to ODT (FRET-ODT), there is the opportunity to transfer this knowledge to in vivo studies. While substantial progress has been made in various ODT modalities, the achievable resolution and the computational burden impede effective applications. More efficient imaging strategies are thus essential.      This research involves the development of a method for deep tissue imaging of FRET parameters (FRET-ODT) and fast, accurate and robust methods for optical diffusion tomography. The recent demonstration by the Webb group that it is possible to image FRET parameters using heavily scattered light is being expanded into a method for imaging FRET in vivo. This involves a solution for the intramolecular FRET parameters with both rigid and flexible linkers that are incorporated as unknown sources in a diffusion equation representation for the donor fluorescence. Multigrid algorithms are being developed and applied to fluorescence imaging and FRET-ODT. A model-based non-iterative image reconstruction method, that has proved to substantially reduce computation time in preliminary studies, is being applied to image FRET kinetic parameters.</docText>
    <keyword>algorithms</keyword>
    <division>CCF</division>
    <directorate>CSE</directorate>
    <award-instr>Standard Grant</award-instr>
    <programreferencecode>HPCC</programreferencecode>
    <programreferencecode>9218</programreferencecode>
    <progmgr>John Cozzens</progmgr>
    <organization>Purdue University</organization>
    <state>IN</state>
    <fieldofapplication>0000912 Computer Science</fieldofapplication>
    <program>SIGNAL PROCESSING</program>
    <programelementcode>7936</programelementcode>
    <programreferencecode>6890</programreferencecode>
    <pi>Webb, Kevin</pi>
    <amount>376582</amount>
  </document>
  <document>
    <docID>0915954</docID>
    <docDate>October 1, 2009</docDate>
    <docSource></docSource>
    <docText>AF: Small: Algorithmic and Quantitative Problems in Semi-algebraic and O-minimal Geometry

   This award is funded under the American Recovery and Reinvestment Act of 2009 (Public Law 111-5).     The goal of the proposed research is to further our understanding of algorithmic and quantitative semi-algebraic geometry, develop new techniques especially coming from algebraic topology and the theory of o-minimal structures, and broaden the applications of semi-algebraic geometry in other areas such as discrete and computational geometry.    Algorithmic semi-algebraic geometry lies at the heart of many problems in several different areas of computer science and mathematics including discrete and computational geometry, robot motion planning, geometric modeling, computer-aided design, geometric theorem proving, mathematical investigations of real algebraic varieties, molecular chemistry, constraint databases etc. A closely related subject area is quantitative real algebraic geometry. Results from quantitative real algebraic geometry are the basic ingredients of better algorithms in semi-algebraic geometry and play an increasingly important role in several other areas of computer science: for instance, in bounding the geometric complexity of arrangements in computational geometry, computational learning theory, proving lower bounds in computational complexity theory, convex optimization problems, etc. As such, algorithmic and quantitative real-algebraic geometry has been an extremely active area of research in recent years.      The proposed research will develop new techniques in real algebraic geometry that would lead to new and better algorithms, for computing topological invariants of semi-algebraic sets in theory, as well as practice. In addition, several open problems in quantitative real algebraic geometry and closely related problems in discrete and computational geometry will be attacked with   the mathematical tools developed by the PI. All these research objectives will be integrated in a broad program of training graduate students and curriculum development.</docText>
    <keyword>algorithms</keyword>
    <division>CCF</division>
    <directorate>CSE</directorate>
    <award-instr>Standard Grant</award-instr>
    <programreferencecode>HPCC</programreferencecode>
    <programreferencecode>9218</programreferencecode>
    <organization>Purdue University</organization>
    <state>IN</state>
    <fieldofapplication>0000912 Computer Science</fieldofapplication>
    <pi>Basu, Saugata</pi>
    <keyword>computational geometry</keyword>
    <amount>300000</amount>
    <progmgr>Dmitry Maslov</progmgr>
    <program>COMPUTATIONAL GEOMETRY</program>
    <programelementcode>7929</programelementcode>
    <programreferencecode>6890</programreferencecode>
  </document>
  <document>
    <docID>0915948</docID>
    <docDate>July 15, 2009</docDate>
    <docSource></docSource>
    <docText>AF: Small: Computational Complexity from Physical Constraints

   The project aims to measure the computational difficulty of determining various aspects of physical systems--?quantum mechanical systems in particular.  One such computational task, of interest to physical chemists, is to distinguish the minimum-energy configuration of a system of nuclear spins.  No efficient algorithm running on a traditional computer is known to solve this or similar problems.    Quantum computers are devices that directly harness the laws of quantum mechanics to do computation.  Although not yet implemented at a large scale, they hold great promise in speeding up certain computations, including efficiently simulating actual physical systems.  Yet several interesting questions about physical systems appear beyond the reach of even quantum computers.  The project will investigate problems of this sort, using techniques from theoretical computer science to help determine their intrinsic quantum computational difficulty.  Showing that some of these questions are difficult for a quantum computer will help guide scientists and engineers toward more practical, less ambitious approaches.    More broadly, the project will build on previous work of the Principal Investigator and colleagues to better understand the power of quantum information processing in general and how it relates to traditional information processing.</docText>
    <division>CCF</division>
    <directorate>CSE</directorate>
    <award-instr>Standard Grant</award-instr>
    <programreferencecode>HPCC</programreferencecode>
    <programreferencecode>9218</programreferencecode>
    <fieldofapplication>0000912 Computer Science</fieldofapplication>
    <programreferencecode>9150</programreferencecode>
    <progmgr>Dmitry Maslov</progmgr>
    <state>SC</state>
    <organization>University South Carolina Research Foundation</organization>
    <pi>Fenner, Stephen</pi>
    <program>QUANTUM COMPUTING</program>
    <programelementcode>7928</programelementcode>
    <program>QUANTUM COMMUNICATION</program>
    <programelementcode>7948</programelementcode>
    <amount>196645</amount>
  </document>
  <document>
    <docID>0915929</docID>
    <docDate>August 1, 2009</docDate>
    <docSource></docSource>
    <docText>AF: Small: Collaborative Research: The Polynomial Method for Learning

   The broad goal of this line of research is to give a principled answer to the question,  "What sort of data is efficiently learnable, and by what algorithms?" The current  state-of-the-art in machine learning is that there is an overwhelming number of possible  algorithms that can be tried on a new machine learning problem, with no clear  understanding of which techniques can be expected to work on which problems.  Further, it is often the case that machine learning algorithms that work well "in theory"  do not perform as well "in practice," and vice versa. The PIs have outlined a plan for  resolving these difficulties, finding a unification of disparate methods via the Polynomial  Method, and investigating how efficient this method can be. On a more immediate level  the PIs will aim for broad impact through advising and guiding graduate students and  widely disseminating research results.  Specifically, the PIs will investigate the effectiveness of the "Polynomial Method" in  machine learning theory. The PIs observe that nearly all learning algorithms, in theory  and in practice, can be viewed as fitting a low-degree polynomial to data. The PIs plan  to systematically develop this Polynomial Method of learning by working on the following  three strands of research:  1. Understand the extent to which low-degree polynomials can fit different natural types  of target functions, under various data distributions and noise rates. This research  involves novel methods from approximation theory and analysis.  2. Develop new algorithmic methods for finding well-fitting polynomials when they exist.  Here the PIs will work to adapt results in geometry and probability for the purposes of  identifying and eliminating irrelevant data.  3. Delimit the effectiveness of the Polynomial Method. The PIs will show new results on  the computational intractability of learning intersections of linear separators, and on  learning linear separators with noise.</docText>
    <keyword>algorithms</keyword>
    <division>CCF</division>
    <directorate>CSE</directorate>
    <award-instr>Standard Grant</award-instr>
    <programreferencecode>HPCC</programreferencecode>
    <programreferencecode>9218</programreferencecode>
    <state>NY</state>
    <fieldofapplication>0000912 Computer Science</fieldofapplication>
    <progmgr>Richard Beigel</progmgr>
    <organization>Columbia University</organization>
    <amount>249999</amount>
    <keyword>machine learning</keyword>
    <pi>Servedio, Rocco</pi>
    <program>COMPLEXITY &amp; CRYPTOGRAPHY</program>
    <programelementcode>7927</programelementcode>
  </document>
  <document>
    <docID>0915922</docID>
    <docDate>August 1, 2009</docDate>
    <docSource></docSource>
    <docText>AF : Small : The Theory and Practice of Hash-Based Algorithms and Data Structures

   Hash-based data structures and algorithms are currently a booming industry in the Internet, particularly for applications related to measurement, monitoring, and security.  Hash tables and related structures such as Bloom filters are used billions of times a day, and new uses keep proliferating.  There remain, however, large gaps between the theoretical design and analysis of these structures and their use and implementation in practice.  This research aims to bridge the gap between the theory and practice of algorithms and data structures that utilize hashing, with an emphasis on networking applications.  The outcomes of this research will include tools and frameworks for translating theoretical results into real-world settings, better analyses and implementations of existing algorithms and data structures, and the development and analysis of new algorithms and data structures.  Related educational efforts will focus on methods to make undergraduate students, graduate students, and the professional networking community more aware of the potential and power of hash-based approaches, thereby expanding the reach and influence of theoretical work in the area.</docText>
    <keyword>algorithms</keyword>
    <division>CCF</division>
    <directorate>CSE</directorate>
    <award-instr>Standard Grant</award-instr>
    <programreferencecode>HPCC</programreferencecode>
    <state>MA</state>
    <keyword>security</keyword>
    <programreferencecode>9218</programreferencecode>
    <fieldofapplication>0000912 Computer Science</fieldofapplication>
    <progmgr>Richard Beigel</progmgr>
    <keyword>networking</keyword>
    <pi>Mitzenmacher, Michael</pi>
    <organization>Harvard University</organization>
    <program>ALGORITHMS</program>
    <programelementcode>7926</programelementcode>
    <amount>441956</amount>
  </document>
  <document>
    <docID>0915916</docID>
    <docDate>September 1, 2009</docDate>
    <docSource></docSource>
    <docText>AF:Small:Collaborative Research: Algorithmic Problems in Protein Structure Studies

   The research involves the design and analysis of efficient algorithms for fundamental problems that arise in studies of the three-dimensional structures of proteins.  Graph-theoretic problems underlie these studies, since protein structures are naturally (and sufficiently) represented by graphs that have vertices for the individual amino acid residues and edges between close pairs.  However, graph-theoretic formalisms lead to computationally hard optimization problems, further complicated by extensive amounts of noise in experimental data.  Motivated by specific challenges in nuclear magnetic resonance spectroscopy and other protein structure studies, the project addresses two significant algorithmic problems: identifying correspondences between a pair of graphs where one is a significantly corrupted version of the other, and determining three-dimensional coordinates for the vertices of a graph, given approximate, noisy distance measurements for its edges.    The first algorithmic problem is a form of graph matching, and the project focuses on developing efficient search algorithms to uncover correspondences, with random graph models to rigorously analyze the algorithms and study threshold phenomena characterizing robustness to noise.  In an application to analysis of NMR data, one of the graphs represents the protein and the other the data, a noisy, ambiguous set of atomic interactions; the goal is to match the NMR-identified interactions with specific atomic interactions in the protein.  The second algorithmic problem is Euclidean embedding for sparse geometric graphs, and the research involves development of algorithms to render such graphs amenable to low rank distance matrix reconstruction methods, generalizing the reconstruction methods to exploit the underlying geometric structure and account for the confounding noise structure.  In the NMR setting, the graph represents NMR-probed through-space atomic interactions, and the goal is to compute structures consistent with the experimental data and biophysical constraints.  Both problems are fundamental to numerous other significant applications in protein structure studies.</docText>
    <keyword>algorithms</keyword>
    <division>CCF</division>
    <directorate>CSE</directorate>
    <award-instr>Standard Grant</award-instr>
    <programreferencecode>HPCC</programreferencecode>
    <programreferencecode>9216</programreferencecode>
    <programreferencecode>9218</programreferencecode>
    <organization>Purdue University</organization>
    <state>IN</state>
    <fieldofapplication>0000912 Computer Science</fieldofapplication>
    <programreferencecode>9217</programreferencecode>
    <progmgr>Tatsuya Suda</progmgr>
    <program>BIO COMPUTING</program>
    <programelementcode>7946</programelementcode>
    <pi>Pandurangan, Gopal</pi>
    <amount>225001</amount>
  </document>
  <document>
    <docID>0915912</docID>
    <docDate>August 1, 2009</docDate>
    <docSource></docSource>
    <docText>SHF: Small: Virtual Probe: A Statistically Optimal Framework for Affordable Monitoring and Tuning of Large-Scale Digital Integrated Circuits

   ID: 0915912  Title: Virtual Probe: A Statistically Optimal Framework for Affordable Monitoring and Tuning of Large-Scale Digital Integrated Circuits  PI: Xin Li and Rob Rutenbar, Carnegie Mellon University    Abstract    On-chip variability monitoring and post-silicon tuning have emerged as a joint-strategy to combat the deleterious effects of nanoscale process variations, to maintain the aggressive scaling of integrated circuits (ICs). However, the design overhead (e.g., die area, power consumption, etc.) of these new techniques is a growing problem as devices continue to shrink, and the relative magnitude of critical process fluctuations continues to grow. This project proposes to develop a novel statistical framework called virtual probe (VP) to minimize the overhead of variability monitoring and post-silicon tuning. VP accurately predicts full-chip spatial variation from the smallest possible set of measurement data, thereby enabling lowest-cost / highest-accuracy silicon testing, characterization and tuning as IC technologies move further into the nanoscale regime.    The proposed project aims to create a radically improved platform for on-chip statistical monitoring and tuning of large-scale digital ICs; it is expected to yield 5-10 times performance improvement for advanced ICs in a broad range of applications, from consumer electronics to aerospace controllers. In addition, the proposed mathematical framework is applicable to many other scientific and engineering problems and, hence, offers a new avenue to study and understand these. Finally, given its broad coverage over multiple research areas, the proposed project motivates close collaboration among statistician, computer scientists and circuit designers, thereby creating enormous opportunities for interdisciplinary innovations. The interdisciplinary nature of this project also offers an excellent opportunity to train the next generation of U.S. researchers in multiple science and engineering domains.</docText>
    <division>CCF</division>
    <directorate>CSE</directorate>
    <award-instr>Standard Grant</award-instr>
    <programreferencecode>HPCC</programreferencecode>
    <programreferencecode>9216</programreferencecode>
    <programreferencecode>9218</programreferencecode>
    <fieldofapplication>0000912 Computer Science</fieldofapplication>
    <state>PA</state>
    <organization>Carnegie-Mellon University</organization>
    <progmgr>Sankar Basu</progmgr>
    <amount>450000</amount>
    <programreferencecode>9217</programreferencecode>
    <program>DES AUTO FOR MICRO &amp; NANO SYST</program>
    <programelementcode>7945</programelementcode>
    <pi>Li, Xin</pi>
    <copi>Rob Rutenbar</copi>
  </document>
  <document>
    <docID>0915903</docID>
    <docDate>August 1, 2009</docDate>
    <docSource></docSource>
    <docText>AF: Small: Fundamental Algorithms based on Convex Geometry and Spectral Methods

   This project addresses fundamental open problems in the theory of algorithms using tools from convex geometry, spectral analysis and complexity.  The research will also provide algorithmic insights into central questions in functional analysis and probability.  The problems tackled are of a basic nature, and originate from many areas, including sampling, optimization (both discrete and continuous), machine learning and data mining.  With the abundance of high-dimensional data in important application areas, the need for efficient tools to handle such data is pressing and this project addresses the most basic questions arising from this need.  Progress on these problems is sure to unravel deep mathematical structure and yield new analytical tools.  As the field of algorithms continues to expand (and extends its reach far beyond computer science), such tools will play an important role in forming a theory of algorithms.  The PI currently serves as the director of the Algorithms and Randomness Center, founded in 2006 on the premise of outreach to scientists and engineers and to identify problems and ideas that could play a fundamental role in computational complexity theory.  The research results form the basis of courses at both the undergraduate and graduate level with materials available online.    The project has four focus topics:    (1) Complexity of tensor optimization.  Does there exist a polynomial-time algorithm for computing the spectral norm of an r-fold tensor?      (2) Affine-invariant algorithms.  Can linear programs be solved in strongly polynomial time? What is a natural affine-invariant and noise-tolerant version of principal components analysis?     (3) Complexity of sampling high-dimensional distributions, both upper and lower bounds.  What classes of nonconvex bodies can be sampled (optimized, integrated over) efficiently? Do there exist polynomial-time better-than-exponential approximations to the shortest lattice vector?     (4) Learnability of high-dimensional functions.  Can the intersection of two halfspaces be PAC-learned? Can the intersection of a polynomial number of halfspaces be learned under a Gaussian distribution?</docText>
    <keyword>algorithms</keyword>
    <division>CCF</division>
    <directorate>CSE</directorate>
    <award-instr>Standard Grant</award-instr>
    <programreferencecode>HPCC</programreferencecode>
    <organization>GA Tech Research Corporation - GA Institute of Technology</organization>
    <state>GA</state>
    <programreferencecode>9218</programreferencecode>
    <fieldofapplication>0000912 Computer Science</fieldofapplication>
    <progmgr>Richard Beigel</progmgr>
    <keyword>machine learning</keyword>
    <keyword>data mining</keyword>
    <amount>500000</amount>
    <pi>Vempala, Santosh</pi>
    <program>ALGORITHMS</program>
    <programelementcode>7926</programelementcode>
  </document>
  <document>
    <docID>0915893</docID>
    <docDate>August 1, 2009</docDate>
    <docSource></docSource>
    <docText>AF: Small : Collaborative Research: The Polynomial Method for Learning

   The broad goal of this line of research is to give a principled answer to the question, "What sort of data is efficiently learnable, and by what algorithms?"  The current state-of-the-art in machine learning is that there is an overwhelming number of possible algorithms that can be tried on a new machine learning problem, with no clear understanding of which techniques can be expected to work on which problems.  Further, it is often the case that machine learning algorithms that work well "in theory" do not perform as well "in practice," and vice versa.  The PIs have outlined a plan for resolving these difficulties, finding a unification of disparate methods via the Polynomial Method, and investigating how efficient this method can be.  On a more immediate level the PIs will aim for broad impact through advising and guiding graduate students and widely disseminating research results.    Specifically, the PIs will investigate the effectiveness of the "Polynomial Method" in machine learning theory. The PIs observe that nearly all learning algorithms, in theory and in practice, can be viewed as fitting a low-degree polynomial to data.  The PIs plan to systematically develop this Polynomial Method of learning by working on the following three strands of research:     1. Understand the extent to which low-degree polynomials can fit different natural types of target functions, under various data distributions and noise rates. This research involves novel methods from approximation theory and analysis.    2. Develop new algorithmic methods for finding well-fitting polynomials when they exist.  Here the PIs will work to adapt results in geometry and probability for the purposes of identifying and eliminating irrelevant data.    3. Delimit the effectiveness of the Polynomial Method.  The PIs will show new results on the computational intractability of learning intersections of linear separators, and on learning linear separators with noise.</docText>
    <keyword>algorithms</keyword>
    <division>CCF</division>
    <directorate>CSE</directorate>
    <award-instr>Standard Grant</award-instr>
    <programreferencecode>HPCC</programreferencecode>
    <amount>250000</amount>
    <programreferencecode>9218</programreferencecode>
    <fieldofapplication>0000912 Computer Science</fieldofapplication>
    <state>PA</state>
    <progmgr>Richard Beigel</progmgr>
    <organization>Carnegie-Mellon University</organization>
    <keyword>machine learning</keyword>
    <pi>O'Donnell, Ryan</pi>
    <program>COMPLEXITY &amp; CRYPTOGRAPHY</program>
    <programelementcode>7927</programelementcode>
  </document>
  <document>
    <docID>0915884</docID>
    <docDate>September 1, 2009</docDate>
    <docSource></docSource>
    <docText>SHF: Small: Collaborative Research: Using Identified Circuit Invariance for Online Error Detection

   Ensuring reliable computation at the nanoscale requires mechanisms to detect errors. The PIs propose fundamental research for developing efficient hardware techniques to support online error detection and manufacturing test by monitoring invariant relationships. These invariant relationships naturally occur across multiple levels of digital logic and across multiple time cycles. Violations of these relationships indicate that errors have occurred, either because of transient faults or manufacturing defects; thus monitoring them in hardware can significantly improve circuit reliability. While other techniques exist for error detection, this approach has several advantages, including significantly lower power dissipation, no high-level information requirements, fine-grained optimization capabilities, and providing a potentially powerful source of diagnostic information. A key challenge in this project is the efficient selection of an optimal set of implications to include in the hardware, such that desired reliability is obtained with low overhead.     Reliable operation of logic devices is key for the continued push for smaller and faster electronic circuits. Any benefit in performance and power brought forth by rapid scaling of transistors cannot be fully realized if high reliability cannot be guaranteed for systems composed of these devices. The proposed research is a collaborative effort between Brown and Bucknell Universities. The project involves undergraduate students, many of whom are women and under-represented minorities. The PIs will use this project to create new opportunities to expose undergraduates to research, and to develop outreach workshops to encourage women and under-represented minorities to pursue degrees in computing.</docText>
    <division>CCF</division>
    <directorate>CSE</directorate>
    <award-instr>Standard Grant</award-instr>
    <programreferencecode>HPCC</programreferencecode>
    <programreferencecode>9216</programreferencecode>
    <programreferencecode>9218</programreferencecode>
    <fieldofapplication>0000912 Computer Science</fieldofapplication>
    <state>PA</state>
    <progmgr>Sankar Basu</progmgr>
    <programreferencecode>9217</programreferencecode>
    <program>DES AUTO FOR MICRO &amp; NANO SYST</program>
    <programelementcode>7945</programelementcode>
    <pi>Nepal, Kundan</pi>
    <organization>Bucknell University</organization>
    <amount>65199</amount>
  </document>
  <document>
    <docID>0915846</docID>
    <docDate>July 1, 2009</docDate>
    <docSource></docSource>
    <docText>CIF: Small: Signal Processing for Multi-user Communications under Finite Alphabet Constraints

     Abstract for NSF Proposal #0915846      Abstract:   Channel capacity and mutual information have been studied extensively for various types of wire-line and wireless multi-user communication channels. Among the vast information theoretic literature, most of the results are based on the assumption that the channel inputs are Gaussian distributed. However, Gaussian inputs can never be realized in practical systems. The inputs are usually taken from finite alphabets, which can significantly depart from Gaussian distribution. A large nonlinear gap exists between the theoretical capacity and practical achievable rate. This nonlinear gap indicates that Gaussian-input assumption may not provide a realistic design guideline to practical systems. Maximizing mutual information over channels with finite alphabet inputs will benefit not only bandwidth efficiency but also bit error rate performance. However, much less work has been done for this important topic. This is mainly due to lack of closed-form solution and high computational complexity.    The project investigates the direct maximization of mutual information and throughput over multi-user channels with finite alphabet inputs. The computational complexity problem is tackled by developing mathematically tractable and practically accurate algorithms via employing graph-based message-passing techniques. Shaping matrices are introduced to the maximization of mutual information. Parameterized approaches are developed to solve optimal shaping matrices which lead to the global maxima of the mutual information. Research efforts focus on multiple access channels, broadcast channels and interference channels, which are the fundamental channel scenarios of multi-user communications. The channel state information and/or channel covariance information are made available to the transmitter and receiver for the maximization of mutual information. Both frequency-flat fading and frequency-selective fading channels are explored.</docText>
    <keyword>algorithms</keyword>
    <division>CCF</division>
    <directorate>CSE</directorate>
    <award-instr>Standard Grant</award-instr>
    <programreferencecode>HPCC</programreferencecode>
    <keyword>wireless</keyword>
    <programreferencecode>9218</programreferencecode>
    <progmgr>John Cozzens</progmgr>
    <fieldofapplication>0000912 Computer Science</fieldofapplication>
    <state>MO</state>
    <program>SIGNAL PROCESSING</program>
    <programelementcode>7936</programelementcode>
    <pi>Xiao, Chengshan</pi>
    <organization>Missouri University of Science and Technology</organization>
    <amount>238310</amount>
  </document>
  <document>
    <docID>0915823</docID>
    <docDate>September 1, 2009</docDate>
    <docSource></docSource>
    <docText>SHF: Small: Collaborative Research: Ultra-Low Latency Optical Packet Switched Interconnects with Novel Switching Paradigm

   With the advances of modern computer architectures, interconnects are playing an ever increasingly important role for providing an effective communication medium. Advanced optical switching technologies, such as optical packet switching and wavelength-division-multiplexing, provide a platform to exploit the huge capacity of optical fiber to meet the increasing needs.  This research proposes a new switching paradigm - optical cut-through with electronic packet buffering, and systematically investigates the fundamental and challenging issues in the optical interconnect under this switching scheme, with the objective of designing cost-effective, ultra-low latency and pragmatic interconnects for future high-performance computing and communications systems.    A unique feature of the proposed interconnect is that those packets that do not cause contention can pass the interconnect directly in optical form and experience minimum delay, while only those that cause contention are buffered. This research proposes to combine optical packet switching with electronic buffering, such that the interconnect will enjoy both fast switching and large buffering capacity.  This research will (1) design the switching fabric and packet scheduling algorithms, (2) design practical Forward Error Control (FEC) for the interconnect, and  (3) conduct extensive performance evaluations by means of simulation and emulation tools and analytical models. The outcome of this project will have a significant impact on fundamental design principles and infrastructures for the development of future high-performance computing and communications systems. The PIs will integrate graduate and undergraduate students into the project and promote the participation of female and minority students. The findings will be disseminated to the research community by way of conferences, journals, and web site access.</docText>
    <keyword>algorithms</keyword>
    <division>CCF</division>
    <directorate>CSE</directorate>
    <award-instr>Standard Grant</award-instr>
    <programreferencecode>HPCC</programreferencecode>
    <programreferencecode>9216</programreferencecode>
    <programreferencecode>9218</programreferencecode>
    <state>NY</state>
    <fieldofapplication>0000912 Computer Science</fieldofapplication>
    <keyword>simulation</keyword>
    <pi>Yang, Yuanyuan</pi>
    <organization>SUNY at Stony Brook</organization>
    <keyword>high-performance computing</keyword>
    <progmgr>Chitaranjan Das</progmgr>
    <programreferencecode>9217</programreferencecode>
    <amount>230000</amount>
    <program>COMPUTER ARCHITECTURE</program>
    <programelementcode>7941</programelementcode>
  </document>
  <document>
    <docID>0915805</docID>
    <docDate>August 1, 2009</docDate>
    <docSource></docSource>
    <docText>SHF: Small: RUI: Collaborative Research: Accelerators To Applications - Supercharging the Undergraduate Computer Science Curriculum

   The project integrates graduate research activities in hybrid, accelerated computing applications with undergraduate computer and computational science curricula, preparing undergraduates for graduate school and industry professions with application development experience in technologies essential to emerging high-performance computing and peta-scale systems. Curriculum enhancements across multiple computer science and engineering courses are investigated using real research activities to identify specific improvements needed at the undergraduate level. The research focuses on the use of leading accelerator technologies (multi-core CPUs, GPUs, and FPGAs) in real scientific computing challenges and translating the insights, concepts, and examples for use in undergraduate computer science and engineering instruction. The significance of pairing research investigations with curricular development affords the opportunity to bring real experiences into the undergraduate classroom. Research level investigations will help to characterize the unique inter-dependency of computer architectures and high-performance applications. The resources, strategies and examples created in this project are available to undergraduate programs across the country that wish to provide instruction on the next generation hardware and software environments. The project also reaches several underrepresented populations through outreach efforts at local high schools, regional HBCUs, and leverages existing REU programs.</docText>
    <division>CCF</division>
    <directorate>CSE</directorate>
    <award-instr>Standard Grant</award-instr>
    <programreferencecode>HPCC</programreferencecode>
    <state>OH</state>
    <programreferencecode>9218</programreferencecode>
    <progmgr>Almadena Y. Chtchelkanova</progmgr>
    <fieldofapplication>0000912 Computer Science</fieldofapplication>
    <keyword>computational science</keyword>
    <keyword>scientific computing</keyword>
    <keyword>high-performance computing</keyword>
    <programreferencecode>9229</programreferencecode>
    <program>HIGH-PERFORMANCE COMPUTING</program>
    <programelementcode>7942</programelementcode>
    <pi>Stahlberg, Eric</pi>
    <organization>Wittenberg University</organization>
    <amount>190250</amount>
  </document>
  <document>
    <docID>0915803</docID>
    <docDate>September 1, 2009</docDate>
    <docSource></docSource>
    <docText>SHF: Small: Analyzing and Modeling Natural Language Usage in Software to Improve Software Maintenance Tools

   This award is funded under the American Recovery and Reinvestment Act of 2009   (Public Law 111-5).     Large scale software is difficult to maintain, modify and keep up to date. There is a dire need for automated support for software system navigation, search, and comprehension activities to assist software developers and maintainers. This project addresses this issue by tackling some foundational issues and providing innovative methods for useful automated support for software system navigation, search, and comprehension activities. The research will lead to automatic analyses of the programmer's words and their relationships, through their usage in code, which will elucidate the concepts and actions encoded in the program. By building the conceptual models from the ``sound bites'' using context and program structure, a more complete picture is recovered enabling transformative improvements in automated support for software maintenance and program comprehension.    The analyses are heavily driven by natural language processing, information retrieval, and machine learning. The research will advance the theory and development of software maintenance tools, which will improve the effectiveness of software maintainers, decreasing software maintenance costs and raising software quality as software evolves. In developing a new required course on software engineering-in-the-small, the PIs will incorporate learning how to use and evaluate software maintenance tools, including those developed in this project.</docText>
    <division>CCF</division>
    <directorate>CSE</directorate>
    <award-instr>Standard Grant</award-instr>
    <programreferencecode>HPCC</programreferencecode>
    <programreferencecode>9216</programreferencecode>
    <programreferencecode>9218</programreferencecode>
    <keyword>software engineering</keyword>
    <fieldofapplication>0000912 Computer Science</fieldofapplication>
    <organization>University of Delaware</organization>
    <state>DE</state>
    <progmgr>Sol J. Greenspan</progmgr>
    <programreferencecode>9150</programreferencecode>
    <keyword>information retrieval</keyword>
    <keyword>machine learning</keyword>
    <programreferencecode>9217</programreferencecode>
    <pi>Pollock, Lori</pi>
    <fieldofapplication>0116000 Human Subjects</fieldofapplication>
    <program>SOFTWARE ENG &amp; FORMAL METHODS</program>
    <programelementcode>7944</programelementcode>
    <copi>Vijay Shanker</copi>
    <programreferencecode>6890</programreferencecode>
    <amount>496913</amount>
  </document>
  <document>
    <docID>0915800</docID>
    <docDate>July 1, 2009</docDate>
    <docSource></docSource>
    <docText>CIF: Small: Non-Linear Processing and Coding for Compressive Sensing with Applications in Imaging

   "This award is funded under the American Recovery and Reinvestment Act of 2009  (Public Law 111-5)."    Recently, the new field of compressive sensing has emerged with the    promise to revolutionize digital processing broadly. The key idea is    the use of nonadaptive linear projections to acquire an efficient,    dimensionally reduced representation of a signal or image directly    using just a few measurements. Surprisingly, Nyquist-rate sampling,    which has dominated how signals are acquired and processed in science    and technology since the origin of digital processing, can be leaped    over through compressive sensing theory. Such results may have a    profound impact broadly, including applications in spectroscopy,    imaging, communications, as well as consumer electronics.    In this research, the compressive sensing framework is ``extended" to    make it an integral part of a discrete-time all-analog-processing    communications system that completely skips the digital domain and    shows an excellent robustness against noise. The key idea is the use    of non-linear mappings that act as analog channel encoders, processing    the samples or compressive sensing measurements proceeding from an    analog source and producing continuous amplitude samples that are    transmitted directly through the noisy channel. Thus, all the    processing in the communications system is made in the analog domain.    In addition to its theoretical interest, the potential of this    approach in practical systems is substantial. For instance, the    proposed framework is readily applicable in practical systems such as    imaging, where it presents a performance that is very close to the    theoretical limits and clearly outperforms systems based on standard    compressive sensing. Furthermore, the idea of completely avoiding the    digital domain can be applied not just in point-to-point    communications systems, but also in more complex communications    problems such as distributed coding in sensor networks.</docText>
    <division>CCF</division>
    <directorate>CSE</directorate>
    <award-instr>Standard Grant</award-instr>
    <programreferencecode>HPCC</programreferencecode>
    <programreferencecode>9218</programreferencecode>
    <progmgr>John Cozzens</progmgr>
    <fieldofapplication>0000912 Computer Science</fieldofapplication>
    <organization>University of Delaware</organization>
    <state>DE</state>
    <programreferencecode>9150</programreferencecode>
    <pi>Garcia-Frias, Javier</pi>
    <program>SIGNAL PROCESSING</program>
    <programelementcode>7936</programelementcode>
    <programreferencecode>6890</programreferencecode>
    <copi>Gonzalo Arce</copi>
    <amount>499995</amount>
  </document>
  <document>
    <docID>0915792</docID>
    <docDate>September 1, 2009</docDate>
    <docSource></docSource>
    <docText>RI:HCC:Small:Preference Aggregation: Bypassing Worst-Case Protections

   Elections are a broad model for collective decision-making.  Since around 1990, worst-case hardness notions (most particularly, NP-hardness) have been widely studied as a method for protecting election systems from manipulation, bribery, and control.  Such protective worst-case results have by now been obtained for many problems and many election systems.    The goal of this project is to study the ways that these protective results can be bypassed for the election manipulation, bribery, and control problems.  This project will seek to transform the way security of elections is viewed: to make vividly clear by actual proofs and algorithms that worst-case protections can on important real-word systems and situations be shredded, and thus that bypass attacks are a true threat.  The project will do this through exploring the extent of worst-case protections and by finding the extent to which those protections can be bypassed, via studying restrictions on and assumptions about models, domains, and distributions.    This project involves a wide range of broader impacts, including information dissemination, bringing together local researchers interested in computational social choice, training of students, and service to the community.  In addition, the topic itself is of broad relevance to society.  Elections are of great importance both in human settings and in a rapidly expanding range of electronic settings, and indeed the study of elections is of active interest in computer science, economics, political science, operations research, and mathematics.  The core research of this project seeks to better understand when the protection offered by worst-case hardness results about election systems can be bypassed, and thus is relevant within a broad range of contexts in which elections are used for collective decision-making: from spam filtering to critical human elections to sports tournaments to multiagent systems.  Showing which important, known-worst-case-safe election systems are vulnerable to bypass attacks serves the interest of the citizenry, since system designers can then avoid those systems, and in the long run more broadly secure systems can be developed.</docText>
    <keyword>algorithms</keyword>
    <division>CCF</division>
    <directorate>CSE</directorate>
    <award-instr>Standard Grant</award-instr>
    <programreferencecode>HPCC</programreferencecode>
    <keyword>security</keyword>
    <programreferencecode>9218</programreferencecode>
    <state>NY</state>
    <fieldofapplication>0000912 Computer Science</fieldofapplication>
    <program>INFORMATION TECHNOLOGY RESEARC</program>
    <programelementcode>1640</programelementcode>
    <progmgr>Tracy J. Kimbrel</progmgr>
    <organization>University of Rochester</organization>
    <pi>Hemaspaandra, Lane</pi>
    <program>COMPUT GAME THEORY &amp; ECON</program>
    <programelementcode>7932</programelementcode>
    <program>TRUSTWORTHY COMPUTING</program>
    <programelementcode>7795</programelementcode>
    <programreferencecode>7923</programreferencecode>
    <amount>330693</amount>
  </document>
  <document>
    <docID>0915784</docID>
    <docDate>July 15, 2009</docDate>
    <docSource></docSource>
    <docText>CIF: Small: Removing Inherent Instabilities in Communication Networks

             Proposal 0915784: Removing Inherent Instabilities in Communication Networks            Abstract    Since the late 60s, communication networks have experienced dramatic changes, including: growth to unforeseen scales; operation under very dynamic and adverse conditions; integration of storage and transfer of all media; ubiquitous presence in all parts of our lives; etc. Going forward, these trends will continue to increase and broaden, resulting in mounting stress on the existing networks and, thus, growing emphasis on new network designs, often referred to as the ?clean-slate architectures?.    Hence, in search of better designs, it is necessary to reexamine the existing network design principles, especially those that are inherent to all networking layers, such as the retransmission-based failure recovery. To this end, recent work by the investigator discovers an entirely new networking phenomenon by showing that retransmissions can cause long (-tailed) delays and instabilities even if all traffic and network characteristics are light-tailed, e.g. exponential or Gaussian. This finding is especially crucial for highly congested multi-hop wireless networks that are characterized by frequent failures, e.g. ad hoc and sensor networks. Since the retransmission-based failure recovery is at the core of the existing networks, this new phenomenon sets the basis for many more discoveries in this domain along the vertical (protocol stack), temporal and spatial network dimensions. Furthermore, this research also investigates how widely deployed fair resource sharing mechanisms come with a price since they may be responsible for spreading the long-tailed delays to the entire network. Finally, based on the critical study of the exiting protocols, the investigator pursues careful redesign of network protocols that are shown to cause or spread long delays and instabilities. The general focus is on designing algorithms that are easy to implement, adaptive, scalable and provably near-optimal.</docText>
    <keyword>algorithms</keyword>
    <division>CCF</division>
    <directorate>CSE</directorate>
    <award-instr>Standard Grant</award-instr>
    <programreferencecode>HPCC</programreferencecode>
    <keyword>network</keyword>
    <keyword>wireless</keyword>
    <programreferencecode>9218</programreferencecode>
    <state>NY</state>
    <fieldofapplication>0000912 Computer Science</fieldofapplication>
    <keyword>networking</keyword>
    <organization>Columbia University</organization>
    <keyword>ubiquitous</keyword>
    <progmgr>William H Tranter</progmgr>
    <program>NETWORK CODING AND INFO THEORY</program>
    <programelementcode>7937</programelementcode>
    <pi>Jelenkovic, Predrag</pi>
    <amount>374474</amount>
  </document>
  <document>
    <docID>0915777</docID>
    <docDate>August 1, 2009</docDate>
    <docSource></docSource>
    <docText>SHF: AF: SMALL: Scalable Symbolic Analysis of Hybrid Systems

   "This award is funded under the American Recovery and Reinvestment Act of 2009  (Public Law 111-5)."      Embedded systems, such as controllers in automotive, medical, and avionic systems, consist of a collection of interacting software modules reacting to a continuously evolving environment. The emerging theory of hybrid systems---systems with tightly integrated discrete and continuous dynamics, offers a foundation for model-based design of embedded systems. For analyzing hybrid systems models, there are two prominent trends: an integral component of industrial modeling environments is numerical simulation, while a number of academic tools support formal verification of safety requirements using symbolic computation of reachable states of models. The proposed research is aimed at developing symbolic analysis techniques for simulation trajectories so as to significantly improve the simulation coverage. For this purpose, a new instrumentation scheme that would allow simulation engines to output, along with the concrete simulation trajectory, the symbolic transformers, will be developed. For managing complexity of symbolic analysis using polyhedra, new approximation schemes will be explored. The proposed algorithms will be implemented and evaluated in an analysis tool built on top of the widely used Stateflow/Simulink toolkit. The research results will be integrated in Penn's new Masters' program in Embedded Systems that will train students in fundamentals of embedded systems design and implementation.</docText>
    <keyword>algorithms</keyword>
    <division>CCF</division>
    <directorate>CSE</directorate>
    <award-instr>Standard Grant</award-instr>
    <programreferencecode>HPCC</programreferencecode>
    <keyword>verification</keyword>
    <programreferencecode>9218</programreferencecode>
    <fieldofapplication>0000912 Computer Science</fieldofapplication>
    <state>PA</state>
    <keyword>simulation</keyword>
    <keyword>embedded systems</keyword>
    <organization>University of Pennsylvania</organization>
    <progmgr>Lenore M. Mullin</progmgr>
    <pi>Alur, Rajeev</pi>
    <program>NUM, SYMBOL, &amp; ALGEBRA COMPUT</program>
    <programelementcode>7933</programelementcode>
    <programreferencecode>6890</programreferencecode>
    <amount>376430</amount>
  </document>
  <document>
    <docID>0915772</docID>
    <docDate>September 1, 2009</docDate>
    <docSource></docSource>
    <docText>CIF: Small: Collaborative Research: Wireless Networks: Fundamental Limits via Extremal Entropy Properties

   CIF: Small: Collaborative Research: Wireless Networks: Fundamental Limits via Extremal Entropy Properties    Using extremal entropy properties to characterize the fundamental performance limits of network communication is a tradition of information theory. Most historical successes, however, relied on one particular extremal entropy inequality: the entropy-power inequality of Shannon and Stam, which, though powerful, applies mainly to networks with certain degradedness structure. Moreover, wireless features such as multiple-input multiple-output (MIMO) communications, channel uncertainty incurred by fading, and secrecy constraints due to the broadcast nature of radio communication bring new challenges that cannot be overcome by the entropy-power inequality of Shannon and Stam alone. This situation calls for in-depth investigations of the interaction between converse problems in network information theory and extremal entropy properties in statistics, resorting to powerful statistical tools to solve important communication engineering problems.    The specific goals of this research are: 1) to examine systematic ways of establishing extremal entropy properties through links between information theory and statistics; 2) to establish channel-enhancement as a general framework for solving the converse problems for MIMO downlink communication; and 3) to identify general frameworks for solving the converse problems for collaborative communication in cognitive wireless networks.     Recent years have seen substantial efforts in designing new coding schemes to achieve better performance for wireless networks. Fundamental understanding of the limits of these coding schemes is thus extremely important from the engineering viewpoint to direct future research and to prevent over-engineering and bolster confidence for simple and structured coding schemes. Intellectual results obtained from this research will also be disseminated via course developments on network information theory and wireless communications at Texas A&amp;M and the University of Hawaii.</docText>
    <division>CCF</division>
    <directorate>CSE</directorate>
    <award-instr>Standard Grant</award-instr>
    <programreferencecode>HPCC</programreferencecode>
    <keyword>network</keyword>
    <keyword>wireless</keyword>
    <programreferencecode>9218</programreferencecode>
    <fieldofapplication>0000912 Computer Science</fieldofapplication>
    <programreferencecode>9150</programreferencecode>
    <progmgr>William H Tranter</progmgr>
    <organization>University of Hawaii</organization>
    <state>HI</state>
    <program>COMM &amp; INFORMATION THEORY</program>
    <programelementcode>7935</programelementcode>
    <pi>Liang, Yingbin</pi>
    <amount>200663</amount>
  </document>
  <document>
    <docID>0915766</docID>
    <docDate>August 1, 2009</docDate>
    <docSource></docSource>
    <docText>SHF: Small: Statistical Analysis of Software

   This award is funded under the American Recovery and Reinvestment Act of 2009 (Public Law 111-5).    The project investigates statistical software analysis, which infers  relationships among program components by using statistical properties  derived from multiple program executions.    To motivate statistical techniques, it is useful to draw analogies to  static analysis methods. Static analysis is about inferring  dependencies between program components: If a value is changed in one  component, how does that affect a value in a different component?  Static analysis tends to work best for properties that are local,  meaning the pieces of the program we are trying to relate are not  separated by a great deal of other computation. The statistical analog  of dependencies is correlation. Instead of proving definitively via  static reasoning the presence or absence of dependencies, we can  observe at run-time that some properties of two components have high  or low correlation. Importantly, correlation is not affected by  syntactic or even dynamic locality: if two components have a  correlation, regardless of how much time or computation passes between  the execution of one component and the execution of the other, this  correlation can be detected if the appropriate statistical question is  asked.    The initial focus is on using cross-correlation, which which computes  the maximum correlation between two sequences of observations, to  formalize statistical correlation between software components that  have a direction in time. This idea gives rise to a natural graph that  captures the strength and direction of statistical influence one  component has upon another; these graphs are analogous to traditional  dependency graphs, but have unique and useful properties.</docText>
    <division>CCF</division>
    <directorate>CSE</directorate>
    <award-instr>Standard Grant</award-instr>
    <programreferencecode>HPCC</programreferencecode>
    <programreferencecode>9216</programreferencecode>
    <programreferencecode>9218</programreferencecode>
    <state>CA</state>
    <fieldofapplication>0000912 Computer Science</fieldofapplication>
    <organization>Stanford University</organization>
    <amount>499999</amount>
    <programreferencecode>9217</programreferencecode>
    <program>SOFTWARE ENG &amp; FORMAL METHODS</program>
    <programelementcode>7944</programelementcode>
    <pi>Aiken, Alexander</pi>
    <programreferencecode>6890</programreferencecode>
    <progmgr>Lenore D. Zuck</progmgr>
  </document>
  <document>
    <docID>0915727</docID>
    <docDate>July 15, 2009</docDate>
    <docSource></docSource>
    <docText>CIF: Small: Scalable Multimedia with Unequal Error Protection

   Scalable Multimedia with Unequal Error Protection  Pamela C. Cosman	Laurence B. Milstein  					Abstract  In today?s communications environment, it is important to have rich media content (images, audio, video) that can scale up or down depending on availability of resources. In quality scalable multimedia, some portions of a bit stream contain information that allows a moderate quality reconstruction of the image or video, and additional portions of the bit stream allow the source to be reconstructed at progressively higher quality. We consider the transmission of scalable multimedia data (image and video) through variable types of channels, with a focus on providing different levels of unequal error protection (UEP) appropriate for different levels of information importance and suitable for the channel conditions.   There are many techniques for providing protection against errors, including forward error protection (FEC), hierarchical modulation, and leaky and partial prediction in video coding. Our research involves two new techniques for combining hierarchical modulation with either image or video to produce enhanced performance. We consider a MIMO-based technique, in which MIMO space-time coding is used to increase reliability for the most important information in the scalable image or video data, whereas MIMO spatial multiplexing is used to increase data rate for the less important information. This is combined and optimized with existing techniques where unequal error protection is achieved by transmitting different power levels on multiple antennas. The hierarchical approaches for UEP, as well as the MIMO techniques for UEP, are considered in conjunction with FEC and with leaky/partial prediction mechanisms for scalable video. We also consider UEP for cooperative communications, where a virtual MIMO array is formed out of cooperating nodes. Lastly, we investigate the effects of delay considerations in UEP.</docText>
    <division>CCF</division>
    <directorate>CSE</directorate>
    <award-instr>Standard Grant</award-instr>
    <programreferencecode>HPCC</programreferencecode>
    <programreferencecode>9218</programreferencecode>
    <progmgr>John Cozzens</progmgr>
    <state>CA</state>
    <fieldofapplication>0000912 Computer Science</fieldofapplication>
    <keyword>multimedia</keyword>
    <organization>University of California-San Diego</organization>
    <program>SIGNAL PROCESSING</program>
    <programelementcode>7936</programelementcode>
    <pi>Cosman, Pamela</pi>
    <copi>Laurence Milstein</copi>
    <amount>337692</amount>
  </document>
  <document>
    <docID>0915718</docID>
    <docDate>September 1, 2009</docDate>
    <docSource></docSource>
    <docText>AF:Small:Coarse-Grained Algorithms for Soft Matter

   Proposal Number: 0915718  Title: AF:Small:Coarse-Grained Algorithms for Soft Matter  Principal Investigator: N. R. Aluru   Institution: University of Illinois at Urbana-Champaign    Abstract    Soft matter (e.g. liquids, polymers, biopolymers, etc.) plays an important role in many emerging technologies in engineering and science. The physics of soft matter at macroscopic scales has been investigated for many decades. There is now a good understanding of how to manipulate soft matter at macroscopic scales. The physics of soft matter in confined environments (referring to the behavior of soft matter in constrained spaces) can be quite different from its macroscopic counterpart and many fundamental issues still remain. Soft matter in confined environments can find applications in important technological areas such as energy, health, sensing, sequencing, separation, etc. As a result, soft matter in confined environments has now gained significant interest from the scientific community. Various computational techniques can be used to understand physical, chemical and biological properties of soft matter. However, many of the existing techniques are either too expensive or not accurate enough to perform detailed studies. The objective of this research is to develop advanced computational algorithms to enable a detailed understanding of soft matter in confined environments.     Even though quantum-mechanical and atomistic molecular dynamics simulations can be used to understand soft matter in confined spaces, they are limited to small length and short time scales. Mesoscopic methods, such as Brownian dynamics, Monte Carlo, lattice Boltzmann, dissipative particle dynamics, etc., can be used to overcome the limitations of quantum and atomistic molecular dynamics simulations, but, structural accuracy is a key issue in these methods. The objective of this research is to develop novel coarse-grained algorithms where inter-atomic potentials, widely used in atomistic simulation of soft matter, are directly incorporated into advanced physical theories. The inter-atomic potentials will be coarse-grained to ensure structural consistency. The inter-atomic potential based coarse-grained algorithms will be applied for several challenging examples of soft matter. The accuracy of the structural prediction from coarse-grained algorithms will be compared with that from atomistic simulations. It is anticipated that inter-atomic potential based coarse-grained algorithms will be many orders of magnitude faster than purely atomistic simulations and the development of such algorithms will not only elucidate the fundamental aspects of soft matter in confined spaces, but will also lead to rapid computational prototyping of various applications of soft matter.    The proposed research is at the cross-roads of several engineering and science disciplines. As a result, the development of inter-atomic potential based coarse-grained algorithms for soft matter will impact several disciplines and application areas. Some of the application areas that could benefit from this fundamental research are energy, sensing, health, sequencing, separation, etc. The main efforts of this project will result in the education of students and postdoctoral associates in the highly interdisciplinary area of soft matter. The research results from this project will be broadly disseminated via journal and conference publications, presentations at meetings and workshops, software, courses taught by the PI in the Department of Mechanical Science and Engineering and summer schools offered at University of Illinois.</docText>
    <keyword>algorithms</keyword>
    <division>CCF</division>
    <directorate>CSE</directorate>
    <award-instr>Standard Grant</award-instr>
    <programreferencecode>HPCC</programreferencecode>
    <programreferencecode>9218</programreferencecode>
    <fieldofapplication>0000912 Computer Science</fieldofapplication>
    <organization>University of Illinois at Urbana-Champaign</organization>
    <state>IL</state>
    <progmgr>Mitra Basu</progmgr>
    <keyword>simulation</keyword>
    <keyword>education</keyword>
    <amount>450000</amount>
    <pi>Aluru, N</pi>
    <program>COMPUTATIONAL BIOLOGY</program>
    <programelementcode>7931</programelementcode>
  </document>
  <document>
    <docID>0915704</docID>
    <docDate>September 15, 2009</docDate>
    <docSource></docSource>
    <docText>TC: SMALL: Language Based Accountability

   Distributed applications that require enforcement of fundamental authorization policies play an increasingly important role in internet and telecommunications infrastructure.   Traditionally, controls are imposed before shared resources are accessed to ensure that authorization policies are respected.  Recently, there has been great interest in the exploration of accountability mechanisms that rely on after-the-fact verification.  In this approach, audit logs record vital systems information and an auditor uses these logs to identify dishonest principals and assign blame when there has been a violation of security policy.  Accountability is an important tool to achieve practical security that should be viewed as a first-class design goal of services in federated distributed systems.    The goals of this project are to provide a theoretical basis for the design and analysis of accountability mechanisms and to use the theory to develop language based techniques  for statically validating auditors and accountability appliances.  This proposal investigates operational (via game-based models) and logical (via game logics) foundations for accountability to provide the theoretical basis for the design and analysis of accountability mechanisms.    The project will bring our understanding of accountability closer to the level of before-the-fact access-control mechanisms, which benefit from well understood operational models and logics and therefore support language-based methods that statically validate implementations against interfaces which specify security guarantees.    Accountability supplements purely technology-based approaches to security with insights derived from the interplay between people and technology.  This project aims to develop new models, logics, algorithms, and theories for analyzing and reasoning about accountability-based approaches to trustworthiness.</docText>
    <keyword>algorithms</keyword>
    <division>CCF</division>
    <directorate>CSE</directorate>
    <award-instr>Standard Grant</award-instr>
    <programreferencecode>HPCC</programreferencecode>
    <keyword>verification</keyword>
    <keyword>security</keyword>
    <programreferencecode>9218</programreferencecode>
    <progmgr>Richard Beigel</progmgr>
    <state>IL</state>
    <program>INFORMATION TECHNOLOGY RESEARC</program>
    <programelementcode>1640</programelementcode>
    <amount>499970</amount>
    <pi>Jagadeesan, Radhakrishnan</pi>
    <organization>DePaul University</organization>
    <copi>James Riely</copi>
    <copi>Corin Pitcher</copi>
    <program>TRUSTWORTHY COMPUTING</program>
    <programelementcode>7795</programelementcode>
    <programreferencecode>7923</programreferencecode>
  </document>
  <document>
    <docID>0915681</docID>
    <docDate>August 1, 2009</docDate>
    <docSource></docSource>
    <docText>AF: Small: Collaborative Research: Online Scheduling Algorithms for Networked Systems and Applications

   The Internet is now the world's dominant information infrastructure. Numerous requests from Internet users and their applications compete for shared resources in multiple ways. It is therefore critical to efficiently allocate limited network resources in order to provide high quality services. Improving the performance of the Internet in this manner has the potential to have extremely broad impact.    Resource management becomes even more challenging when mobile devices connecting to the Internet are considered. Designing efficient algorithms is difficult mainly due to the following factors: (1) diverse and unpredictable resource requests; (2) physical limitations on Internet links, on buffer space in network switches, on capacity of wireless channels, and on battery power in mobile devices.    This project aims to provide solutions for several fundamental algorithmic problems in networked systems and applications. Robust and insightful online algorithms will be developed for network switches forwarding prioritized packets and energy management in mobile devices. The objective is to understand the mathematical structure of these problems, to design elegant and easy-to implement online algorithms, to provide rigorous analysis on their performance bounds, and to integrate these algorithms into the real systems to achieve better performance.</docText>
    <keyword>algorithms</keyword>
    <division>CCF</division>
    <directorate>CSE</directorate>
    <award-instr>Standard Grant</award-instr>
    <programreferencecode>HPCC</programreferencecode>
    <keyword>network</keyword>
    <keyword>wireless</keyword>
    <programreferencecode>9218</programreferencecode>
    <fieldofapplication>0000912 Computer Science</fieldofapplication>
    <progmgr>Richard Beigel</progmgr>
    <state>VA</state>
    <organization>George Mason University</organization>
    <program>ALGORITHMS</program>
    <programelementcode>7926</programelementcode>
    <pi>Li, Fei</pi>
    <amount>220359</amount>
  </document>
  <document>
    <docID>0915678</docID>
    <docDate>September 1, 2009</docDate>
    <docSource></docSource>
    <docText>NetSE: Small: Structure and Dynamics of Complex Networks

   The Social Web, or Web 2.0, has changed the way people connect with each other and use information. Sites such as Twitter, Flickr, and Digg allow people to create content, annotate it with descriptive labels, and befriend others to create communities. The collective knowledge and expertise of the community is expressed through the links between people and information. The key to extracting this knowledge is understanding the structure and dynamics of networks.    This project will study dynamics of information spread on networks and how it relates to network structure and quality of information. In previous work, investigator has developed a mathematical framework to study the properties of static networks. She showed that a centrality metric based on the number of paths connecting nodes can be used to identify groups and important nodes within them. However, looking at static structure ignores valuable temporal information that can be used to improve the ability to identify influential nodes and hidden groups, as well as quickly and reliably predict important trends and evaluate the quality of information. The investigator will extend these metrics to dynamic networks and model information spread on networks. The investigator will apply these methods to complex networks that link different types of entities, namely, people, content, and groups.    Considering network structure in the dynamics of information spread will lead to more effective tools to leverage community's knowledge to address a number of problems, including identifying important trends, assessing information quality, and separating true information from rumors.</docText>
    <division>CCF</division>
    <directorate>CSE</directorate>
    <programreferencecode>HPCC</programreferencecode>
    <award-instr>Continuing grant</award-instr>
    <keyword>network</keyword>
    <programreferencecode>9218</programreferencecode>
    <state>CA</state>
    <fieldofapplication>0000912 Computer Science</fieldofapplication>
    <organization>University of Southern California</organization>
    <progmgr>Eun K. Park</progmgr>
    <program>NETWORK SCIENCE &amp; ENGINEERING</program>
    <programelementcode>7794</programelementcode>
    <programreferencecode>7794</programreferencecode>
    <programreferencecode>7923</programreferencecode>
    <pi>Lerman, Kristina</pi>
    <amount>152369</amount>
  </document>
  <document>
    <docID>0915675</docID>
    <docDate>October 1, 2009</docDate>
    <docSource></docSource>
    <docText>TC:Small: Systems-Sensitive Cryptography

   Cryptography often fails to impact practice because it is insensitive to the requirements and reality of the systems that implement and underlie it.  This research aims to change this.  Issues considered include legacy (changing the complex computer systems that make up today's world is expensive and error-prone, so assessing the security of existing methods can be more important than providing new ones), malware (system penetration is widespread, exposing the keys that cryptography relies on for security) and the realities of randomness (it lacks in practice the quality expected in theory, dooming many cryptographic schemes).  Work to be done includes assessment of the security of SSL encryption in the face of widespread system compromise, technically known as selective opening; analysis of the PKCS#1 standard for password-based key derivation; design of hedged encryption schemes that retain as much security as possible when the randomness they are fed is of poor quality; and the study and design of cryptography secure against related-key attacks.  The impact of this work is higher assurance for existing, deployed cryptography currently used by millions, and new cryptography that is well-placed to transition into real systems.</docText>
    <division>CCF</division>
    <directorate>CSE</directorate>
    <award-instr>Standard Grant</award-instr>
    <programreferencecode>HPCC</programreferencecode>
    <keyword>security</keyword>
    <programreferencecode>9218</programreferencecode>
    <state>CA</state>
    <progmgr>Richard Beigel</progmgr>
    <organization>University of California-San Diego</organization>
    <keyword>cryptography</keyword>
    <pi>Bellare, Mihir</pi>
    <program>TRUSTWORTHY COMPUTING</program>
    <programelementcode>7795</programelementcode>
    <programreferencecode>7923</programreferencecode>
    <amount>499030</amount>
  </document>
  <document>
    <docID>0915661</docID>
    <docDate>August 15, 2009</docDate>
    <docSource></docSource>
    <docText>AF: Small: Fundamental Geometry Processing

   In this project new discrete geometry processing algorithms based on simple and intuitive discretizations of low order differential forms will be developed, along with the supporting theoretical foundations, and it will be shown that the proposed approach unifies and extends a number of existing mesh relaxation algorithms used for denoising, subdivision, and interactive shape deformation.  In the classical theory of surfaces, a surface patch is defined by a smooth 3D-valued parameterization function of two parameters, which in the language of differential forms is referred to as a 3D-valued differential 0-form.  The two partial derivatives of one of these 0-forms are three dimensional vector fields which define a 3D-valued differential 1-form.  A simple approach to surface deformations is to modify this 1-form by locally stretching and rotating its two component vector fields, and then solve for a parameterization function whose partial derivatives match the component vector fields of the modified 1-form.  The discrete analog of this approach for deformations of graph embeddings and polygon meshes will be developed.  The first fundamental form measures distances and angles on a smooth surface, and the second fundamental form measures how the surface normal varies, i.e., curvature.  The two fundamental forms are invariant to rigid body transformations of the surface, and satisfy the Gauss-Codazzi-Mainardi (CDM) equations.  Conversely, given two second order symmetric tensor fields satisfying together the CDM equations, the Fundamental Theorem of Surface Theory asserts that: 1) there exists a surface immersed in three-dimensional Euclidean space with these fields as its first and second fundamental forms; and 2) the surface is unique modulo rigid body transformations.  The analog theorem for polygon meshes will be formulated and proven, including extensions to manifold meshes of arbitrary topology, meshes with border, and even non-manifold meshes.  New contributions to the mesh compression literature will be made by exploiting the relationship between reconstruction algorithms and connectivity-preserving mesh compression schemes.</docText>
    <keyword>algorithms</keyword>
    <division>CCF</division>
    <directorate>CSE</directorate>
    <award-instr>Standard Grant</award-instr>
    <programreferencecode>HPCC</programreferencecode>
    <amount>250000</amount>
    <programreferencecode>9218</programreferencecode>
    <fieldofapplication>0000912 Computer Science</fieldofapplication>
    <state>RI</state>
    <programreferencecode>9150</programreferencecode>
    <organization>Brown University</organization>
    <progmgr>Dmitry Maslov</progmgr>
    <program>COMPUTATIONAL GEOMETRY</program>
    <programelementcode>7929</programelementcode>
    <pi>Taubin, Gabriel</pi>
  </document>
  <document>
    <docID>0915619</docID>
    <docDate>July 1, 2009</docDate>
    <docSource></docSource>
    <docText>CIF: Small: Collaborative Research: Towards a Paradigm-shift in Distributed Information Processing: Harnessing Group-structure and Interaction

   "This award is funded under the American Recovery and Reinvestment Act of 2009    (Public Law 111-5)."      With a vision to fully realize the potential of next generation    communication network infrastructure based on ubiquitous sensor nodes,    this research introduces new architectures and strategies, for    distributed in-network information processing, which directly harness:    the structure of the objective performance metrics for information    processing, the structure of the underlying statistical dependencies    in the information gathered by sensing nodes, the topology of the    network, and the capability for bidirectional interactive information    exchange. This research advocates a two-fold paradigm shift in network    information processing: 1) a shift from the traditional goal of data    transport to the goal of function computation and 2) a shift from    unidirectional models of information flow to interactive information    flow models. This research supports the education of future scientists    and engineers by integrating research advances with curriculum    development and supports diversity by encouraging the participation of    women and under-represented groups.        This research develops two fundamentally new classes of code ensembles    for interactive information processing. The first is based on    techniques from abstract algebra and random graph theory to capture    the structure of functions being computed at destinations. The second    is based on techniques from communication complexity and multiterminal    information theory to capture interactive structures of information    flow in the network. These new code classes have superseded the    performance of random code ensembles used in network information    theory since its inception. This research develops new analytical    frameworks and tools to uncover the fundamental performance limits of    interactive information processing in sensor networks.  This research    facilitates the cross-pollination of research fields by providing    components which build bridges between four fundamental areas, namely,    information and coding theory, abstract algebra, random graph theory,    and communication complexity theory.</docText>
    <division>CCF</division>
    <directorate>CSE</directorate>
    <award-instr>Standard Grant</award-instr>
    <programreferencecode>HPCC</programreferencecode>
    <state>MI</state>
    <keyword>network</keyword>
    <programreferencecode>9218</programreferencecode>
    <progmgr>John Cozzens</progmgr>
    <fieldofapplication>0000912 Computer Science</fieldofapplication>
    <organization>University of Michigan Ann Arbor</organization>
    <keyword>ubiquitous</keyword>
    <keyword>education</keyword>
    <keyword>vision</keyword>
    <pi>Sadanandarao, Sandeep</pi>
    <program>SENSOR NETWORKS</program>
    <programelementcode>7938</programelementcode>
    <programreferencecode>6890</programreferencecode>
    <amount>249984</amount>
  </document>
  <document>
    <docID>0915612</docID>
    <docDate>September 1, 2009</docDate>
    <docSource></docSource>
    <docText>SHF: Small: Exploiting Redundancy for Process-Variation Resilience in Nano-scale Fabrics

   This project addresses critical questions relevant to the successful realization of nanoelectronics based computing platforms.  The promised higher density, lower power, and faster operation of nanoelectronics devices is attracting increasing interest.  Two of the remaining major roadblocks to the creation of nanoscale computational structures, however, are very high levels of defects and process variations.  While the small size of nanostructures and their self-assembly based manufacturing provide great advantages, they also cause them to be very vulnerable to defects and parameter variations---much more so than conventional CMOS.  The high defect rates require a layered approach for fault tolerance and typically involve incorporating carefully targeted redundancy at multiple system levels.  In addition to defects, even tiny variations in the manufacturing process can lead to very substantial variations in the actual values of key parameters, such as circuit delay.  The purpose of this award is to develop a comprehensive methodology to efficiently use redundancy in nanofabrics to ameliorate the effects of both high defect levels and circuit delay variations.  The methodology that will be developed will assist designers with a set of well-tested approaches to provide resilience in the face of manufacturing defects and process variations.  In educational terms, this project will contribute to the training of undergraduate and graduate students in the art of physical nanofabrics, nanoscale computer architecture, and circuit design for the future nano-technologies.</docText>
    <division>CCF</division>
    <directorate>CSE</directorate>
    <award-instr>Standard Grant</award-instr>
    <programreferencecode>HPCC</programreferencecode>
    <programreferencecode>9216</programreferencecode>
    <state>MA</state>
    <keyword>architecture</keyword>
    <programreferencecode>9218</programreferencecode>
    <fieldofapplication>0000912 Computer Science</fieldofapplication>
    <organization>University of Massachusetts Amherst</organization>
    <progmgr>Dmitry Maslov</progmgr>
    <programreferencecode>9217</programreferencecode>
    <copi>C.Mani Krishna</copi>
    <pi>Moritz, Csaba Andras</pi>
    <copi>Israel Koren</copi>
    <program>NANOCOMPUTING</program>
    <programelementcode>7947</programelementcode>
    <amount>349998</amount>
  </document>
  <document>
    <docID>0915611</docID>
    <docDate>August 1, 2009</docDate>
    <docSource></docSource>
    <docText>SHF: Small: Collaborative Research: Specification Language Foundations for Modular Reasoning Methodologies

   This project extends the semantical foundations of object-oriented (OO)   languages to cover methodologies for modular reasoning. Modular reasoning   means verifying software components assuming the specification of each   used component. Modularity is important for productivity and scalability,   but is difficult to achieve for OO software. To support modular reasoning,   researchers have proposed several methodologies that restrict programs and   their specifications. The goal of this project is to provide a theoretical   basis that supports practical techniques for justifying and using   methodologies.    This project provides guidance for the designers of programming and   specification languages, verification logics, and associated tools. The   results will improve the utility and extensibility of verification tools   --- a key goal of the Verified Software grand challenge.  Software   developers may benefit from the integration and harmonious interoperation   of best-practice methodologies. This project is potentially   transformative: it aims to enable combinations and customizations of   methodologies by tool users, scalable to real applications.    Improved OO programming methodologies may greatly improve programming   practice, especially in applications needing high assurance, reliability,   and security.  This will benefit society, which increasingly depends on   computing systems built using OO components. Unification of methodologies   and streamlining of tools also facilitates the education of software   developers.</docText>
    <division>CCF</division>
    <directorate>CSE</directorate>
    <award-instr>Standard Grant</award-instr>
    <programreferencecode>HPCC</programreferencecode>
    <programreferencecode>9216</programreferencecode>
    <keyword>verification</keyword>
    <keyword>security</keyword>
    <state>NJ</state>
    <programreferencecode>9218</programreferencecode>
    <fieldofapplication>0000912 Computer Science</fieldofapplication>
    <keyword>object-oriented</keyword>
    <keyword>education</keyword>
    <organization>Stevens Institute of Technology</organization>
    <programreferencecode>9217</programreferencecode>
    <pi>Naumann, David</pi>
    <program>PROGRAMMING LANGUAGES</program>
    <programelementcode>7943</programelementcode>
    <progmgr>Lenore D. Zuck</progmgr>
    <amount>249949</amount>
  </document>
  <document>
    <docID>0915608</docID>
    <docDate>August 15, 2009</docDate>
    <docSource></docSource>
    <docText>SHF: Small: Co-Processors for High-Performance Genome Analysis

   This award is funded under the American Recovery and Reinvestment Act of 2009 (Public Law 111-5).      This research develops novel techniques for applying the heterogeneous execution model, where a general-purpose processor is accelerated by a special-purpose co-processor, to optimization-based scientific computations.  The result of this research is a library of computational building blocks that perform fundamental operations used in genome analysis, as well as a new design tool that uses this library to systematically synthesize complete co-processor architectures that are optimized for the characteristics of the input dataset of interest.    Traditional development methodologies for heterogeneous computing have focused on computations that are based on data-parallelized O(n) algorithms.  This project demonstrates the use of heterogeneous computing for non-O(n) algorithms, which have complex behavior, internal state, temporal locality, and a high ratio of computation versus communication.  Adapting this class of computation to heterogeneous platforms provides high-performance computing without the need for maintenance-intensive and power-inefficient traditional shared-memory and cluster-based supercomputers.    This project targets optimization-based phylogeny reconstruction as a application case study.  This application uses combinatorial optimization for its search for optimal phylogenetic (evolutionary) trees, as well as for its procedure for scoring candidate trees.</docText>
    <keyword>algorithms</keyword>
    <division>CCF</division>
    <directorate>CSE</directorate>
    <award-instr>Standard Grant</award-instr>
    <programreferencecode>HPCC</programreferencecode>
    <programreferencecode>9218</programreferencecode>
    <progmgr>Almadena Y. Chtchelkanova</progmgr>
    <fieldofapplication>0000912 Computer Science</fieldofapplication>
    <programreferencecode>9150</programreferencecode>
    <keyword>high-performance computing</keyword>
    <state>SC</state>
    <organization>University South Carolina Research Foundation</organization>
    <program>HIGH-PERFORMANCE COMPUTING</program>
    <programelementcode>7942</programelementcode>
    <programreferencecode>6890</programreferencecode>
    <pi>Bakos, Jason</pi>
    <amount>155004</amount>
  </document>
  <document>
    <docID>0915543</docID>
    <docDate>August 1, 2009</docDate>
    <docSource></docSource>
    <docText>AF:Small:Geometric Embedding and Covering: Sequential and Distributed Approximation Algorithms

   Over the last decade, wireless networks of various kinds, including cellular networks, wireless LANs, sensor networks, community networks, etc. have become ubiquitous. This award focuses on algorithmic problems motivated by the design of protocols and applications for some of these networks. One feature of these networks, that the proposal attempts to take advantage of, is that network nodes typically reside in the plane or in 3-dimensional space and furthermore communication and sensing ranges of these nodes may also be modeled geometrically (for example, as disks or spheres in Euclidean space). As a result the award focuses on optimization problems in the geometric context and the goal is to design algorithms for these problems that can eventually be implemented efficiently on the network nodes. One class of problems considered are geometric embedding problems in which network nodes seek to discover their locations based only on information about which other nodes are within communication range. Solutions to these problems have the potential to improve routing protocols on these networks. Another class of problems PIs consider are geometric coverage problems whose aim is to optimally place sensor nodes with given sensing abilities so as to cover certain target regions. Such coverage problems arise in a variety of sensor network applications such as monitoring bridges, vineyards, and factory floors.</docText>
    <keyword>algorithms</keyword>
    <division>CCF</division>
    <directorate>CSE</directorate>
    <award-instr>Standard Grant</award-instr>
    <programreferencecode>HPCC</programreferencecode>
    <keyword>network</keyword>
    <keyword>wireless</keyword>
    <programreferencecode>9218</programreferencecode>
    <fieldofapplication>0000912 Computer Science</fieldofapplication>
    <state>IA</state>
    <keyword>ubiquitous</keyword>
    <progmgr>Dmitry Maslov</progmgr>
    <organization>University of Iowa</organization>
    <program>COMPUTATIONAL GEOMETRY</program>
    <programelementcode>7929</programelementcode>
    <pi>Pemmaraju, Sriram</pi>
    <copi>Kasturi Varadarajan</copi>
    <amount>449932</amount>
  </document>
  <document>
    <docID>0915537</docID>
    <docDate>August 1, 2009</docDate>
    <docSource></docSource>
    <docText>SHF: Small: Collaborative Research: Design of Power and Area Efficient, Fault-tolerant Network-on-Chip Circuits and Architectures

   "This award is funded under the American Recovery and Reinvestment Act of 2009 (Public Law 111-5)."    The proliferation of multiple cores on the same die has given rise to communication-centric systems, wherein the design of the interconnection network has become extremely important. To address the growing wire delay problems and improve performance in CMP architectures, a growing number of multi-core designs have adopted a more flexible, scalable, packet-switched architecture called Network-on-Chip (NoC). Of the several challenges facing current NoC designs, the three prominent ones are power dissipation, die area, and overall performance. In this research, we propose to develop energy-efficient, area-efficient, high-performance, and fault-tolerant NoCs by exploiting innovative technological (circuit) optimizations and architectural design space. On the technology side, we will develop and design novel circuit techniques that will achieve significant power savings, fault-tolerance and considerable reduction in area requirements. On the architectural side, we will develop novel NoC designs that incorporate the proposed circuit design techniques and further improve network performance. This research is an organized effort that will combine circuit analysis, architecture study, performance evaluation and design synthesis. We will develop a comprehensive NoC design platform which will analyze the trade-offs among various parameters of interest ? power, area and performance.     The success of this research is likely to have a significant impact on the design of NoC architectures for CMPs. The proposed research will tackle some of the major limitations of NoC design, namely power consumption and reliability, and will make significant advances in understanding the interplay between performance, energy, and reliability for NoC architectures. Realistic solutions to these problems will provide the ability to continue the improvements in computational performance that the information technology sector of our economy depends on. This multi-disciplinary research will also play a major role in education by integrating discovery with teaching and training.</docText>
    <division>CCF</division>
    <directorate>CSE</directorate>
    <award-instr>Standard Grant</award-instr>
    <programreferencecode>HPCC</programreferencecode>
    <programreferencecode>9216</programreferencecode>
    <keyword>network</keyword>
    <pi>Louri, Ahmed</pi>
    <organization>University of Arizona</organization>
    <state>AZ</state>
    <keyword>architecture</keyword>
    <programreferencecode>9218</programreferencecode>
    <fieldofapplication>0000912 Computer Science</fieldofapplication>
    <keyword>education</keyword>
    <progmgr>Chitaranjan Das</progmgr>
    <programreferencecode>9217</programreferencecode>
    <program>COMPUTER ARCHITECTURE</program>
    <programelementcode>7941</programelementcode>
    <programreferencecode>6890</programreferencecode>
    <copi>Janet Wang</copi>
    <amount>365545</amount>
  </document>
  <document>
    <docID>0915526</docID>
    <docDate>August 1, 2009</docDate>
    <docSource></docSource>
    <docText>SHF: Small: T2T: A Framework for Amplifying Testing Resources

   Proposal Number: 0915526  Title: T2T: A Framework for Amplifying Testing Resources  PIs: Sebastian Elbaum and Matthew Dwyer    Abstract:    Virtually every software development company invests in the   construction and maintenance of testing resources to validate their   products. These investments, however, can be very costly.   Consequently, not all testing resources are supported equally as   companies focus their testing efforts on specific and limited types of   tests, ultimately sacrificing timely fault detection. The work proposed will address this problem by investigating strategies for amplifying the power and applicability of testing resources. The strategies will transform existing tests into new tests that add complementary testing capabilities to the validation process. The developed strategies will be unique in their treatment of tests as data.  This will require the development of test representations that can be efficiently manipulated, and test transformations to realize operations that generate new and valuable tests. Test representations that are expressive enough to efficiently encode common forms of software tests will be developed, and transformations that operate both on and across different test representations will be explored. These test representations and transformations will constitute the T2T (test to test) framework and the initial step towards treating tests as data. If successful, this work will help software development companies lower product costs and enhance dependability by amplifying their existing testing resources.</docText>
    <division>CCF</division>
    <directorate>CSE</directorate>
    <award-instr>Standard Grant</award-instr>
    <programreferencecode>HPCC</programreferencecode>
    <programreferencecode>9216</programreferencecode>
    <programreferencecode>9218</programreferencecode>
    <fieldofapplication>0000912 Computer Science</fieldofapplication>
    <pi>Elbaum, Sebastian</pi>
    <organization>University of Nebraska-Lincoln</organization>
    <state>NE</state>
    <progmgr>Sol J. Greenspan</progmgr>
    <programreferencecode>9150</programreferencecode>
    <programreferencecode>9217</programreferencecode>
    <program>SOFTWARE ENG &amp; FORMAL METHODS</program>
    <programelementcode>7944</programelementcode>
    <copi>Matthew Dwyer</copi>
    <amount>491688</amount>
  </document>
  <document>
    <docID>0915519</docID>
    <docDate>August 1, 2009</docDate>
    <docSource></docSource>
    <docText>AF:Small:Optimization in surface-embedded graphs

   This project aims to expand the boundaries of computational topology to include fundamental problems in combinatorial optimization, by developing efficient, practical, combinatorial algorithms to compute maximum flows, minimum cuts, and related structures in graphs embedded on topological surfaces.  Preliminary results reveal intimate connections between the linear-programming duality between flows and cuts, the combinatorial duality between graph embeddings, the equivalence between flows in the primal graph and shortest-path distances in the dual graph, and Poincare-Lefschetz duality between (relative) homology and cohomology.  These connections allow maximum flows to be computed in near-linear time in graphs of any fixed genus, by optimizing the relative homology class of the flow rather than directly optimizing the flow itself.  However, the running time of these algorithms depends exponentially on the genus of the surface; a major goal of the project is to bring this dependence down to a small polynomial.    The project aims to advance knowledge and understanding across multiple research areas, by developing novel connections between fundamental techniques in combinatorial and algebraic topology, algorithm design, and combinatorial optimization.  This research will lead to faster algorithms for several basic optimization problems, develop new applications of topological methods, and potentially settle several long-standing open algorithmic questions.  The project will support two PhD students at the beginning of their graduate careers.  A broader goal of the research is to strengthen ties between the computer science and mathematics research communities; results will be disseminated broadly in venues visible to both communities.</docText>
    <keyword>algorithms</keyword>
    <division>CCF</division>
    <directorate>CSE</directorate>
    <award-instr>Standard Grant</award-instr>
    <programreferencecode>HPCC</programreferencecode>
    <programreferencecode>9218</programreferencecode>
    <fieldofapplication>0000912 Computer Science</fieldofapplication>
    <progmgr>Richard Beigel</progmgr>
    <organization>University of Illinois at Urbana-Champaign</organization>
    <state>IL</state>
    <pi>Erickson, Jeff</pi>
    <amount>500000</amount>
    <program>ALGORITHMS</program>
    <programelementcode>7926</programelementcode>
  </document>
  <document>
    <docID>0915495</docID>
    <docDate>September 1, 2009</docDate>
    <docSource></docSource>
    <docText>SHF: Small: Collaborative Research: Ultra Low Latency Optical Packet Switched Interconnects with Novel Switching Paradigm

   Abstract   With the advances of modern computer architectures, interconnects are playing an ever increasingly important role for providing an effective communication medium. Advanced optical switching technologies, such as optical packet switching and wavelength-division-multiplexing, provide a platform to exploit the huge capacity of optical fiber to meet the increasing needs. This research proposes a new switching paradigm - optical cut-through with electronic packet buffering, and systematically investigates the fundamental and challenging issues in the optical interconnect under this switching scheme, with the objective of designing cost-effective, ultra-low latency and pragmatic interconnects for future high-performance computing and communications systems.     A unique feature of the proposed interconnect is that those packets that do not cause contention can pass the interconnect directly in optical form and experience minimum delay, while only those that cause contention are buffered. This research proposes to combine optical packet switching with electronic buffering, such that the interconnect will enjoy both fast switching and large buffering capacity. This research will (1) design the switching fabric and packet scheduling algorithms, (2) design practical Forward Error Control (FEC) for the interconnect, and (3) conduct extensive performance evaluations by means of simulation and emulation tools and analytical models. The outcome of this project will have a significant impact on fundamental design principles and infrastructures for the development of future high-performance computing and communications systems. The PIs will integrate graduate and undergraduate students into the project and promote the participation of female and minority students. The findings will be disseminated to the research community by way of conferences, journals, and web site access.</docText>
    <keyword>algorithms</keyword>
    <division>CCF</division>
    <directorate>CSE</directorate>
    <award-instr>Standard Grant</award-instr>
    <programreferencecode>HPCC</programreferencecode>
    <programreferencecode>9216</programreferencecode>
    <programreferencecode>9218</programreferencecode>
    <fieldofapplication>0000912 Computer Science</fieldofapplication>
    <keyword>simulation</keyword>
    <state>FL</state>
    <keyword>high-performance computing</keyword>
    <organization>Florida State University</organization>
    <progmgr>Chitaranjan Das</progmgr>
    <programreferencecode>9217</programreferencecode>
    <amount>150000</amount>
    <program>COMPUTER ARCHITECTURE</program>
    <programelementcode>7941</programelementcode>
    <pi>Zhang, Zhenghao</pi>
  </document>
  <document>
    <docID>0915487</docID>
    <docDate>August 1, 2009</docDate>
    <docSource></docSource>
    <docText>AF: Small: Spectral Graph Theory, Point Clouds, and Linear Equation Solvers

   This award is funded under the American Recovery and Reinvestment Act of 2009 (Public Law 111-5).    Two of the most important abstractions in Computer Science are graphs and point clouds.  A graph abstracts relations between things: two vertices in a graph are connected by an edge if the objects associated with the vertices are related.  Directed edges indicate a connection from one vertex to another.  Both social networks and the web are modeled as graphs: vertices could represent people with edges between friends, or they may represent web pages with directed edges representing links.  Point clouds are sets of vectors, each vector providing a list of numerical attributes.  In many computer science applications, one associates a vector with each object being examined.  For example, one may rate on a numerical scale different properties of a chemical, or how much a person likes movies from certain genres.    This project will unify these two abstractions by translating point clouds into graphs.  Each vector becomes a vertex in a graph, with the strength of the edge connecting two vertices indicating the degree of similarity of the corresponding vectors.  This translation will enable the application of numerous techniques that have been developed in graph theory to the study of point clouds.    Technical objectives of the project include the determination of the best graph to associate with a point cloud, the development of efficient algorithms for the construction of such a graph, and the development of new approaches to the analysis of graphs.  In particular, a spectral analysis of directed graphs will be developed.    Both graduate students and undergraduates will be trained in research while working on this project.  Educational materials developed during the course of the project will be disseminated through the internet as well as incorporated into a book under development.</docText>
    <keyword>algorithms</keyword>
    <division>CCF</division>
    <directorate>CSE</directorate>
    <award-instr>Standard Grant</award-instr>
    <programreferencecode>HPCC</programreferencecode>
    <programreferencecode>9218</programreferencecode>
    <fieldofapplication>0000912 Computer Science</fieldofapplication>
    <progmgr>Richard Beigel</progmgr>
    <organization>Yale University</organization>
    <state>CT</state>
    <pi>Spielman, Daniel</pi>
    <program>ALGORITHMS</program>
    <programelementcode>7926</programelementcode>
    <programreferencecode>6890</programreferencecode>
    <amount>496924</amount>
  </document>
  <document>
    <docID>0915444</docID>
    <docDate>July 1, 2009</docDate>
    <docSource></docSource>
    <docText>CIF: Small: Efficient Signal Processing Algorithms for Inference of Gene Regulatory Networks

   "This award is funded under the American Recovery and Reinvestment Act of 2009  (Public Law 111-5)."    Currently, one of the most important research problems encountered in molecular biology, bioinformatics, and systems biology consists in deciphering the mechanisms that lie at the basis of gene regulatory networks. The importance of gene regulatory networks is due to their fundamental role in the control and operation of the processes taking place in the living cell. Learning the structure and operation of gene regulatory networks facilitates the identification and understanding of the functions of macromolecules in cells, finding out the biological mechanisms of diseases and organ development, and developing efficient disease diagnosis and therapeutics means. The aim of this project is to build a computationally efficient signal processing framework for global understanding of the structure and functionality of gene regulatory networks.     Two major research thrusts are addressed in this project. The first research thrust develops information theoretic tools for efficient inference of causal regulations between gene expressions, and determination of global topologies for gene regulatory networks. The second research thrust develops a Bayesian information theoretic framework for inference of gene regulatory networks based on the integration of a multitude of heterogeneous data sources. A variational Bayes sampling formalism is also built to overcome the intractable computational complexity and convergence issues associated with the family of Monte-Carlo techniques. This project brings important scientific, technological and educational contributions. By combining microarray data with prior biological knowledge and other data sources, the proposed computational tools have the potential of uncovering new aspects of the logic that governs the transcriptional control and interactions between genes, proteins and other macromolecules.</docText>
    <keyword>algorithms</keyword>
    <division>CCF</division>
    <directorate>CSE</directorate>
    <organization>Texas Engineering Experiment Station</organization>
    <state>TX</state>
    <award-instr>Standard Grant</award-instr>
    <programreferencecode>HPCC</programreferencecode>
    <programreferencecode>9218</programreferencecode>
    <progmgr>John Cozzens</progmgr>
    <fieldofapplication>0000912 Computer Science</fieldofapplication>
    <keyword>bioinformatics</keyword>
    <pi>Serpedin, Erchin</pi>
    <program>SIGNAL PROCESSING</program>
    <programelementcode>7936</programelementcode>
    <programreferencecode>6890</programreferencecode>
    <amount>313175</amount>
  </document>
  <document>
    <docID>0915425</docID>
    <docDate>August 1, 2009</docDate>
    <docSource></docSource>
    <docText>AF: Small: Collaborative Research: Online Scheduling Algorithms for Networked Systems and Applications

   The Internet is now the world's dominant information infrastructure. Numerous requests from Internet users and their applications compete for shared resources in multiple ways. It is therefore critical to efficiently allocate limited network resources in order to provide high quality services. Improving the performance of the Internet in this manner has the potential to have extremely broad impact.     Resource management becomes even more challenging when mobile devices connecting to the Internet are considered. Designing efficient algorithms is difficult mainly due to the following factors: (1) diverse and unpredictable resource requests; (2) physical limitations on Internet links, on buffer space in network switches, on capacity of wireless channels, and on battery power in mobile devices.     This project aims to provide solutions for several fundamental algorithmic problems in networked systems and applications. Robust and insightful online algorithms will be developed for network switches forwarding prioritized packets and energy management in mobile devices. The objective is to understand the mathematical structure of these problems, to design elegant and easy-to implement online algorithms, to provide rigorous analysis on their performance bounds, and to integrate these algorithms into the real systems to achieve better performance.</docText>
    <keyword>algorithms</keyword>
    <division>CCF</division>
    <directorate>CSE</directorate>
    <award-instr>Standard Grant</award-instr>
    <programreferencecode>HPCC</programreferencecode>
    <keyword>network</keyword>
    <keyword>wireless</keyword>
    <programreferencecode>9218</programreferencecode>
    <state>NY</state>
    <fieldofapplication>0000912 Computer Science</fieldofapplication>
    <progmgr>Richard Beigel</progmgr>
    <organization>Columbia University</organization>
    <program>ALGORITHMS</program>
    <programelementcode>7926</programelementcode>
    <pi>Stein, Clifford</pi>
    <amount>167222</amount>
  </document>
  <document>
    <docID>0915418</docID>
    <docDate>August 1, 2009</docDate>
    <docSource></docSource>
    <docText>SHF: Small: Collaborative Research: Design of Power and Area Efficient, Fault-tolerant Network-on-Chip Circuits and Architectures

   "This award is funded under the American Recovery and Reinvestment Act of 2009 (Public Law 111-5)."    The proliferation of multiple cores on the same die has given rise to communication-centric systems, wherein the design of the interconnection network has become extremely important. To address the growing wire delay problems and improve performance in CMP architectures, a growing number of multi-core designs have adopted a more flexible, scalable, packet-switched architecture called Network-on-Chip (NoC). Of the several challenges facing current NoC designs, the three prominent ones are power dissipation, die area, and overall performance. In this research, we propose to develop energy-efficient, area-efficient, high-performance, and fault-tolerant NoCs by exploiting innovative technological (circuit) optimizations and architectural design space. On the technology side, we will develop and design novel circuit techniques that will achieve significant power savings, fault-tolerance and considerable reduction in area requirements. On the architectural side, we will develop novel NoC designs that incorporate the proposed circuit design techniques and further improve network performance. This research is an organized effort that will combine circuit analysis, architecture study, performance evaluation and design synthesis. We will develop a comprehensive NoC design platform which will analyze the trade-offs among various parameters of interest ? power, area and performance.    The success of this research is likely to have a significant impact on the design of NoC architectures for CMPs. The proposed research will tackle some of the major limitations of NoC design, namely power consumption and reliability, and will make significant advances in understanding the interplay between performance, energy, and reliability for NoC architectures. Realistic solutions to these problems will provide the ability to continue the improvements in computational performance that the information technology sector of our economy depends on. This multi-disciplinary research will also play a major role in education by integrating discovery with teaching and training.</docText>
    <division>CCF</division>
    <directorate>CSE</directorate>
    <award-instr>Standard Grant</award-instr>
    <programreferencecode>HPCC</programreferencecode>
    <programreferencecode>9216</programreferencecode>
    <organization>Ohio University</organization>
    <state>OH</state>
    <keyword>network</keyword>
    <keyword>architecture</keyword>
    <programreferencecode>9218</programreferencecode>
    <fieldofapplication>0000912 Computer Science</fieldofapplication>
    <keyword>education</keyword>
    <progmgr>Chitaranjan Das</progmgr>
    <programreferencecode>9217</programreferencecode>
    <program>COMPUTER ARCHITECTURE</program>
    <programelementcode>7941</programelementcode>
    <programreferencecode>6890</programreferencecode>
    <pi>Kodi, Avinash</pi>
    <amount>134437</amount>
  </document>
  <document>
    <docID>0915400</docID>
    <docDate>September 1, 2009</docDate>
    <docSource></docSource>
    <docText>SHF: Small: Collaborative Research: Constraint-Based Generation of Database States for Testing Database Applications

   Testing is essential for database applications to function correctly and with acceptable performance when deployed. In practice, it is often necessary for vendors of database application software to test their software adequately before selling or integrating their software to the database owner. However, testing database applications is very costly. In particular, it is time-consuming and challenging to generate desirable database states, an important portion of test inputs for testing database applications. However, little research has been conducted to provide scalable, effective tool support for generating database states to achieve various testing objectives.    This research aims to adequately generate database states for database applications by developing novel techniques for (1) generating desirable database states to satisfy the given constraints on result sets from the given query, (2) applying this preceding technique on a variety of testing tasks, and (3) exploring more complicated situations such as constraints in multiple interacting queries. The research advances understanding of fundamental issues related to testing database applications and the design and implementation of practical techniques to carry out such testing. Among the broader impacts of the project includes integration of the research into education programs and enhancement of teaching and research infrastructure.</docText>
    <division>CCF</division>
    <directorate>CSE</directorate>
    <award-instr>Standard Grant</award-instr>
    <programreferencecode>HPCC</programreferencecode>
    <programreferencecode>9216</programreferencecode>
    <programreferencecode>9218</programreferencecode>
    <fieldofapplication>0000912 Computer Science</fieldofapplication>
    <organization>North Carolina State University</organization>
    <state>NC</state>
    <keyword>education</keyword>
    <keyword>database</keyword>
    <progmgr>Sol J. Greenspan</progmgr>
    <programreferencecode>9217</programreferencecode>
    <program>SOFTWARE ENG &amp; FORMAL METHODS</program>
    <programelementcode>7944</programelementcode>
    <pi>Xie, Tao</pi>
    <amount>249880</amount>
  </document>
  <document>
    <docID>0915389</docID>
    <docDate>July 1, 2009</docDate>
    <docSource></docSource>
    <docText>CIF:Small:Collaborative Research: Towards a Paradigm-shift in Distributed Information Processing: Harnessing Group-structure and Interaction

   "This award is funded under the American Recovery and Reinvestment Act of 2009    (Public Law 111-5)."      With a vision to fully realize the potential of next generation    communication network infrastructure based on ubiquitous sensor nodes,    this research introduces new architectures and strategies, for    distributed in-network information processing, which directly harness:    the structure of the objective performance metrics for information    processing, the structure of the underlying statistical dependencies    in the information gathered by sensing nodes, the topology of the    network, and the capability for bidirectional interactive information    exchange. This research advocates a two-fold paradigm shift in network    information processing: 1) a shift from the traditional goal of data    transport to the goal of function computation and 2) a shift from    unidirectional models of information flow to interactive information    flow models. This research supports the education of future scientists    and engineers by integrating research advances with curriculum    development and supports diversity by encouraging the participation of    women and under-represented groups.        This research develops two fundamentally new classes of code ensembles    for interactive information processing. The first is based on    techniques from abstract algebra and random graph theory to capture    the structure of functions being computed at destinations. The second    is based on techniques from communication complexity and multiterminal    information theory to capture interactive structures of information    flow in the network. These new code classes have superseded the    performance of random code ensembles used in network information    theory since its inception. This research develops new analytical    frameworks and tools to uncover the fundamental performance limits of    interactive information processing in sensor networks.  This research    facilitates the cross-pollination of research fields by providing    components which build bridges between four fundamental areas, namely,    information and coding theory, abstract algebra, random graph theory,    and communication complexity theory.</docText>
    <division>CCF</division>
    <directorate>CSE</directorate>
    <award-instr>Standard Grant</award-instr>
    <programreferencecode>HPCC</programreferencecode>
    <state>MA</state>
    <keyword>network</keyword>
    <programreferencecode>9218</programreferencecode>
    <progmgr>John Cozzens</progmgr>
    <fieldofapplication>0000912 Computer Science</fieldofapplication>
    <amount>249999</amount>
    <keyword>ubiquitous</keyword>
    <keyword>education</keyword>
    <keyword>vision</keyword>
    <organization>Trustees of Boston University</organization>
    <pi>Ishwar, Prakash</pi>
    <program>SENSOR NETWORKS</program>
    <programelementcode>7938</programelementcode>
    <programreferencecode>6890</programreferencecode>
  </document>
  <document>
    <docID>0915388</docID>
    <docDate>September 1, 2009</docDate>
    <docSource></docSource>
    <docText>AF:Small:Collaborative Research: Algorithmic Problems in Protein Structure Studies

   The research involves the design and analysis of efficient algorithms for fundamental problems that arise in studies of the three-dimensional structures of proteins. Graph-theoretic problems underlie these studies, since protein structures are naturally (and sufficiently) represented by graphs that have vertices for the individual amino acid residues and edges between close pairs. However, graph-theoretic formalisms lead to computationally hard optimization problems, further complicated by extensive amounts of noise in experimental data. Motivated by specific challenges in nuclear magnetic resonance spectroscopy and other protein structure studies, the project addresses two significant algorithmic problems: identifying correspondences between a pair of graphs where one is a significantly corrupted version of the other, and determining three-dimensional coordinates for the vertices of a graph, given approximate, noisy distance measurements for its edges.     The first algorithmic problem is a form of graph matching, and the project focuses on developing efficient search algorithms to uncover correspondences, with random graph models to rigorously analyze the algorithms and study threshold phenomena characterizing robustness to noise. In an application to analysis of NMR data, one of the graphs represents the protein and the other the data, a noisy, ambiguous set of atomic interactions; the goal is to match the NMR-identified interactions with specific atomic interactions in the protein. The second algorithmic problem is Euclidean embedding for sparse geometric graphs, and the research involves development of algorithms to render such graphs amenable to low rank distance matrix reconstruction methods, generalizing the reconstruction methods to exploit the underlying geometric structure and account for the confounding noise structure. In the NMR setting, the graph represents NMR-probed through-space atomic interactions, and the goal is to compute structures consistent with the experimental data and biophysical constraints. Both problems are fundamental to numerous other significant applications in protein structure studies.</docText>
    <keyword>algorithms</keyword>
    <division>CCF</division>
    <directorate>CSE</directorate>
    <award-instr>Standard Grant</award-instr>
    <programreferencecode>HPCC</programreferencecode>
    <programreferencecode>9216</programreferencecode>
    <programreferencecode>9218</programreferencecode>
    <fieldofapplication>0000912 Computer Science</fieldofapplication>
    <programreferencecode>9150</programreferencecode>
    <organization>Dartmouth College</organization>
    <state>NH</state>
    <programreferencecode>9217</programreferencecode>
    <amount>224999</amount>
    <progmgr>Tatsuya Suda</progmgr>
    <program>BIO COMPUTING</program>
    <programelementcode>7946</programelementcode>
    <pi>Bailey-Kellogg, Christopher</pi>
  </document>
  <document>
    <docID>0915374</docID>
    <docDate>September 1, 2009</docDate>
    <docSource></docSource>
    <docText>NetSE: Small: Cooperation and Security for Opportunistic-Coding-based Wireless Networks

   This award is funded under the American Recovery and Reinvestment Act of 2009 (Public Law 111-5).    A recently developed technology, called opportunistic coding, can greatly improve the e±ciency of wireless networks. However, the problems of cooperation and security in opportunistic-coding-based (OCB) wireless networks have not received su±cient attention. Here cooperation problems  are the problems introduced by the existence of sel¯sh nodes in the wireless networks, while security problems are the problems introduced by the existence of adversarial nodes. This work is to design and implement solutions that can provide cooperation and security guarantees for OCB wireless networks. The research work can be divided into studied of three problem areas, namely the cooperation problems, the security problems, and the interplays of  cooperation and security. The work also includes the dissemination of related knowledge to students at various levels.    Intellectual Merit: The results of this work will signi¯cantly improve OCB wireless networks in terms of cooperation and security. Furthermore, these results will also have broader theoretical interests, because a part of the techniques to be developed will be applicable to economic incentives  problems in other settings as well.    Broader Impacts: First, the developed technical solutions will bene¯t the society because they make it possible to widely deploy OCB wireless networks to environments with sel¯sh or adversarial nodes. Second, the educational component of this work will build capacity in cooperation and security at various levels.</docText>
    <division>CCF</division>
    <directorate>CSE</directorate>
    <award-instr>Standard Grant</award-instr>
    <programreferencecode>HPCC</programreferencecode>
    <keyword>security</keyword>
    <keyword>wireless</keyword>
    <programreferencecode>9218</programreferencecode>
    <state>NY</state>
    <fieldofapplication>0000912 Computer Science</fieldofapplication>
    <progmgr>Eun K. Park</progmgr>
    <organization>SUNY at Buffalo</organization>
    <programreferencecode>6890</programreferencecode>
    <program>NETWORK SCIENCE &amp; ENGINEERING</program>
    <programelementcode>7794</programelementcode>
    <programreferencecode>7794</programreferencecode>
    <programreferencecode>7923</programreferencecode>
    <pi>Zhong, Sheng</pi>
    <amount>304179</amount>
  </document>
  <document>
    <docID>0915307</docID>
    <docDate>July 1, 2009</docDate>
    <docSource></docSource>
    <docText>CIF: Small:Compressive-Projection Principal Component Analysis

   "This award is funded under the American Recovery and Reinvestment Act of 2009  (Public Law 111-5)."    Principal component analysis (PCA) has long played a central role in dimensionality reduction and compression. However, the fact that PCA is a data-dependent transform that is traditionally determined via a computationally expensive eigendecomposition often hinders its use in severely resource-constrained settings. Hyperspectral imagery is a prime example---although PCA offers excellent decorrelation and dimensionality reduction when applied spectrally to hyperspectral image volumes, the fact that many hyperspectral sensors are airborne or spaceborne devices limits wider use of PCA. In such applications, it would be greatly beneficial if PCA-based dimensionality reduction and compression could be accomplished without the heavy encoder-side cost entailed by traditional PCA. This research investigates a process that effectively shifts the computational burden of PCA from the resource-constrained encoder to a more capable base-station decoder.    The studied approach, compressive-projection PCA (CPPCA), is driven by projections at the sensor onto lower-dimensional subspaces chosen at random, while the CPPCA decoder, given only these random projections, recovers not only the coefficients associated with the PCA transform, but also an approximation to the PCA transform basis itself. By using encoder-side random projections, CPPCA permits dimensionality reduction to be integrated directly with signal acquisition such that explicit computation of dimensionality reduction at the encoder is eliminated.   Computation and memory burdens are instead shifted to the CPPCA decoder which consists of a novel eigenvector-reconstruction process based on a convex-set optimization driven by Ritz vectors within the projected subspaces. Research activities are aimed at further understanding CPPCA both analytically and practically, including the exploration of CPPCA in data arising in geospatial applications, and the development of adaptations to the basic CPPCA process so as to improve performance on anomalous data.</docText>
    <division>CCF</division>
    <directorate>CSE</directorate>
    <award-instr>Standard Grant</award-instr>
    <programreferencecode>HPCC</programreferencecode>
    <organization>Mississippi State University</organization>
    <state>MS</state>
    <programreferencecode>9218</programreferencecode>
    <progmgr>John Cozzens</progmgr>
    <fieldofapplication>0000912 Computer Science</fieldofapplication>
    <programreferencecode>9150</programreferencecode>
    <program>SIGNAL PROCESSING</program>
    <programelementcode>7936</programelementcode>
    <pi>Fowler, James</pi>
    <programreferencecode>6890</programreferencecode>
    <amount>423119</amount>
  </document>
  <document>
    <docID>0915302</docID>
    <docDate>September 1, 2009</docDate>
    <docSource></docSource>
    <docText>SHF: Small: Collaborative Research: Using Identified Circuit Invariance for Online error Detection

   Ensuring reliable computation at the nanoscale requires mechanisms to detect errors. The PIs propose fundamental research for developing efficient hardware techniques to support online error detection and manufacturing test by monitoring invariant relationships.	These invariant relationships naturally occur across multiple levels of digital logic and across multiple time cycles.	Violations of these relationships indicate that errors have occurred, either because of transient faults or manufacturing defects; thus monitoring them in hardware can significantly improve circuit reliability.  While other techniques exist for error detection, this approach has several advantages, including significantly lower power dissipation, no high-level information requirements, fine-grained optimization capabilities, and providing a potentially powerful source of diagnostic information.  A key challenge in this project is the efficient selection of an optimal set of implications to include in the hardware, such that desired reliability is obtained with low overhead.    Reliable operation of logic devices is key for the continued push for smaller and faster electronic circuits. Any benefit in performance and power brought forth by rapid scaling of transistors cannot be fully realized if high reliability cannot be guaranteed for systems composed of these devices. The proposed research is a collaborative effort between Brown and Bucknell Universities. The project involves undergraduate students, many of whom are women and under-represented minorities. The PIs will use this project to create new opportunities to expose undergraduates to research, and to develop outreach workshops to encourage women and under-represented minorities to pursue degrees in computing.</docText>
    <division>CCF</division>
    <directorate>CSE</directorate>
    <award-instr>Standard Grant</award-instr>
    <programreferencecode>HPCC</programreferencecode>
    <programreferencecode>9216</programreferencecode>
    <programreferencecode>9218</programreferencecode>
    <fieldofapplication>0000912 Computer Science</fieldofapplication>
    <state>RI</state>
    <progmgr>Sankar Basu</progmgr>
    <programreferencecode>9150</programreferencecode>
    <organization>Brown University</organization>
    <programreferencecode>9217</programreferencecode>
    <copi>Ruth Bahar</copi>
    <program>DES AUTO FOR MICRO &amp; NANO SYST</program>
    <programelementcode>7945</programelementcode>
    <pi>Dworak, Jennifer</pi>
    <amount>411614</amount>
  </document>
  <document>
    <docID>0915299</docID>
    <docDate>July 1, 2009</docDate>
    <docSource></docSource>
    <docText>CIF: Small: Collaborative Research: Signal Design for Low-Complexity Active Sensing

   Abstract    "This award is funded under the American Recovery and Reinvestment Act of 2009  (Public Law 111-5)."    This research program is motivated by the recognition that the volume of sensor data is expected to overwhelm even the enormous performance improvements in silicon technology expressed by Moore's Law. The focus is the development of a low-complexity alternative to non-adaptive image formation through innovations in signal design. The objectives support closer monitoring of weather patterns and may lead to a more detailed understanding of climate change. They also impact a wider range of surveillance applications from microwave landing systems to through-wall imaging. The research program is highly interdisciplinary with signal processing as the bridge between application domains and the mathematics of sequence design.  Current hardware allows transmission of wavefields that vary across space, polarization, time and frequency and which can be changed in rapid succession. However, sensing resolution is limited, not by hardware, but by the complexity of remote image formation. This research program develops new signal design principles that enable fast and reliable active sensing with minimal receiver signal processing complexity. The basic unit of transmission is a unitary matrix of phase coded waveforms indexed by array element and by pulse repetition interval, where the polarization of constituent waveforms may vary. Golay Complementary waveforms appear as entries of these matrices. Appropriate sequencing of unitary waveform matrices in time eliminates Doppler induced range sidelobes and provides resilience to multipath without compromising the simplicity of signal processing. OFDM signaling of complementary waveforms improves performance beyond conventional matched filtering by introducing nonlinear signal processing that exchanges static sidelobes for more dynamic cross-terms. The development of a new mathematical framework based on group theory enables the systematic construction of new complementary sequences.</docText>
    <division>CCF</division>
    <directorate>CSE</directorate>
    <award-instr>Standard Grant</award-instr>
    <programreferencecode>HPCC</programreferencecode>
    <state>NJ</state>
    <programreferencecode>9218</programreferencecode>
    <progmgr>John Cozzens</progmgr>
    <fieldofapplication>0000912 Computer Science</fieldofapplication>
    <organization>Princeton University</organization>
    <amount>160000</amount>
    <program>WIRELESS COMM &amp; SIGNAL PROCESS</program>
    <programelementcode>7939</programelementcode>
    <programreferencecode>6890</programreferencecode>
    <pi>Calderbank, Arthur</pi>
  </document>
  <document>
    <docID>0915259</docID>
    <docDate>September 15, 2009</docDate>
    <docSource></docSource>
    <docText>SHF: Small: Data Learning Framework for Diagnosis Based Yield Optimization

   ABSTRACT  In the semiconductor industry, manufacturing yield, measured as the percentage of salable products produced, is a key metric that determines the financial success of a product line. Low yield translates into increased design cost, delayed time-to-market, and reduced productivity. When low yield occurs, tremendous engineering resources are spent to diagnose and resolve the problems.   This project proposes to develop a novel data learning framework that greatly improves the efficiency and effectiveness of the diagnosis and resolution process. The framework consists of a newly developed software infrastructure that interfaces with the existing Electronic Design Automation (EDA) and silicon test software infrastructures, through the design and silicon test data they produce.  A collection of data learning software tools and methodologies that analyze said data are utilized to automatically extract knowledge for yield improvement.     The research is integrated with educational activities to develop course and tutorial materials released to the industry for broad impact, a state-of-the-art laboratory for education, and a research program to attract undergraduate and underrepresented students. The research strives to achieve a comprehensive understanding of state-of-the-art design and manufacturing practices including anticipated issues in the future, and to accomplish multidisciplinary studies merging knowledge from EDA, silicon test, data mining, and machine learning. Knowledge discovered through this research will provide the industry with a clear direction on where to invest resources to better cope with yield related issues in future ultra nanometer manufacturing technologies. The framework is designed to efficiently improve yield, which helps improve productivity in the semiconductor design industry.</docText>
    <division>CCF</division>
    <directorate>CSE</directorate>
    <award-instr>Standard Grant</award-instr>
    <programreferencecode>HPCC</programreferencecode>
    <programreferencecode>9216</programreferencecode>
    <programreferencecode>9218</programreferencecode>
    <state>CA</state>
    <fieldofapplication>0000912 Computer Science</fieldofapplication>
    <organization>University of California-Santa Barbara</organization>
    <progmgr>Sankar Basu</progmgr>
    <keyword>education</keyword>
    <keyword>machine learning</keyword>
    <keyword>data mining</keyword>
    <programreferencecode>9217</programreferencecode>
    <amount>330000</amount>
    <pi>Wang, Li-Chung</pi>
    <program>DES AUTO FOR MICRO &amp; NANO SYST</program>
    <programelementcode>7945</programelementcode>
  </document>
  <document>
    <docID>0915251</docID>
    <docDate>August 15, 2009</docDate>
    <docSource></docSource>
    <docText>AF: Small: Spectral analysis, spectral algorithms, and beyond

   TITLE:  Spectral analysis, spectral algorithms, and beyond        Spectral algorithms and spectral analysis form the basis for some of the most efficient and effective techniques in areas ranging from machine learning to scientific computing, from graphics to data mining, and from collaborative filtering to VLSI design.  They also play a prominent role in combinatorial optimization, where they are used in algorithms for graph partitioning and constraint satisfaction.      Despite the apparent utility of spectral techniques and the intense effort devoted to their analysis, our ability to reason about them rigorously is still very limited.  This project addresses the development of an algorithmically-centered theory of spectral analysis which draws upon tools from contemporary mathematics, and is inspired by experimental evidence which has, so far, eluded a satisfactory theoretical explanation.  The project also addresses the relative power of spectral methods from the viewpoint of computational complexity.  This involves the both the study of what cannot be done using only information about eigenvalues and eigenvectors, as well as what can be achieved by combining spectral analysis with classical combinatorial approaches, like computation of graph flows.</docText>
    <keyword>algorithms</keyword>
    <division>CCF</division>
    <directorate>CSE</directorate>
    <award-instr>Standard Grant</award-instr>
    <programreferencecode>HPCC</programreferencecode>
    <programreferencecode>9218</programreferencecode>
    <fieldofapplication>0000912 Computer Science</fieldofapplication>
    <keyword>vlsi</keyword>
    <keyword>graphics</keyword>
    <keyword>scientific computing</keyword>
    <organization>University of Washington</organization>
    <state>WA</state>
    <keyword>machine learning</keyword>
    <keyword>data mining</keyword>
    <amount>500000</amount>
    <progmgr>Lenore M. Mullin</progmgr>
    <program>NUM, SYMBOL, &amp; ALGEBRA COMPUT</program>
    <programelementcode>7933</programelementcode>
    <pi>Lee, James</pi>
  </document>
  <document>
    <docID>0915157</docID>
    <docDate>September 1, 2009</docDate>
    <docSource></docSource>
    <docText>TC: Small: Collaborative Research: Securing Multilingual Software Systems

   Most real software systems consist of modules developed in  multiple programming languages. Different languages differ in their  security assumptions and guarantees. Consequently, even if single  modules are secure in some language model and with respect to some  security policy, there is usually no uniform security guarantee on a  whole multilingual system.  This project focuses on low-overhead  techniques for providing security guarantees to software systems in  which type-safe languages such as Java interoperate with native code.  Native code is developed in low-level languages including C, C++, and  assembly languages.  Although often used in software projects, native  code is notoriously insecure and is a rich source of security  vulnerabilities.  The PIs are developing a two-layered approach to  alleviating security threats posed by native code to type-safe  languages: (1) Binary rewriting tools and their verifiers are being  incorporated into the Java Virtual Machine (JVM) for rewriting and  verifying native modules at the machine-instruction level to enforce  security policies; (2) A safe dialect of C for interoperation with  Java is being designed; with the help of programmer annotations, the  safety of programs in this dialect can be statically verified.  The  outcome of this project will enable popular platforms such as the JVM  and .NET and other major programming languages (e.g., Python, OCaml,  etc.) to incorporate native modules safely.  The developed principles  will also be applicable to web browsers and operating systems in which  there is a need of extending them with untrusted low-level modules  without comprising host security.</docText>
    <division>CCF</division>
    <directorate>CSE</directorate>
    <award-instr>Standard Grant</award-instr>
    <programreferencecode>HPCC</programreferencecode>
    <keyword>security</keyword>
    <programreferencecode>9218</programreferencecode>
    <state>PA</state>
    <keyword>operating systems</keyword>
    <keyword>programming languages</keyword>
    <organization>Lehigh University</organization>
    <program>PROGRAMMING LANGUAGES</program>
    <programelementcode>7943</programelementcode>
    <program>TRUSTWORTHY COMPUTING</program>
    <progmgr>Lenore D. Zuck</progmgr>
    <programelementcode>7795</programelementcode>
    <programreferencecode>7923</programreferencecode>
    <pi>Tan, Gang</pi>
    <amount>265048</amount>
  </document>
  <document>
    <docID>0915155</docID>
    <docDate>August 15, 2009</docDate>
    <docSource></docSource>
    <docText>AF: Small: Logic and Computational Complexity

   Logic attempts to describe the nature of sentences that have descriptions in some restricted format.  Computational complexity investigates the number of steps needed on a computer to solve a given mathematical problem. Despite the seemingly disjoint nature of the topics, Logic and Computational Complexity have had a rich history of interactions in the past.  Fagin's classical theorem giving a logical definition of NP is probably one of the first connections in the area.  Other celebrated results in the nexus of finite logic and computational complexity include the Immerman-Szelepsenyi theorem showing non-deterministic logspace is closed under complementation; and Ajtai's work on certain formulae on finite structures, which shows that parity is not first-order definable (which turns out to be equivalent to Furst, Saxe, and Sipser's result that parity does not have constant depth, polynomial size circuits).  These results have advanced logic as well as computational complexity.    This research project is inspired by recent work by the student investigators on this project, Swastik Kopparty and Ben Rossman who have unearthed new connections between these areas leading to several new results.  This project outlines novel further questions in the intersection of logic and computational complexity and outlines methods that may be employed to make progress on these questions.  Some specific questions include:    - Size lower bounds for uniform logarithmic depth circuits.  - Explicit functions that are hard for first-order logic augmented with arbitrary modular counting quantifiers (modulo composites in particular).  - Choiceless algorithms for solving linear systems.  - Decidability of the containment problem for conjunctive queries under multiset semantics.</docText>
    <keyword>algorithms</keyword>
    <division>CCF</division>
    <directorate>CSE</directorate>
    <award-instr>Standard Grant</award-instr>
    <programreferencecode>HPCC</programreferencecode>
    <organization>Massachusetts Institute of Technology</organization>
    <state>MA</state>
    <programreferencecode>9218</programreferencecode>
    <fieldofapplication>0000912 Computer Science</fieldofapplication>
    <progmgr>Richard Beigel</progmgr>
    <pi>Sudan, Madhu</pi>
    <program>COMPLEXITY &amp; CRYPTOGRAPHY</program>
    <programelementcode>7927</programelementcode>
    <amount>153180</amount>
  </document>
  <document>
    <docID>0915145</docID>
    <docDate>July 15, 2009</docDate>
    <docSource></docSource>
    <docText>The game dynamics of social interaction: Algorithms and applications

   This project aims at developing mathematical models to describe the dynamics of large populations of interacting strategic agents.  Detailed data concerning such phenomena are becoming increasingly available thanks to the unprecedented success of online social networks.  Game-theoretic models provide a flexible mathematical framework and Nash equilibria should describe the long term behavior of such models.  This research addresses several fundamental problems with this approach: Which of multiple Nash equilibria is selected?  How rapidly does a system converge to such an equilibrium?  How can one influence these dynamics?  Leveraging recent advances in theoretical computer science, efficient algorithms will be developed to answer such questions.    The expression "social network" refers to a population of individuals together with their one-to-one social relationships (which can be of personal or economic nature).  It is clear that the structure of such a network deeply affects the behavior of society as a whole (in particular, from the economic point of view).  This intuition has never become practical or quantitative due to the lack of detailed data on the structure and dynamics of social networks.  The Internet, and in particular the success of online social networking is dramatically changing this situation.  This project aims at developing mathematical models and algorithms urgently needed to harness this data explosion.  It will open the way to the application of economic analysis tools to this new arena, and thus facilitate new ways of exploiting online networks.</docText>
    <keyword>algorithms</keyword>
    <division>CCF</division>
    <directorate>CSE</directorate>
    <award-instr>Standard Grant</award-instr>
    <programreferencecode>HPCC</programreferencecode>
    <keyword>network</keyword>
    <programreferencecode>9218</programreferencecode>
    <state>CA</state>
    <fieldofapplication>0000912 Computer Science</fieldofapplication>
    <keyword>networking</keyword>
    <organization>Stanford University</organization>
    <progmgr>Tracy J. Kimbrel</progmgr>
    <program>COMPUT GAME THEORY &amp; ECON</program>
    <programelementcode>7932</programelementcode>
    <copi>Amin Saberi</copi>
    <pi>Montanari, Andrea</pi>
    <amount>499837</amount>
  </document>
  <document>
    <docID>0915059</docID>
    <docDate>September 1, 2009</docDate>
    <docSource></docSource>
    <docText>SHF: Small: Collaborative Research: Constraint-Based Generation of Database States for Testing Database Applications

   Testing is essential for database applications to function correctly and with acceptable performance when deployed. In practice, it is often necessary for vendors of database application software to test their software adequately before selling or integrating their software to the database owner. However, testing database applications is very costly. In particular, it is time-consuming and challenging to generate desirable database states, an important portion of test inputs for testing database applications. However, little research has been conducted to provide scalable, effective tool support for generating database states to achieve various testing objectives.    This research aims to adequately generate database states for database applications by developing novel techniques for (1) generating desirable database states to satisfy the given constraints on result sets from the given query, (2) applying this preceding technique on a variety of testing tasks, and (3) exploring more complicated situations such as constraints in multiple interacting queries. The research advances understanding of fundamental issues related to testing database applications and the design and implementation of practical techniques to carry out such testing. Among the broader impacts of the project includes integration of the research into education programs and enhancement of teaching and research infrastructure.</docText>
    <division>CCF</division>
    <directorate>CSE</directorate>
    <award-instr>Standard Grant</award-instr>
    <programreferencecode>HPCC</programreferencecode>
    <programreferencecode>9216</programreferencecode>
    <programreferencecode>9218</programreferencecode>
    <fieldofapplication>0000912 Computer Science</fieldofapplication>
    <state>NC</state>
    <keyword>education</keyword>
    <keyword>database</keyword>
    <progmgr>Sol J. Greenspan</progmgr>
    <programreferencecode>9217</programreferencecode>
    <organization>University of North Carolina at Charlotte</organization>
    <program>SOFTWARE ENG &amp; FORMAL METHODS</program>
    <programelementcode>7944</programelementcode>
    <pi>Wu, Xintao</pi>
    <amount>203729</amount>
  </document>
  <document>
    <docID>0915030</docID>
    <docDate>September 1, 2009</docDate>
    <docSource></docSource>
    <docText>TC: Small: Collaborative Research: Securing Multilingual Software Systems

   Most real software systems consist of modules developed in  multiple programming languages. Different languages differ in their  security assumptions and guarantees. Consequently, even if single  modules are secure in some language model and with respect to some  security policy, there is usually no uniform security guarantee on a  whole multilingual system.  This project focuses on low-overhead  techniques for providing security guarantees to software systems in  which type-safe languages such as Java interoperate with native code.  Native code is developed in low-level languages including C, C++, and  assembly languages.  Although often used in software projects, native  code is notoriously insecure and is a rich source of security  vulnerabilities.  The PIs are developing a two-layered approach to  alleviating security threats posed by native code to type-safe  languages: (1) Binary rewriting tools and their verifiers are being  incorporated into the Java Virtual Machine (JVM) for rewriting and  verifying native modules at the machine-instruction level to enforce  security policies; (2) A safe dialect of C for interoperation with  Java is being designed; with the help of programmer annotations, the  safety of programs in this dialect can be statically verified.  The  outcome of this project will enable popular platforms such as the JVM  and .NET and other major programming languages (e.g., Python, OCaml,  etc.) to incorporate native modules safely.  The developed principles  will also be applicable to web browsers and operating systems in which  there is a need of extending them with untrusted low-level modules  without comprising host security.</docText>
    <division>CCF</division>
    <directorate>CSE</directorate>
    <award-instr>Standard Grant</award-instr>
    <programreferencecode>HPCC</programreferencecode>
    <state>MA</state>
    <keyword>security</keyword>
    <programreferencecode>9218</programreferencecode>
    <keyword>operating systems</keyword>
    <keyword>programming languages</keyword>
    <organization>Harvard University</organization>
    <pi>Morrisett, J. Gregory</pi>
    <program>TRUSTWORTHY COMPUTING</program>
    <progmgr>Lenore D. Zuck</progmgr>
    <programelementcode>7795</programelementcode>
    <programreferencecode>7923</programreferencecode>
    <amount>215083</amount>
  </document>
  <document>
    <docID>0915016</docID>
    <docDate>September 1, 2009</docDate>
    <docSource></docSource>
    <docText>HCC: Small: Incentive-Compatible Machine Learning

   Computational mechanism design has been highly successful in providing a theoretical and practical framework for coordinated decision making in systems with multiple, self-interested agents. A key property introduced within mechanism design theory is that of "incentive-compatibility," namely that it is an agent's best interest to truthfully reveal private information about its preferences for different outcomes even in settings of strategic interdependence. However, there has been relatively little attention given to the use of incentive mechanisms for the purpose of coordinating computational processes, where the inputs to the computation are distributed across agents.  The focus of this project is on the problem of incentive-compatible learning, where the private information of agents represents "training data" and the design goal is to allow the system to collectively learn from the distributed experience that this information represents.    The research seeks mechanisms that promote learning with self-interested agents that is just as effective as it would be with cooperative agents, and to otherwise understand when this is not possible. It will provide a new bridge between mechanism design theory and computer science. The research is centered around three themes: (1) incentive-compatible reinforcement learning, where the design goal is to quickly learn an optimal policy for the entire state space when each agent has private information about the rewards for some subset of the state space and may misreport them; (2) incentive-compatible supervised learning, where each agent has private knowledge of a set of labeled training examples and the design goal is to learn a hypothesis that minimizes global error despite agents' ability to misreport training data; (3) incentive-compatible information aggregation, where each agent has a subjective belief about the probability of some uncertain events and participates in a mechanism to capitalize on its information, and the design goal is to achieve online aggregation of information despite the intrinsic self-interest of agents. This project has the potential for broad spillover benefits to societal, engineering, and business settings where learning is performed with self-interested agents.</docText>
    <division>CCF</division>
    <directorate>CSE</directorate>
    <award-instr>Standard Grant</award-instr>
    <programreferencecode>HPCC</programreferencecode>
    <state>MA</state>
    <programreferencecode>9218</programreferencecode>
    <fieldofapplication>0000912 Computer Science</fieldofapplication>
    <keyword>machine learning</keyword>
    <organization>Harvard University</organization>
    <progmgr>Tracy J. Kimbrel</progmgr>
    <amount>500000</amount>
    <program>COMPUT GAME THEORY &amp; ECON</program>
    <programelementcode>7932</programelementcode>
    <programreferencecode>7923</programreferencecode>
    <pi>Parkes, David</pi>
    <copi>Yiling Chen</copi>
  </document>
  <document>
    <docID>0914981</docID>
    <docDate>September 1, 2009</docDate>
    <docSource></docSource>
    <docText>SHF:Small:Parallel ILP-Based Global Routing on A Grid of Multi-Cores

   Design of today's electronic systems would not be possible without the tools that automate the process of integrating billions of nano-scale components--e.g. into the "brain" of an iPhone. As technology advances towards mobile devices that are smaller yet more powerful, these tools need to evolve as fast as the systems that they help design--in fact faster, because the nano-scale components not only grow in numbers but also shrink in size, bringing along with them new challenges.    To improve existing design-aid tools, a new window of opportunity has arisen due to the emergence of a more powerful yet affordable computational platform: a network of multi-core computers working together as if it were one enormous machine. By leveraging this platform the proposed research investigates alternative design automation strategies which traditionally were deemed to be too time-consuming.     The focus of the research is to improve an important step of the design process known as global routing, the step in which designers plan how the billions of nano-scale components will be interconnected on the chip. This planning can significantly impact the severity of many issues in subsequent stages of the design cycle, yet it has to be done quickly. With the aid of large-scale parallelism provided by grids, the research aims to demonstrate that the use of a computational technique called integer programming, which was previously viewed as too time-consuming for global routing, can help generate significantly higher quality solutions while meeting practical runtime requirements.    Successful completion of the research contributes to faster delivery of electronic products to market with lower design cost, resulting in stronger businesses that can initiate new projects in the technology sector, and hence in the creation of more jobs.</docText>
    <division>CCF</division>
    <directorate>CSE</directorate>
    <award-instr>Standard Grant</award-instr>
    <programreferencecode>HPCC</programreferencecode>
    <programreferencecode>9216</programreferencecode>
    <keyword>network</keyword>
    <programreferencecode>9218</programreferencecode>
    <fieldofapplication>0000912 Computer Science</fieldofapplication>
    <state>WI</state>
    <progmgr>Sankar Basu</progmgr>
    <organization>University of Wisconsin-Madison</organization>
    <programreferencecode>9217</programreferencecode>
    <amount>190000</amount>
    <program>DES AUTO FOR MICRO &amp; NANO SYST</program>
    <programelementcode>7945</programelementcode>
    <pi>Davoodi, Azadeh</pi>
  </document>
  <document>
    <docID>0914969</docID>
    <docDate>September 1, 2009</docDate>
    <docSource></docSource>
    <docText>Counting Problems and Dichotomy Theorems

   This project studies several classes of counting problems in computational complexity theory. These counting problems are naturally defined and include such counting problems as vertex covers, graph colorings, graph matchings etc. This framework for counting problems is called Holant Problems. Graph homomorphism is a special case and they are closely related to Constrained Satisfaction Problems.  One major new technique this project will bring to bear on these problems is holographic reductions and holographic algorithms.    This theory will be developed in terms of what function sets (signatures) are tractable and what lead to #P-hardness. The theory of Holant Problems will aim to prove complexity dichotomy theorems.  These theorems assert for every problem in a class of problems expressible in the framework, depending on the exact signature set, either the problem is tractable in P, or the problem is #P-hard.    The goal of computational complexity theory is to gain a fundamental understanding of the nature of efficient computation. This study will sharpen the boundary of what is and what is not efficiently computable.  Holographic reductions offer a novel technique. The proof techniques developed may also be broadly applicable in related areas of complexity theory.    There has been strong interest with the concept of holographic algorithms and holographic reductions (see "American Scientist" magazine, Jan-Feb 2008).  A sharper delineation between what is efficiently computable and what is not may also have broader implications. The new holographic reductions together with interpolations are likely to bring new perspectives to computational complexity.</docText>
    <keyword>algorithms</keyword>
    <division>CCF</division>
    <directorate>CSE</directorate>
    <award-instr>Standard Grant</award-instr>
    <programreferencecode>HPCC</programreferencecode>
    <programreferencecode>9218</programreferencecode>
    <fieldofapplication>0000912 Computer Science</fieldofapplication>
    <progmgr>Richard Beigel</progmgr>
    <state>WI</state>
    <organization>University of Wisconsin-Madison</organization>
    <pi>Cai, Jin-Yi</pi>
    <program>COMPLEXITY &amp; CRYPTOGRAPHY</program>
    <programelementcode>7927</programelementcode>
    <amount>397326</amount>
  </document>
  <document>
    <docID>0914956</docID>
    <docDate>August 1, 2009</docDate>
    <docSource></docSource>
    <docText>SHF: Small:Collaborative Research: Flexible, Efficient, and Trustworthy Proof Checking for Satisfiability Modulo Theories

   This award is funded under the American Recovery and Reinvestment Act of 2009   (Public Law 111-5).    Software bugs cost the U.S. economy over $60 billion each year.  Promising bug-detection technology depends on high-performance logic solvers for Satisfiability Modulo Theories (SMT), which employ sophisticated algorithms to check large formulas efficiently. Sophistication has a price:  the solvers themselves exhibit bugs, and are not trustworthy enough for safety-critical applications. To increase confidence, some SMT solvers can emit formal proofs for valid formulas. Checking these proofs with a simple proof checker confirms the solver's results. SMT's rich logic poses challenges for standardizing a single proof format for all SMT solvers. Furthermore, proofs produced by SMT solvers can be gigabytes long, requiring an optimized proof checker.     This collaborative project is developing a verified proof checker supporting a flexible format called the Edinburgh Logical Framework with Side Conditions (LFSC). LFSC is a meta-language for describing different proof systems, thus providing flexibility. Verification techniques are being applied to the proof checker itself to verify its optimizations, by writing it in a verified programming language called Guru. Support is also being added for LFSC proofs to the CVC3 solver. This research will greatly increase confidence in solver results through proofs, thus increasing the power of bug detection.</docText>
    <keyword>algorithms</keyword>
    <division>CCF</division>
    <directorate>CSE</directorate>
    <award-instr>Standard Grant</award-instr>
    <programreferencecode>HPCC</programreferencecode>
    <programreferencecode>9216</programreferencecode>
    <keyword>verification</keyword>
    <programreferencecode>9218</programreferencecode>
    <state>NY</state>
    <fieldofapplication>0000912 Computer Science</fieldofapplication>
    <progmgr>Sol J. Greenspan</progmgr>
    <organization>New York University</organization>
    <programreferencecode>9217</programreferencecode>
    <amount>150000</amount>
    <program>SOFTWARE ENG &amp; FORMAL METHODS</program>
    <programelementcode>7944</programelementcode>
    <pi>Barrett, Clark</pi>
    <programreferencecode>6890</programreferencecode>
  </document>
  <document>
    <docID>0914946</docID>
    <docDate>September 1, 2009</docDate>
    <docSource></docSource>
    <docText>TC: Small: Collaborative Research: Towards a Dynamic and Composable Model of Trust

   People rely on two types of trust when making everyday decisions:  vertical and horizontal trust. Vertical trust captures trust  relationships between individuals and institutions, while horizontal  trust represents the trust inferred from the observations and opinions  of other peers. Although significant benefit could be realized by  combining horizontal and vertical trust mechanisms, they have evolved  independently in computing systems.    This project focuses on developing a composable trust model capable of  tightly coupling vertical and horizontal trust in a manner that is  both amenable to formal analysis and efficiently deployable. This  research advances the state of the art in trust management through a  series of innovative results, including the design of a unified  framework for specifying composite trust policies and the design and  analysis of efficient algorithms for policy evaluation. The composite  trust management approach championed by this project also enables  policy authors to move beyond simple proof of compliance to identify  the "top-k" preferred users satisfying security policies including  subjective assessments. The beneficiaries of this research range from  administrators of traditional computing systems who can better  incorporate previous history into their decision-making processes, to  users in social networks who can more carefully manage the exposure of  their personal data.</docText>
    <keyword>algorithms</keyword>
    <division>CCF</division>
    <directorate>CSE</directorate>
    <award-instr>Standard Grant</award-instr>
    <programreferencecode>HPCC</programreferencecode>
    <keyword>security</keyword>
    <programreferencecode>9218</programreferencecode>
    <fieldofapplication>0000912 Computer Science</fieldofapplication>
    <organization>North Carolina State University</organization>
    <state>NC</state>
    <program>TRUSTWORTHY COMPUTING</program>
    <pi>Yu, Ting</pi>
    <progmgr>Lenore D. Zuck</progmgr>
    <amount>234334</amount>
    <programelementcode>7795</programelementcode>
    <programreferencecode>7923</programreferencecode>
  </document>
  <document>
    <docID>0914915</docID>
    <docDate>July 1, 2009</docDate>
    <docSource></docSource>
    <docText>CIF: Small: Collaborative Research: Signal Design for Low-Complexity Active Sensing

   Abstract    "This award is funded under the American Recovery and Reinvestment Act of 2009  (Public Law 111-5)."    This research program is motivated by the recognition that the volume of sensor data is expected to overwhelm even the enormous performance improvements in silicon technology expressed by Moore's Law. The focus is the development of a low-complexity alternative to non-adaptive image formation through innovations in signal design. The objectives support closer monitoring of weather patterns and may lead to a more detailed understanding of climate change. They also impact a wider range of surveillance applications from microwave landing systems to through-wall imaging. The research program is highly interdisciplinary with signal processing as the bridge between application domains and the mathematics of sequence design.  Current hardware allows transmission of wavefields that vary across space, polarization, time and frequency and which can be changed in rapid succession. However, sensing resolution is limited, not by hardware, but by the complexity of remote image formation. This research program develops new signal design principles that enable fast and reliable active sensing with minimal receiver signal processing complexity. The basic unit of transmission is a unitary matrix of phase coded waveforms indexed by array element and by pulse repetition interval, where the polarization of constituent waveforms may vary. Golay Complementary waveforms appear as entries of these matrices. Appropriate sequencing of unitary waveform matrices in time eliminates Doppler induced range sidelobes and provides resilience to multipath without compromising the simplicity of signal processing. OFDM signaling of complementary waveforms improves performance beyond conventional matched filtering by introducing nonlinear signal processing that exchanges static sidelobes for more dynamic cross-terms. The development of a new mathematical framework based on group theory enables the systematic construction of new complementary sequences.</docText>
    <division>CCF</division>
    <directorate>CSE</directorate>
    <award-instr>Standard Grant</award-instr>
    <programreferencecode>HPCC</programreferencecode>
    <programreferencecode>9218</programreferencecode>
    <progmgr>John Cozzens</progmgr>
    <organization>Purdue University</organization>
    <state>IN</state>
    <fieldofapplication>0000912 Computer Science</fieldofapplication>
    <pi>Zoltowski, Michael</pi>
    <program>WIRELESS COMM &amp; SIGNAL PROCESS</program>
    <programelementcode>7939</programelementcode>
    <programreferencecode>6890</programreferencecode>
    <amount>159999</amount>
  </document>
  <document>
    <docID>0914912</docID>
    <docDate>July 15, 2009</docDate>
    <docSource></docSource>
    <docText>CIF: NeTs Small: Collaborative Research: Distributed Spectrum Leasing via Cross-Layer Cooperation

   CIF: NeTS: Small: Collaborative research: Distributed Spectrum Leasing   via Cross-Layer Cooperation        ?Cognitive radio? networks, in which primary (licensed) and secondary (unlicensed) terminals coexist over the same bandwidth, are regarded as a promising solution to address spectral shortage and overcrowding. The main conventional approaches to enable such coexistence are: (i) Underlay/ overlay/ interweave strategies, which enforce strict constraints on the secondary behavior in order to avoid interference to the primary; and (ii) System-wide dynamic spectrum allocation. Both frameworks have significant drawbacks for implementation of large-scale distributed cognitive radio networks due to technological and theoretical limits on secondary spectrum sensing for (i) and on the stringent constraints on protocols and architectures for (ii).   To address the problems highlighted above, this research introduces and studies the novel framework of Distributed Spectrum Leasing via Cross-Layer Cooperation (DiSC) as a basic mechanism to guide the design of Medium Access Control/ Data Link (MAC/DL) - Physical (PHY) layer protocols in decentralized cognitive radio networks. According to this framework, dynamic ?leasing? of a transmission opportunity (e.g., a time-slot) from a primary node to a secondary terminal is performed locally as driven by primary needs in terms of given Quality-of-Service (QoS) measures at the MAC/DL-PHY layers. Specifically, DiSC enables each primary terminal to ?lease? a transmission opportunity to a local secondary terminal at MAC Protocol Data Unit (MPDU) granularity in exchange for cooperation (relaying). The project aims, on the one hand, at a theoretical understanding of the potentiality of the approach from the standpoints of network information theory and networking theory, and, on the other, at the (clean-slate and back-compatible) design of MAC/DL-PHY protocols that effectively implements DiSC in a complex wireless environment.   Keywords: Spectrum leasing, dynamic resource allocation, cognitive radio, cooperative transmission, cross-layer design, multi-hop wireless networks.</docText>
    <division>CCF</division>
    <directorate>CSE</directorate>
    <award-instr>Standard Grant</award-instr>
    <programreferencecode>HPCC</programreferencecode>
    <state>OH</state>
    <keyword>network</keyword>
    <keyword>wireless</keyword>
    <programreferencecode>9218</programreferencecode>
    <fieldofapplication>0000912 Computer Science</fieldofapplication>
    <keyword>networking</keyword>
    <organization>Ohio State University Research Foundation</organization>
    <progmgr>William H Tranter</progmgr>
    <program>COMM &amp; INFORMATION THEORY</program>
    <programelementcode>7935</programelementcode>
    <pi>Ekici, Eylem</pi>
    <amount>227465</amount>
  </document>
  <document>
    <docID>0914899</docID>
    <docDate>July 15, 2009</docDate>
    <docSource></docSource>
    <docText>CIF: NeTS:Small:Collaborative Research:Distributed Spectrum Leasing via Cross-Layer Cooperation

   CIF: NeTS: Small: Collaborative research: Distributed Spectrum Leasing   via Cross-Layer Cooperation        ?Cognitive radio? networks, in which primary (licensed) and secondary (unlicensed) terminals coexist over the same bandwidth, are regarded as a promising solution to address spectral shortage and overcrowding. The main conventional approaches to enable such coexistence are: (i) Underlay/ overlay/ interweave strategies, which enforce strict constraints on the secondary behavior in order to avoid interference to the primary; and (ii) System-wide dynamic spectrum allocation. Both frameworks have significant drawbacks for implementation of large-scale distributed cognitive radio networks due to technological and theoretical limits on secondary spectrum sensing for (i) and on the stringent constraints on protocols and architectures for (ii).   To address the problems highlighted above, this research introduces and studies the novel framework of Distributed Spectrum Leasing via Cross-Layer Cooperation (DiSC) as a basic mechanism to guide the design of Medium Access Control/ Data Link (MAC/DL) - Physical (PHY) layer protocols in decentralized cognitive radio networks. According to this framework, dynamic ?leasing? of a transmission opportunity (e.g., a time-slot) from a primary node to a secondary terminal is performed locally as driven by primary needs in terms of given Quality-of-Service (QoS) measures at the MAC/DL-PHY layers. Specifically, DiSC enables each primary terminal to ?lease? a transmission opportunity to a local secondary terminal at MAC Protocol Data Unit (MPDU) granularity in exchange for cooperation (relaying). The project aims, on the one hand, at a theoretical understanding of the potentiality of the approach from the standpoints of network information theory and networking theory, and, on the other, at the (clean-slate and back-compatible) design of MAC/DL-PHY protocols that effectively implements DiSC in a complex wireless environment.   Keywords: Spectrum leasing, dynamic resource allocation, cognitive radio, cooperative transmission, cross-layer design, multi-hop wireless networks.</docText>
    <division>CCF</division>
    <directorate>CSE</directorate>
    <award-instr>Standard Grant</award-instr>
    <programreferencecode>HPCC</programreferencecode>
    <keyword>network</keyword>
    <keyword>wireless</keyword>
    <state>NJ</state>
    <programreferencecode>9218</programreferencecode>
    <fieldofapplication>0000912 Computer Science</fieldofapplication>
    <keyword>networking</keyword>
    <organization>New Jersey Institute of Technology</organization>
    <progmgr>William H Tranter</progmgr>
    <amount>249998</amount>
    <program>COMM &amp; INFORMATION THEORY</program>
    <programelementcode>7935</programelementcode>
    <pi>Simeone, Osvaldo</pi>
  </document>
  <document>
    <docID>0914895</docID>
    <docDate>September 1, 2009</docDate>
    <docSource></docSource>
    <docText>SHF: Small:Design Tools and Optimization Methods for Digital Microfluidic Biochips

   Advances in digital microfluidics have led to the promise of biochips for applications such as point-of-care medical diagnostics. These devices enable the precise control of nanoliter droplets of biochemical samples and reagents. Therefore, integrated circuit (IC) technology can be used to transport and process "biochemical payload" in the form of nanoliter/picoliter droplets. As a result, non-traditional biomedical applications and markets are opening up fundamentally new uses for ICs.     The goal of this project is to develop a design-automation infrastructure for reconfigurable microfluidic biochips. It envisions an automated design flow that will transform biochip research and their use, in the same way as design automation revolutionized IC design in the 80s and 90s. Design tools and optimization methods are being developed to ensure that biochips are as versatile as the macro-labs that they are intended to replace. The results from this research will enable a "panel" of concurrent immunoassay-based diagnostic tests on an integrated microfluidic processor biochip that can be "user-programmed", and which can provide results in real-time with picoliter sample/reagent volumes. Specific research tasks include control-path synthesis and microcontroller/microfluidics integration, chip optimization for multiplexed immunoassays, microfluidic logic gates for smart decision-making, and design for testability.    Miniaturized and low-cost biochips will revolutionize data analysis for air quality studies and clinical diagnostics, enabling a transformation in environmental monitoring, healthcare, exposure assessment, and emergency response. This project is especially aligned with the vision of functional diversification and "More than Moore", as articulated in the ITRS 2007, which highlights "Medical" as a "System Driver" for the future. The project bridges several research communities, e.g., microfluidics, electronic design automation, and biochemistry, and it provides interdisciplinary education to graduate and undergraduate students.</docText>
    <division>CCF</division>
    <directorate>CSE</directorate>
    <award-instr>Standard Grant</award-instr>
    <programreferencecode>HPCC</programreferencecode>
    <programreferencecode>9216</programreferencecode>
    <programreferencecode>9218</programreferencecode>
    <fieldofapplication>0000912 Computer Science</fieldofapplication>
    <state>NC</state>
    <keyword>education</keyword>
    <keyword>data analysis</keyword>
    <organization>Duke University</organization>
    <keyword>vision</keyword>
    <progmgr>Dmitry Maslov</progmgr>
    <programreferencecode>9217</programreferencecode>
    <pi>Chakrabarty, Krishnendu</pi>
    <amount>275000</amount>
    <program>NANOCOMPUTING</program>
    <programelementcode>7947</programelementcode>
  </document>
  <document>
    <docID>0914877</docID>
    <docDate>August 1, 2009</docDate>
    <docSource></docSource>
    <docText>SHF: Small: Collaborative Research: Flexible, Efficient, and Trustworthy Proof Checking for Satisfiability Modulo Theories

   This award is funded under the American Recovery and Reinvestment Act of 2009   (Public Law 111-5).    Software bugs cost the U.S. economy over $60 billion each year.  Promising bug-detection technology depends on high-performance logic solvers for Satisfiability Modulo Theories (SMT), which employ sophisticated algorithms to check large formulas efficiently. Sophistication has a price:  the solvers themselves exhibit bugs, and are not trustworthy enough for safety-critical applications. To increase confidence, some SMT solvers can emit formal proofs for valid formulas. Checking these proofs with a simple proof checker confirms the solver's results. SMT's rich logic poses challenges for standardizing a single proof format for all SMT solvers. Furthermore, proofs produced by SMT solvers can be gigabytes long, requiring an optimized proof checker.     This collaborative project is developing a verified proof checker supporting a flexible format called the Edinburgh Logical Framework with Side Conditions (LFSC). LFSC is a meta-language for describing different proof systems, thus providing flexibility. Verification techniques are being applied to the proof checker itself to verify its optimizations, by writing it in a verified programming language called Guru. Support is also being added for LFSC proofs to the CVC3 solver. This research will greatly increase confidence in solver results through proofs, thus increasing the power of bug detection.</docText>
    <keyword>algorithms</keyword>
    <division>CCF</division>
    <directorate>CSE</directorate>
    <award-instr>Standard Grant</award-instr>
    <programreferencecode>HPCC</programreferencecode>
    <programreferencecode>9216</programreferencecode>
    <keyword>verification</keyword>
    <programreferencecode>9218</programreferencecode>
    <fieldofapplication>0000912 Computer Science</fieldofapplication>
    <state>IA</state>
    <progmgr>Sol J. Greenspan</progmgr>
    <programreferencecode>9217</programreferencecode>
    <organization>University of Iowa</organization>
    <program>SOFTWARE ENG &amp; FORMAL METHODS</program>
    <programelementcode>7944</programelementcode>
    <pi>Stump, Aaron</pi>
    <programreferencecode>6890</programreferencecode>
    <copi>Cesare Tinelli</copi>
    <amount>299986</amount>
  </document>
  <document>
    <docID>0914828</docID>
    <docDate>July 1, 2009</docDate>
    <docSource></docSource>
    <docText>CIF:Small: Primitives for Cryptography and Communications

   CIF: Small: Primitives for Cryptography and Communications                                                                                                               Principal Investigator: Andrew Klapper, University of Kentucky                                                                                                              Pseudorandom sequences and highly nonlinear functions are essential for   digital communications and information technology.  They are used in   stream cipher cryptosystems, spread spectrum systems in cellular   telephones, GPS systems, satellite communications, error-correcting codes   for digital communication, and large simulations for such applications as   weather prediction, reactor design, oil well exploration, radiation cancer   therapy, traffic flow, and pricing of  financial instruments.  In each case   sequences or nonlinear functions with particular properties are needed.    Yet few general constructions of high quality pseudorandom sequences   and highly nonlinear functions are known.  This research involves the   development and analysis of a large supply of these tools for a variety of   applications in  cryptography, coding theory, and simulations.                                                                                                              In 1994 Klapper and Goresky proposed "feedback-with-carry shift registers"  (FCSRs), pseudorandom generators which are easily implemented and which   rapidly generate sequences with many desirable properties.  These generalize  to algebraic feedback shift registers (AFSRs).  Many basic properties of FCSRs   and AFSRs have been determined and they have been used in stream ciphers  and quasi-Monte Carlo.   This project addresses issues concerning FCSR and   AFSR sequences including (1) The development of new classes of highly   nonlinear functions for use in block ciphers and stream ciphers, (2) the   development of new tools for the analysis of nonlinear functions based on the   "with-carry" paradigm, (3) the solution of the "register synthesis problem"   for AFSRs, (4) the identification of new classes of AFSR sequences with good  randomness properties, and (5) the extension of various ideas and methods in cryptography to vector valued functions and sequence generators.</docText>
    <division>CCF</division>
    <directorate>CSE</directorate>
    <award-instr>Standard Grant</award-instr>
    <programreferencecode>HPCC</programreferencecode>
    <programreferencecode>9218</programreferencecode>
    <progmgr>John Cozzens</progmgr>
    <fieldofapplication>0000912 Computer Science</fieldofapplication>
    <programreferencecode>9150</programreferencecode>
    <keyword>cryptography</keyword>
    <organization>University of Kentucky Research Foundation</organization>
    <state>KY</state>
    <program>SIGNAL PROCESSING</program>
    <programelementcode>7936</programelementcode>
    <pi>Klapper, Andrew</pi>
    <amount>308309</amount>
  </document>
  <document>
    <docID>0914782</docID>
    <docDate>August 1, 2009</docDate>
    <docSource></docSource>
    <docText>AF: Small: Influencing and Improving Networks Formed by Strategic Agents

   Influencing and Improving Networks Formed by Strategic Agents    An increasing number of networks on the forefront of scientific research, and of great importance to our world, are developed, built, and maintained by a large number of independent agents, all of whom act in their own interests. Such networks with strategic agents include the Internet, peer-to-peer file sharing schemes, business contracts between companies, and social networks representing relationships between groups of people. While these networks cannot be fully controlled, they can often be influenced in a limited way, sometimes resulting in dramatic improvement of the global network behavior. For example, this influence can include giving a few agents incentives to behave differently, altering a small part of the network, or even providing some extra information that makes a huge difference. This project will develop methods and algorithms with provable guarantees for influencing networks of strategic agents in order to improve the overall network behavior.    This project will study the formation of various networks by strategic agents, and will especially focus on the system of customer-provider and peering contracts between Autonomous Systems (AS's) in the Internet. In the process of this research, new approximation algorithm concepts will be introduced, and will yield techniques for improving the global qualities of a network, and for preventing undesirable entities from gaining undue influence over it. While interactions of self-interested agents have been studied in numerous fields, a systematic study of how to influence such agents with only a limited amount of power has never been done. Besides contributing to algorithmic game theory and the study of networks, this research will open up new research directions in economics, AI, and the social sciences.</docText>
    <keyword>algorithms</keyword>
    <division>CCF</division>
    <directorate>CSE</directorate>
    <award-instr>Standard Grant</award-instr>
    <programreferencecode>HPCC</programreferencecode>
    <keyword>network</keyword>
    <programreferencecode>9218</programreferencecode>
    <state>NY</state>
    <fieldofapplication>0000912 Computer Science</fieldofapplication>
    <progmgr>Tracy J. Kimbrel</progmgr>
    <organization>Rensselaer Polytechnic Institute</organization>
    <program>COMPUT GAME THEORY &amp; ECON</program>
    <programelementcode>7932</programelementcode>
    <pi>Anshelevich, Elliot</pi>
    <amount>269320</amount>
  </document>
  <document>
    <docID>0914759</docID>
    <docDate>July 15, 2009</docDate>
    <docSource></docSource>
    <docText>SHF: Small: An Extensible Gradual Type System via Compile-Time Meta-Programming

   Many modern programming languages fit in a category called "scripting languages." These languages are especially flexible, and they allow a programmer to quickly assemble pieces of a program to solve a problem. Unfortunately, a scripting language's flexibility can also hinder the programmer's ability to develop and maintain a script when it grows into a larger program. As scripting languages have become more popular, especially with new programmers, long-term development and maintenance problems affect a growing body of programs at many layer of our computing infrastructure. This project is about smoothing the path from scripts to a more rigorous style of programming by introducing type systems into scripting languages. A type system can offer up-front guarantees about how a program will execute, and it can help isolate the effects of program modifications. Rather than imposing a particular type system, however, this project's goal is to explore a particular way of defining and customizing a type system while introducing it gradually into an existing program. The specific technical approach in this project builds on Lisp-style macros as provided by the PLT Scheme programming language.</docText>
    <division>CCF</division>
    <directorate>CSE</directorate>
    <award-instr>Standard Grant</award-instr>
    <programreferencecode>HPCC</programreferencecode>
    <programreferencecode>9216</programreferencecode>
    <programreferencecode>9218</programreferencecode>
    <fieldofapplication>0000912 Computer Science</fieldofapplication>
    <keyword>programming languages</keyword>
    <organization>University of Utah</organization>
    <state>UT</state>
    <progmgr>Sol J. Greenspan</progmgr>
    <programreferencecode>9217</programreferencecode>
    <pi>Flatt, Matthew</pi>
    <program>PROGRAMMING LANGUAGES</program>
    <programelementcode>7943</programelementcode>
    <amount>418565</amount>
  </document>
  <document>
    <docID>0914748</docID>
    <docDate>July 1, 2009</docDate>
    <docSource></docSource>
    <docText>CIF: Small: Digital Mitigation of Spurious Tones in Fractional-N PLLs

   CIF: Small: Digital Mitigation of Spurious Tones in Fractional-N PLLs    Fractional-N phase locked loops (PLLs) are critical components in most modern wireless communication systems including cellular telephones and wireless local area networks. Unfortunately, the error introduced by conventional PLLs contains period disturbances referred to as spurious tones, which only can be suppressed sufficiently for typical wireless applications with techniques that increase power consumption and cost. Furthermore, these techniques become less effective as integrated circuit (IC) technology continues to scale to smaller dimensions. Therefore, the spurious tone problem negatively affects power consumption, cost, and manufacturability of wireless communication systems, and the problem gets worse as IC technology scales with Moore?s Law.  The ÄÓ modulator in a conventional PLL is the fundamental cause of spurious tones.  The spurious tones are induced when the ÄÓ modulator?s quantization noise is subjected to nonlinearity from non-ideal circuit behavior in the PLL. The goal of this research is to develop a ÄÓ modulator replacement, called a successive requantizer, that avoids this problem. The successive requantizer has a different principle of operation than a ÄÓ modulator and its quantization noise is much less susceptible to nonlinearity-induced spurious tones. The research tasks are 1) to further develop the theory underlying successive requantizers to improve their performance, 2) to investigate how PLLs can be optimized at the circuit level to take advantage of the reduced sensitivity to nonlinear distortion offered by successive requantizers, and 3) to develop a proof-of-concept fractional-N PLL IC enabled by the theoretical results of the project that is compliant with a demanding wireless standard such as IEEE 802.16 and exceeds the present state of the art in terms of minimizing power consumption and circuit area.</docText>
    <division>CCF</division>
    <directorate>CSE</directorate>
    <award-instr>Standard Grant</award-instr>
    <programreferencecode>HPCC</programreferencecode>
    <keyword>wireless</keyword>
    <programreferencecode>9218</programreferencecode>
    <progmgr>John Cozzens</progmgr>
    <state>CA</state>
    <fieldofapplication>0000912 Computer Science</fieldofapplication>
    <organization>University of California-San Diego</organization>
    <pi>Galton, Ian</pi>
    <program>SIGNAL PROCESSING</program>
    <programelementcode>7936</programelementcode>
    <amount>352445</amount>
  </document>
  <document>
    <docID>0914739</docID>
    <docDate>August 1, 2009</docDate>
    <docSource></docSource>
    <docText>Computationally efficient estimation of the error rates of hidden Markov model results

   NSF proposal: 0914739  PI: Newberg, Lee A.    Computationally efficient estimation of the error rates of hidden Markov model results    Hidden Markov models are employed in a wide variety of fields, including speech recognition, econometrics, computer vision, signal processing, cryptanalysis, and computational biology.  In speech recognition, hidden Markov models can be used to distinguish one word from another based upon the time series of certain qualities of a sound.  In finance, the models can be used to simulate the unknown transitions between low, medium, and high debt default regimes in time.  In computer vision they can be used to decode American Sign Language (ASL).  Hidden Markov models are used in computational biology to find similarity between sequences of nucleotides (DNA or RNA) or polypeptides (proteins) and to predict protein structure.    Hidden Markov models are employed because they permit the facile description and implementation of powerful statistical models and algorithms that are used to score a match possibility in sequence data.  Perhaps the most common use of hidden Markov models is for the purpose of hypothesis testing or classification.  For instance, a speech-recognition model may be used to quantify the belief that a recorded message contains the word ?elephant.?  However, once a score for a belief has been computed, the question is how to interpret that value.  1.	Is the score strong enough to indicate a signal, or is it reasonably probable that noise will yield a score this strong?  2.	Is the score weak enough to indicate noise, or is it reasonably probable that a signal will yield a score this weak?  The false positive rate (closely related to the type I error or p-value) for a score threshold is the probability that noise data will yield a score at least as strong as the threshold.  The false negative rate for a score threshold is the probability that signal data will fail to score at least as strong as the threshold.    In 2008, Newberg designed a method for estimating error rates that is more efficient than other approaches that are applicable to general hidden Markov models.  However the approach is still too slow for computationally intensive applications such as repeated searches of large DNA databases.  This proposed research aims to speed the estimation primarily via two approaches: (1) the creative re-use of simulations, and (2) statistically robust elimination of outlier simulation results.    The proposed research is significant because the facile availability of error rates permits researchers in a wide variety of scientific fields to evaluate the statistical significance of their conclusions and the power of their hypothesis tests. Once the technique and software are available, researchers in speech recognition or ASL recognition will be able to use rigorously derived statistical significance values to set their hypothesis test thresholds for word recognition. Financial modelers will have a rigorous standard by which to evaluate their market timing models. Computational biologists will have rigorous statistical significance values for their sequence alignments and for their pattern scans of large sequence databases. More generally, the availability of error rates for hidden Markov model results will significantly enhance the attractiveness of hidden Markov models for use in fields where hidden Markov models are not currently employed.</docText>
    <keyword>algorithms</keyword>
    <division>CCF</division>
    <directorate>CSE</directorate>
    <award-instr>Standard Grant</award-instr>
    <programreferencecode>HPCC</programreferencecode>
    <programreferencecode>9218</programreferencecode>
    <state>NY</state>
    <fieldofapplication>0000912 Computer Science</fieldofapplication>
    <progmgr>Mitra Basu</progmgr>
    <keyword>computational biology</keyword>
    <keyword>simulation</keyword>
    <amount>300000</amount>
    <keyword>computer vision</keyword>
    <keyword>vision</keyword>
    <program>COMPUTATIONAL MATHEMATICS</program>
    <programelementcode>1271</programelementcode>
    <programreferencecode>9263</programreferencecode>
    <program>COMPUTATIONAL BIOLOGY</program>
    <programelementcode>7931</programelementcode>
    <pi>Newberg, Lee</pi>
    <organization>Health Research Incorporated/New York State Department of Health</organization>
  </document>
  <document>
    <docID>0914732</docID>
    <docDate>July 1, 2009</docDate>
    <docSource></docSource>
    <docText>AF: Small:  Algorithmic and Game-Theoretic Issues in Bargaining and Markets

   The theories of bargaining and markets, key theories within game theory and mathematical economics, suffer from a serious shortcoming -- other than a few isolated results, they are essentially non-algorithmic.  With the advent of the Internet, totally new and highly successful markets have been defined and launched by Internet companies such as Google, Yahoo!, Amazon, MSN and Ebay, and bargaining has emerged as a mechanism of choice in some Internet transactions, such as those made by priceline.com and iOffer.com.  Motivated by these developments, much work has been done in the last decade on developing algorithms for markets and bargaining.    This project will extend this work along several exciting directions: attacking open problems remaining in the efficient computation of market equilibria such as Fisher's model with piecewise-linear, concave utilities; extending bargaining algorithms to more general utility functions, such as piecewise-linear, concave utilities; developing an algorithm for the Adwords problem that achieves 1 - o(1) expected competitive ratio in the stochastic setting, and at the same time, a 1 - 1/e ratio in the worst case; developing models of bargaining that incorporate constraints such as timing or incentive compatibility, thus making them more suitable for use on the Internet; developing further our understanding of game-theoretic properties of bargaining and markets; and developing further the primal-dual paradigm for the combinatorial solution of nonlinear convex programs, in particular, in the setting of approximation algorithms.    This project will increase our understanding of the interactions and complex interdependencies of information systems, markets and social systems. It will enable and support efficient massive distributed systems. This project will provide algorithms for and insights into the computational aspects of markets and transactions on the Internet, thereby helping make their operation more efficient. Hence, this project is expected to contribute advances in science and engineering, as well as to promote economic prosperity.</docText>
    <keyword>algorithms</keyword>
    <division>CCF</division>
    <directorate>CSE</directorate>
    <award-instr>Standard Grant</award-instr>
    <programreferencecode>HPCC</programreferencecode>
    <organization>GA Tech Research Corporation - GA Institute of Technology</organization>
    <state>GA</state>
    <programreferencecode>9218</programreferencecode>
    <fieldofapplication>0000912 Computer Science</fieldofapplication>
    <progmgr>Tracy J. Kimbrel</progmgr>
    <amount>500000</amount>
    <pi>Vazirani, Vijay</pi>
    <program>COMPUT GAME THEORY &amp; ECON</program>
    <programelementcode>7932</programelementcode>
  </document>
  <document>
    <docID>0914630</docID>
    <docDate>September 1, 2009</docDate>
    <docSource></docSource>
    <docText>CIF: Small: An Analytical Framework for Comprehensive Study of Intermittently-Connected Mobile Ad-Hoc Networks

   Intermittently-Connected Mobile Ad-hoc Networks (ICMANET) are one of the new areas in the field of wireless communication. Networks under this class are potentially deployed in challenged environments using isolated mobile devices with limited resources. They are emerging as a promising technology in applications such as in wildlife management, military surveillance, underwater networks, and vehicular networks. Recent focus on these networks has naturally generated efforts to analytically understand them. In contrast to conventional Mobile Ad-hoc Networks (MANETs), links on an end-to-end path in ICMANETs do not exist contemporaneously. This compounds the analysis of such networks. The research provides one of the first steps for performance modeling of ICMANETs. This is very crucial in the design of practical schemes targeted to offer good performance across different mobility scenarios.    Most current analytical research employs simple mobility models such as the Poisson-contact model, which are unrealistic. Departing heavily from this trend, the investigator has developed performance analysis under the very general class of stationary mobility models. This paves the way to analytically understand the effect of mobility parameters on performance. In particular, the research answers questions of the following nature: What parameters of the mobility model affect ICMANETs performance? How does one extract the necessary information?  The research objective is to develop novel approaches in performance modeling of ICMANETs, drawing out key ideas from Markov-chain- and queuing- theory. The research attempts to arrive at a novel framework which is capable of capturing key network characteristics under practical constraints such as finite bandwidth, random contact durations, and finite node buffers. Key performance measures such as throughput will be explored for various communication scenarios, routing protocols, network coding and buffer management schemes.</docText>
    <division>CCF</division>
    <directorate>CSE</directorate>
    <award-instr>Standard Grant</award-instr>
    <programreferencecode>HPCC</programreferencecode>
    <programreferencecode>9216</programreferencecode>
    <keyword>network</keyword>
    <organization>GA Tech Research Corporation - GA Institute of Technology</organization>
    <state>GA</state>
    <keyword>wireless</keyword>
    <programreferencecode>9218</programreferencecode>
    <fieldofapplication>0000912 Computer Science</fieldofapplication>
    <progmgr>William H Tranter</progmgr>
    <pi>Fekri, Faramarz</pi>
    <programreferencecode>9217</programreferencecode>
    <program>NETWORK CODING AND INFO THEORY</program>
    <programelementcode>7937</programelementcode>
    <amount>268191</amount>
  </document>
  <document>
    <docID>0914543</docID>
    <docDate>August 1, 2009</docDate>
    <docSource></docSource>
    <docText>SHF:SM: A Time-Predictable Multicore/Manycore Architecture for Real-Time

     Real-time systems ranging from aircraft and nuclear power plant controllers to video games and graphics animations have become an increasingly important part of our society. For real-time applications to harness the full potential of multicore chips, the execution time of multicore processors must be predictable, which is particularly crucial for hard real-time and safety-critical systems. Unfortunately, current multicore architectures are designed for maximizing average-case performance, and some architectural features such as shared caches can significantly affect the worst-case performance, making accurate WCET (Worst-Case Execution Time) analysis extremely difficult, if not impossible. This harmful impact on time predictability will become even more severe in emerging manycore processors.    This proposal attempts to design a time-predictable yet high-performance multicore/manycore architecture to provide scalable and predictable performance for future high-performance real-time applications. In addition to systematic analysis of existing multicore architectural features that can severely affect time predictability of computing, this project will develop a variety of time-predictable cache and memory architectures to ensure time predictability. This project will also implement TMulticore on a FPGA to develop deep understanding of real design constraints for time-predictable multicore/manycore chips.    The success of this project is expected to enable the safe and reliable use of multicore/manycore processors for a wide variety of real-time applications to enhance their performance and energy efficiency with deterministic computation time. This project will involve both undergraduate and graduate students in the design, implementation, and evaluation of the proposed TMulticore processor. In particular, the PI is committed to attracting underrepresented students into this project. In addition, funding of this project will greatly facilitate the growth of the new Ph.D. program in Electrical and Computer Engineering at the Southern Illinois university.</docText>
    <division>CCF</division>
    <directorate>CSE</directorate>
    <award-instr>Standard Grant</award-instr>
    <programreferencecode>HPCC</programreferencecode>
    <keyword>architecture</keyword>
    <programreferencecode>9218</programreferencecode>
    <fieldofapplication>0000912 Computer Science</fieldofapplication>
    <state>IL</state>
    <keyword>graphics</keyword>
    <progmgr>Chitaranjan Das</progmgr>
    <amount>280000</amount>
    <program>COMPUTER ARCHITECTURE</program>
    <programelementcode>7941</programelementcode>
    <organization>Southern Illinois University at Carbondale</organization>
    <pi>Zhang, Wei</pi>
  </document>
  <document>
    <docID>0914353</docID>
    <docDate>July 15, 2009</docDate>
    <docSource></docSource>
    <docText>CIF:SMALL: Nonlocal Sparse Representations on Graphical Models: Theory, Algorithms and Applications

   Abstract    Image processing is an interdisciplinary field at the intersection of science and engineering. Mathematical modeling of image signals not only supports various engineering applications in our daily lives (e.g., digital cameras, high-definition TV, ultrasound diagnosis and so on) but also offers a computational approach to understand sensory coding as a strategy for information processing in visual cortex. An improved understanding of image models is likely to lead to artifact-free signal processing systems that well match the perception by human vision systems. Models developed for images could also facilitate the study of self-organization principles underlying other complex sensory signals such as speech and video.    This research targets at a more fundamental understanding towards image modeling via nonlocal sparse representations (NSR). Unlike wavelet bases that are dilation and translation of a signal-independent wavelet function, the PI advocates the representation of a signal by ?basis functions? that are dilation and translation of the signal itself. Self-similarity based signal representation is closely related to the fractal theory and can be connected with sparse representations via regression shrinkage and selection. Such fruitful connection leads to a nonlocal regularization framework on graphical models and a class of novel deterministic annealing optimization techniques. This research has applications to a wide range of image processing systems from noise suppression in medical imaging to artifact removal in JPEG/JPEG2000 compression. The longer-term objective of the research is to demonstrate the intimate relationship between image processing and higher-level vision tasks such as segmentation and recognition.</docText>
    <keyword>algorithms</keyword>
    <division>CCF</division>
    <directorate>CSE</directorate>
    <award-instr>Standard Grant</award-instr>
    <programreferencecode>HPCC</programreferencecode>
    <programreferencecode>9218</programreferencecode>
    <progmgr>John Cozzens</progmgr>
    <fieldofapplication>0000912 Computer Science</fieldofapplication>
    <programreferencecode>9150</programreferencecode>
    <organization>West Virginia University Research Corporation</organization>
    <state>WV</state>
    <keyword>vision</keyword>
    <program>SIGNAL PROCESSING</program>
    <programelementcode>7936</programelementcode>
    <pi>Li, Xin</pi>
    <amount>172479</amount>
  </document>
  <document>
    <docID>0913150</docID>
    <docDate>August 1, 2009</docDate>
    <docSource></docSource>
    <docText>Basic Research for Developing SSD-based Caching and Hybrid Storage Systems

   This project addresses several basic research issues related to solid state device (SSD) based flash memory to lay out a foundation and technical basis for efficiently integrating SSDs into the storage hierarchy. The research will be done in a sequence of three steps. First, the PI will conduct intensive experiments and measurements on different types of state-of-the-art SSDs, from low-end to high-end devices aiming at providing insights into unexpected performance dynamics and uncertain behavior. Second, the investgation will collect and place dynamic information of applications, SSDs, and hard disks, including data access patterns and their localities, onto the map of operating systems, and consider their inherent features (both merits and limits) for systems design and implementation. A set of caching algorithms and storage management policies will be designed. Finally, implemention, testing, and evaluation of a hybrid storage prototype will be done by using the profiled and monitored information and developed algorithms.    The broader and transformative impact of the project can be significant: (1) It can provide critical guidance to system designers and data-intensive application users; (2) The research can provide technical solutions to narrow the speed gap between CPU operations and storage accesses;(3) The developed techniques and source code will be available online for other researchers; and (4) The research will facilitate undergraduate and graduate student traing to prepare future computer science talents in academia and industries.</docText>
    <keyword>algorithms</keyword>
    <division>CCF</division>
    <directorate>CSE</directorate>
    <award-instr>Standard Grant</award-instr>
    <programreferencecode>HPCC</programreferencecode>
    <programreferencecode>9216</programreferencecode>
    <state>OH</state>
    <programreferencecode>9218</programreferencecode>
    <fieldofapplication>0000912 Computer Science</fieldofapplication>
    <keyword>operating systems</keyword>
    <organization>Ohio State University Research Foundation</organization>
    <progmgr>Chitaranjan Das</progmgr>
    <programreferencecode>9217</programreferencecode>
    <amount>400000</amount>
    <pi>Zhang, Xiaodong</pi>
    <program>COMPUTER ARCHITECTURE</program>
    <programelementcode>7941</programelementcode>
  </document>
  <document>
    <docID>0910940</docID>
    <docDate>August 1, 2009</docDate>
    <docSource></docSource>
    <docText>AF: Large: Networks, Learning and Markets with Strategic Agents

   An active line of algorithmic research over the past decade has developed techniques for analyzing systems of self-interested agents. A crucial challenge in analyzing such systems is to predict aggregate properties at large scales; this requires drawing conclusions about global phenomena in systems whose behavior is currently only well-understood at the level of individual agents or pairs of agents. Deriving conclusions about macroscopic properties of systems described at a microscopic level is important in both computing and the social sciences. Market prices, for instance, arise from the microscopic interactions of individual traders. Understanding both the normal functioning of markets and their failure requires methods that can bridge the gap between these different scales of resolution.    This project uses ideas about networks and learning from algorithmic game theory to bridge the micro-macro gap. The research on networks considers theories of bargaining and trade in which participants are constrained by a network structure.  This includes models for the distribution of power among agents in a network, as well as models in which prices in a market arise strategically through the interaction of market-making intermediaries in a network. The research develops models of market failures, particularly the kinds of cascading breakdowns of trust that played a crucial role in the global financial crisis in 2008. The project employs learning models to capture how perceived counterparty risk -- the ability of one's trading partner to complete a transaction --- spreads through a market.    The research on trust in financial markets can potentially contribute to broader policy debates about methods for restoring trust in markets. Currently there is a lack of analytical techniques that can tractably manipulate non-trivial learning dynamics to uncover the resulting network-level consequences, such as cascades. The research will provide tools for analyzing the determinants and evolution of trust in financial markets.    The project will also inform the development of introductory courses that cut across many disciplines, providing undergraduates from a wide range of backgrounds with a computationally grounded perspective for reasoning about the behavior and consequences of networks of interacting agents.</docText>
    <division>CCF</division>
    <directorate>CSE</directorate>
    <award-instr>Standard Grant</award-instr>
    <programreferencecode>HPCC</programreferencecode>
    <keyword>network</keyword>
    <programreferencecode>9218</programreferencecode>
    <state>NY</state>
    <fieldofapplication>0000912 Computer Science</fieldofapplication>
    <progmgr>Richard Beigel</progmgr>
    <program>INFORMATION TECHNOLOGY RESEARC</program>
    <programelementcode>1640</programelementcode>
    <organization>Cornell University</organization>
    <pi>Tardos, Eva</pi>
    <copi>Jon Kleinberg</copi>
    <program>COMPUT GAME THEORY &amp; ECON</program>
    <programelementcode>7932</programelementcode>
    <copi>Lawrence Blume</copi>
    <copi>David Easley</copi>
    <copi>Robert Kleinberg</copi>
    <amount>2938984</amount>
  </document>
  <document>
    <docID>0910883</docID>
    <docDate>August 1, 2009</docDate>
    <docSource></docSource>
    <docText>SHF: Large:Collaborative Research: PASS: Perpetually Available Software Systems

   Despite heroic efforts in testing, static analysis, specification, and verification, all real-world software -- desktop applications, servers, and transportation systems---deploys with defects and missing functionality, costing the US economy billions and threatening our well-being.  This project proposes a transformative paradigm shift to "perpetually available software systems" (PASS) that will make software more available and robust by directly addressing errors in deployed software.  PASS innovations will (1) improve user experience by keeping real-world software running longer; (2) ensure good performance; (3) assist developers in fixing errors while allowing patches to be safely deployed on running software, to avoid downtime. The project will mine error reports in open source software repositories to derive error classes and test suites. It will evaluate system effectiveness by comparing with bug reports and patches in repositories.  Innovations will include (1) detection and remediation elements that target common errors, (2) semantic foundations for remediation and on-line updating, and (3) integration of elements to exploit synergy among the components.  The project will explore and analyze novel safe, probabilistically-safe, and extended-semantics remediations/updates. The project will develop both C/C++ and Java runtimes, because they are the most widely used languages and pose unique challenges. Methods will include combining dynamic, static, and remediation/update analysis and results.  The project will train graduate, undergraduate, and post doctoral students, and participate in outreach to under-represented groups. The tools will be made publicly available, adding to the national research infrastructure.</docText>
    <division>CCF</division>
    <directorate>CSE</directorate>
    <award-instr>Standard Grant</award-instr>
    <programreferencecode>HPCC</programreferencecode>
    <programreferencecode>9216</programreferencecode>
    <state>MA</state>
    <keyword>verification</keyword>
    <programreferencecode>9218</programreferencecode>
    <fieldofapplication>0000912 Computer Science</fieldofapplication>
    <program>INFORMATION TECHNOLOGY RESEARC</program>
    <programelementcode>1640</programelementcode>
    <organization>University of Massachusetts Amherst</organization>
    <progmgr>Sol J. Greenspan</progmgr>
    <programreferencecode>9217</programreferencecode>
    <program>SOFTWARE ENG &amp; FORMAL METHODS</program>
    <programelementcode>7944</programelementcode>
    <pi>Berger, Emery</pi>
    <amount>639420</amount>
  </document>
  <document>
    <docID>0910818</docID>
    <docDate>August 1, 2009</docDate>
    <docSource></docSource>
    <docText>SHF: Large:Collaborative Research: PASS: Perpetually Available Software Systems

   Despite heroic efforts in testing, static analysis, specification, and verification, all real-world software -- desktop applications, servers, and transportation systems---deploys with defects and missing functionality, costing the US economy billions and threatening our well-being.  This project proposes a transformative paradigm shift to "perpetually available software systems" (PASS) that will make software more available and robust by directly addressing errors in deployed software.  PASS innovations will (1) improve user experience by keeping real-world software running longer; (2) ensure good performance; (3) assist developers in fixing errors while allowing patches to be safely deployed on running software, to avoid downtime. The project will mine error reports in open source software repositories to derive error classes and test suites. It will evaluate system effectiveness by comparing with bug reports and patches in repositories.  Innovations will include (1) detection and remediation elements that target common errors, (2) semantic foundations for remediation and on-line updating, and (3) integration of elements to exploit synergy among the components.  The project will explore and analyze novel safe, probabilistically-safe, and extended-semantics remediations/updates. The project will develop both C/C++ and Java runtimes, because they are the most widely used languages and pose unique challenges. Methods will include combining dynamic, static, and remediation/update analysis and results.  The project will train graduate, undergraduate, and post doctoral students, and participate in outreach to under-represented groups. The tools will be made publicly available, adding to the national research infrastructure.</docText>
    <division>CCF</division>
    <directorate>CSE</directorate>
    <state>TX</state>
    <award-instr>Standard Grant</award-instr>
    <programreferencecode>HPCC</programreferencecode>
    <programreferencecode>9216</programreferencecode>
    <keyword>verification</keyword>
    <programreferencecode>9218</programreferencecode>
    <fieldofapplication>0000912 Computer Science</fieldofapplication>
    <program>INFORMATION TECHNOLOGY RESEARC</program>
    <programelementcode>1640</programelementcode>
    <progmgr>Sol J. Greenspan</progmgr>
    <organization>University of Texas at Austin</organization>
    <programreferencecode>9217</programreferencecode>
    <pi>McKinley, Kathryn</pi>
    <program>SOFTWARE ENG &amp; FORMAL METHODS</program>
    <programelementcode>7944</programelementcode>
    <amount>1000957</amount>
  </document>
  <document>
    <docID>0910786</docID>
    <docDate>September 1, 2009</docDate>
    <docSource></docSource>
    <docText>SHF:Large:Collaborative Research:TRELLYS: Community-Based Design and Implementation of a Dependently Typed Programming Language

   The cost-effective construction of functionally correct software systems remains an unmet challenge for Computer Science. Although industrial best practices for software construction (such as testing, code reviews, automatic bug finding) have low cost, they cannot provide strong guarantees about correctness. Classical verification methods, on the other hand, are not cost-effective.  Recently, the research community has been exploring the idea of dependent types, which extend the expressive power of programming languages to support verification. These rich types allow the programmer to express non-trivial invariant properties of her data and code as a part of her program. That way, verification is incremental, localized and at source-language level.    This multi-institution collaborative project is for the design and implementation of a programming language with dependent types, called Trellys. Technically, Trellys is call-by-value functional programming language with full-spectrum dependency. Overall, the project combines numerous fragmented research results into a coherent language design, by building a robust open-source implementation. The design draws on diverse solutions to the technical problems that arise from extending traditional programming languages accommodate dependent types: type and effect inference, language interoperability, compilation, and concurrency.</docText>
    <division>CCF</division>
    <directorate>CSE</directorate>
    <award-instr>Standard Grant</award-instr>
    <programreferencecode>HPCC</programreferencecode>
    <programreferencecode>9216</programreferencecode>
    <keyword>verification</keyword>
    <programreferencecode>9218</programreferencecode>
    <fieldofapplication>0000912 Computer Science</fieldofapplication>
    <state>PA</state>
    <program>INFORMATION TECHNOLOGY RESEARC</program>
    <programelementcode>1640</programelementcode>
    <keyword>programming languages</keyword>
    <progmgr>Sol J. Greenspan</progmgr>
    <organization>University of Pennsylvania</organization>
    <programreferencecode>9217</programreferencecode>
    <pi>Weirich, Stephanie</pi>
    <program>PROGRAMMING LANGUAGES</program>
    <programelementcode>7943</programelementcode>
    <amount>710000</amount>
  </document>
  <document>
    <docID>0910765</docID>
    <docDate>September 1, 2009</docDate>
    <docSource></docSource>
    <docText>CIF: Large: Sensing Sensors: Compressed sampling with Co-design of Hardware and Algorithms Across Multiple Layers in Wireless Sensor Networks

   This research program will develop and demonstrate theory and techniques for efficient collection, transmission and processing of information in wirelessly-connected sensor networks. This fundamental research is aimed towards development of a revolutionary wireless sensor node, optimized for infrastructure monitoring, and characterized by ultra-low power consumption. Power consumption, installation complexity and installation cost are significant bottlenecks to the widespread deployment of wireless infrastructure monitoring that will be addressed by this research. This research program improves energy efficiency and battery lifetime through the use of compressed sampling in sensing, physical communication and network communication and through the co-design of hardware and algorithms.    A theme of the research is the development of compressive sampling techniques. Compressive sampling techniques will be developed to reduce the number of samples that need to taken by sensors, to optimize the placement of sensing nodes, and to minimize the amount of data transmitted by the sensing nodes. This research will develop new theoretical approaches to signal sampling, to ultra-wideband (UWB) wireless communication of acquired information, and to sensor network architecture and protocols. Development of new theory and algorithms will go hand-in-hand with the development of new circuit techniques. New integrated circuit techniques for analog-to-digital conversion and wireless communication will be developed.    A Center for Structural Health Monitoring through Compressed Sensing will be formed to broaden the impact of this research. The scope of the education component of this program targets grade-school, undergraduate and graduate students. An interdisciplinary curriculum of courses in Math, Civil Engineering and Electrical Engineering will be created. The center will also develop an extensive outreach education program.</docText>
    <keyword>algorithms</keyword>
    <division>CCF</division>
    <directorate>CSE</directorate>
    <award-instr>Standard Grant</award-instr>
    <programreferencecode>HPCC</programreferencecode>
    <state>MI</state>
    <keyword>network</keyword>
    <keyword>wireless</keyword>
    <keyword>architecture</keyword>
    <programreferencecode>9218</programreferencecode>
    <fieldofapplication>0000912 Computer Science</fieldofapplication>
    <program>INFORMATION TECHNOLOGY RESEARC</program>
    <programelementcode>1640</programelementcode>
    <organization>University of Michigan Ann Arbor</organization>
    <keyword>education</keyword>
    <progmgr>Eun K. Park</progmgr>
    <program>SIGNAL PROCESSING</program>
    <programelementcode>7936</programelementcode>
    <pi>Flynn, Michael</pi>
    <copi>Wayne Stark</copi>
    <copi>Anna Gilbert</copi>
    <copi>Jerome Lynch</copi>
    <copi>David Wentzloff</copi>
    <amount>2845386</amount>
  </document>
  <document>
    <docID>0910584</docID>
    <docDate>September 1, 2009</docDate>
    <docSource></docSource>
    <docText>RI: Large: Collaborative Research: MelRandom Processes and Randomized Algorithms

   Randomness has emerged as a core concept and tool in computation. From modeling phenomena to efficient algorithms to proof techniques, the applications of randomness are ubiquitous and powerful. Notable examples include: construction of important combinatorial objects such as expanders, rigorously establishing phase transitions in physical models, finding polynomial-time algorithms for fundamental sampling problems and approximating #P-hard counting problems, designing probabilistically checkable proofs (PCP's) and establishing the hardness of approximation, and discovering simpler and often faster algorithms for a variety of computational problems. In the course of these tremendous developments, several general-purpose techniques have emerged, and random sampling has become a fundamental, universal tool across sciences, engineering and computation.    This project brings together leading researchers in randomized algorithms to solve hard problems in random sampling, to identify techniques, and to develop new analytical tools. The applications come from a range of fields, including complexity, physics, biology, operations research and mathematics. The most general and widely-studied technique for sampling is simulating a Markov chain by taking a random walk on a suitable state space. The Markov Chain method and its application to sampling, counting and integration, broadly known as the Markov Chain Monte Carlo (MCMC) method, is a central theme of the project.    Intellectual Merit. The project focuses on applications of randomized algorithms and random sampling to rigorously address problems across several disciplines. Within computer science these topics include: massive data sets, where sampling is critical both for finding low-dimensional representations and clustering; routing networks, where sampling has many applications from monitoring and path allocation to optimization; machine learning; and property testing. Recent interactions between computer science and other scientic disciplines have led to many new rigorous applications of sampling, as well as new insights in how to design and analyze efficient algorithms with performance guarantees; for instance, phase transitions in the underlying physical models can cause local Markov chains to be inefficient. The project explores deeper connections between physics and random sampling, including conjectured correlations between reconstruction problems and thresholds for the efficiency of local algorithms. Many related problems arise in biology, such as phylogenetic tree reconstruction and analysis of complex biological networks. In nanotechology, models of self-assembly are simple Markov chains. In mathematics, the techniques used in the analysis of sampling algorithms in general and Markov chains in particular have drawn heavily on probability theory, both discrete and continuous.    Broader Impact. The college of computing at Georgia Tech is home to the new Algorithms and Randomness Center (ARC) with many faculty and students sharing this expertise. The project's activities include designing a summer school for graduate students in randomized algorithms and designing a course for training students from diverse backgrounds and hosting workshops focusing on both theoretical and applied aspects of randomized algorithms. Participation of women and under-represented groups in all of these activities will be encouraged, and the workshops will include tutorials to increase accessibility. These coordinated efforts in education and research will solidify the impact of ARC and make it a premier center for algorithms, randomness and complexity.</docText>
    <keyword>algorithms</keyword>
    <division>CCF</division>
    <directorate>CSE</directorate>
    <award-instr>Standard Grant</award-instr>
    <programreferencecode>HPCC</programreferencecode>
    <organization>GA Tech Research Corporation - GA Institute of Technology</organization>
    <state>GA</state>
    <programreferencecode>9218</programreferencecode>
    <fieldofapplication>0000912 Computer Science</fieldofapplication>
    <program>INFORMATION TECHNOLOGY RESEARC</program>
    <programelementcode>1640</programelementcode>
    <keyword>ubiquitous</keyword>
    <keyword>education</keyword>
    <keyword>machine learning</keyword>
    <progmgr>Tracy J. Kimbrel</progmgr>
    <pi>Vempala, Santosh</pi>
    <program>ALGORITHMS</program>
    <programelementcode>7926</programelementcode>
    <copi>Dana Randall</copi>
    <copi>Prasad Tetali</copi>
    <copi>Eric Vigoda</copi>
    <amount>780000</amount>
  </document>
  <document>
    <docID>0910530</docID>
    <docDate>August 1, 2009</docDate>
    <docSource></docSource>
    <docText>SHF: Large: Collaborative Research: PASS: Perpetually Available Software Systems

   Despite heroic efforts in testing, static analysis, specification, and verification, all real-world software -- desktop applications, servers, and transportation systems---deploys with defects and missing functionality, costing the US economy billions and threatening our well-being.  This project proposes a transformative paradigm shift to "perpetually available software systems" (PASS) that will make software more available and robust by directly addressing errors in deployed software.  PASS innovations will (1) improve user experience by keeping real-world software running longer; (2) ensure good performance; (3) assist developers in fixing errors while allowing patches to be safely deployed on running software, to avoid downtime. The project will mine error reports in open source software repositories to derive error classes and test suites. It will evaluate system effectiveness by comparing with bug reports and patches in repositories.  Innovations will include (1) detection and remediation elements that target common errors, (2) semantic foundations for remediation and on-line updating, and (3) integration of elements to exploit synergy among the components.  The project will explore and analyze novel safe, probabilistically-safe, and extended-semantics remediations/updates. The project will develop both C/C++ and Java runtimes, because they are the most widely used languages and pose unique challenges. Methods will include combining dynamic, static, and remediation/update analysis and results.  The project will train graduate, undergraduate, and post doctoral students, and participate in outreach to under-represented groups. The tools will be made publicly available, adding to the national research infrastructure.</docText>
    <division>CCF</division>
    <directorate>CSE</directorate>
    <award-instr>Standard Grant</award-instr>
    <programreferencecode>HPCC</programreferencecode>
    <programreferencecode>9216</programreferencecode>
    <keyword>verification</keyword>
    <organization>University of Maryland College Park</organization>
    <state>MD</state>
    <programreferencecode>9218</programreferencecode>
    <fieldofapplication>0000912 Computer Science</fieldofapplication>
    <program>INFORMATION TECHNOLOGY RESEARC</program>
    <programelementcode>1640</programelementcode>
    <progmgr>Sol J. Greenspan</progmgr>
    <programreferencecode>9217</programreferencecode>
    <program>SOFTWARE ENG &amp; FORMAL METHODS</program>
    <programelementcode>7944</programelementcode>
    <pi>Hicks, Michael</pi>
    <amount>642000</amount>
  </document>
  <document>
    <docID>0910510</docID>
    <docDate>September 1, 2009</docDate>
    <docSource></docSource>
    <docText>SHF:Large:Collaborative Research: TRELLYS:  Community-Based Design and Implementation of a Dependently Typed Programming Language

   The cost-effective construction of functionally correct software systems remains an unmet challenge for Computer Science. Although industrial best practices for software construction (such as testing, code reviews, automatic bug finding) have low cost, they cannot provide strong guarantees about correctness. Classical verification methods, on the other hand, are not cost-effective. Recently, the research community has been exploring the idea of dependent types, which extend the expressive power of programming languages to support verification. These rich types allow the programmer to express non-trivial invariant properties of her data and code as a part of her program. That way, verification is incremental, localized and at source-language level.    This multi-institution collaborative project is for the design and implementation of a programming language with dependent types, called Trellys. Technically, Trellys is call-by-value functional programming language with full-spectrum dependency. Overall, the project combines numerous fragmented research results into a coherent language design, by building a robust open-source implementation. The design draws on diverse solutions to the technical problems that arise from extending traditional programming languages accommodate dependent types: type and effect inference, language interoperability, compilation, and concurrency.</docText>
    <division>CCF</division>
    <directorate>CSE</directorate>
    <award-instr>Standard Grant</award-instr>
    <programreferencecode>HPCC</programreferencecode>
    <programreferencecode>9216</programreferencecode>
    <keyword>verification</keyword>
    <programreferencecode>9218</programreferencecode>
    <fieldofapplication>0000912 Computer Science</fieldofapplication>
    <program>INFORMATION TECHNOLOGY RESEARC</program>
    <programelementcode>1640</programelementcode>
    <state>IA</state>
    <keyword>programming languages</keyword>
    <progmgr>Sol J. Greenspan</progmgr>
    <programreferencecode>9217</programreferencecode>
    <organization>University of Iowa</organization>
    <pi>Stump, Aaron</pi>
    <program>PROGRAMMING LANGUAGES</program>
    <programelementcode>7943</programelementcode>
    <amount>691207</amount>
  </document>
  <document>
    <docID>0910500</docID>
    <docDate>September 1, 2009</docDate>
    <docSource></docSource>
    <docText>SHF:Large:Collaborative Research:TRELLYS: Community-Based Design and Implementation of a

   The cost-effective construction of functionally correct software systems remains an unmet challenge for Computer Science. Although industrial best practices for software construction (such as testing, code reviews, automatic bug finding) have low cost, they cannot provide strong guarantees about correctness. Classical verification methods, on the other hand, are not cost-effective. Recently, the research community has been exploring the idea of dependent types, which extend the expressive power of programming languages to support verification. These rich types allow the programmer to express non-trivial invariant properties of her data and code as a part of her program. That way, verification is incremental, localized and at source-language level.    This multi-institution collaborative project is for the design and implementation of a programming language with dependent types, called Trellys. Technically, Trellys is call-by-value functional programming language with full-spectrum dependency. Overall, the project combines numerous fragmented research results into a coherent language design, by building a robust open-source implementation. The design draws on diverse solutions to the technical problems that arise from extending traditional programming languages accommodate dependent types: type and effect inference, language interoperability, compilation, and concurrency.</docText>
    <division>CCF</division>
    <directorate>CSE</directorate>
    <award-instr>Standard Grant</award-instr>
    <programreferencecode>HPCC</programreferencecode>
    <programreferencecode>9216</programreferencecode>
    <keyword>verification</keyword>
    <programreferencecode>9218</programreferencecode>
    <fieldofapplication>0000912 Computer Science</fieldofapplication>
    <program>INFORMATION TECHNOLOGY RESEARC</program>
    <programelementcode>1640</programelementcode>
    <state>OR</state>
    <keyword>programming languages</keyword>
    <progmgr>Sol J. Greenspan</progmgr>
    <programreferencecode>9217</programreferencecode>
    <pi>Sheard, Tim</pi>
    <organization>Portland State University</organization>
    <program>PROGRAMMING LANGUAGES</program>
    <programelementcode>7943</programelementcode>
    <amount>668182</amount>
  </document>
  <document>
    <docID>0910415</docID>
    <docDate>September 1, 2009</docDate>
    <docSource></docSource>
    <docText>RI: Large: Collaborative Research: Random Processes and Randomized Algorithms

   Randomness has emerged as a core concept and tool in computation. From modeling phenomena to efficient algorithms to proof techniques, the applications of randomness are ubiquitous and powerful. Notable examples include: construction of important combinatorial objects such as expanders, rigorously establishing phase transitions in physical models, finding polynomial-time algorithms for fundamental sampling problems and approximating #P-hard counting problems, designing probabilistically checkable proofs (PCP's) and establishing the hardness of approximation, and discovering simpler and often faster algorithms for a variety of computational problems. In the course of these tremendous developments, several general-purpose techniques have emerged, and random sampling has become a fundamental, universal tool across sciences, engineering and computation.     This project brings together leading researchers in randomized algorithms to solve hard problems in random sampling, to identify techniques, and to develop new analytical tools. The applications come from a range of fields, including complexity, physics, biology, operations research and mathematics. The most general and widely-studied technique for sampling is simulating a Markov chain by taking a random walk on a suitable state space. The Markov Chain method and its application to sampling, counting and integration, broadly known as the Markov Chain Monte Carlo (MCMC) method, is a central theme of the project.     Intellectual Merit. The project focuses on applications of randomized algorithms and random sampling to rigorously address problems across several disciplines. Within computer science these topics include: massive data sets, where sampling is critical both for finding low-dimensional representations and clustering; routing networks, where sampling has many applications from monitoring and path allocation to optimization; machine learning; and property testing. Recent interactions between computer science and other scientic disciplines have led to many new rigorous applications of sampling, as well as new insights in how to design and analyze efficient algorithms with performance guarantees; for instance, phase transitions in the underlying physical models can cause local Markov chains to be inefficient. The project explores deeper connections between physics and random sampling, including conjectured correlations between reconstruction problems and thresholds for the efficiency of local algorithms. Many related problems arise in biology, such as phylogenetic tree reconstruction and analysis of complex biological networks. In nanotechology, models of self-assembly are simple Markov chains. In mathematics, the techniques used in the analysis of sampling algorithms in general and Markov chains in particular have drawn heavily on probability theory, both discrete and continuous.     Broader Impact. The college of computing at Georgia Tech is home to the new Algorithms and Randomness Center (ARC) with many faculty and students sharing this expertise. The project's activities include designing a summer school for graduate students in randomized algorithms and designing a course for training students from diverse backgrounds and hosting workshops focusing on both theoretical and applied aspects of randomized algorithms. Participation of women and under-represented groups in all of these activities will be encouraged, and the workshops will include tutorials to increase accessibility. These coordinated efforts in education and research will solidify the impact of ARC and make it a premier center for algorithms, randomness and complexity.</docText>
    <keyword>algorithms</keyword>
    <division>CCF</division>
    <directorate>CSE</directorate>
    <award-instr>Standard Grant</award-instr>
    <programreferencecode>HPCC</programreferencecode>
    <programreferencecode>9218</programreferencecode>
    <state>NY</state>
    <fieldofapplication>0000912 Computer Science</fieldofapplication>
    <program>INFORMATION TECHNOLOGY RESEARC</program>
    <programelementcode>1640</programelementcode>
    <keyword>ubiquitous</keyword>
    <keyword>education</keyword>
    <amount>300000</amount>
    <keyword>machine learning</keyword>
    <progmgr>Tracy J. Kimbrel</progmgr>
    <organization>University of Rochester</organization>
    <pi>Stefankovic, Daniel</pi>
  </document>
  <document>
    <docID>0909276</docID>
    <docDate>January 15, 2009</docDate>
    <docSource></docSource>
    <docText>WORKSHOP: Support for the 15th International Symposium on High-Performance Computer Architecture (HPCA-15), 2009, Feb. 14-18, 2009

   The 15th annual IEEE International Symposium on High Performance Computer Architecture (HPCA-15) is co-located with the 14th ACMSIGPLAN Symposium on Principles and Practiceof Parallel Programming (PPoPP 09), which is being held February 14-18, 2009.   HPCA is one of the top conferences in the field of Computer Architecture. The conference addresses a broad spectrum of concerns for computer architecture and computer design including microarchitecture, cache and memory system design, parallel computer architectures, power-efficient architectures, embedded and reconfigurable architectures, I/O systems, and performance evaluation.    The conference organizers are requesting $10,000 to fund 20-30 student travel grants for graduate students attending the conference. Student authors who are presenting papers will receive highest funding priority, followed by non- presenting authors, followed by other students. Students must apply for a travel grant in advance of the conference and are required to write a brief summary of their experience. Grants may cover expenses related to travel to Raleigh for the dates of the conference, and hotel expenses while in Raleigh. The nominal size of the award will be in the range of $250-$500.</docText>
    <division>CCF</division>
    <directorate>CSE</directorate>
    <award-instr>Standard Grant</award-instr>
    <programreferencecode>HPCC</programreferencecode>
    <keyword>architecture</keyword>
    <programreferencecode>9218</programreferencecode>
    <progmgr>Almadena Y. Chtchelkanova</progmgr>
    <fieldofapplication>0000912 Computer Science</fieldofapplication>
    <state>PA</state>
    <amount>10000</amount>
    <organization>University of Pittsburgh</organization>
    <program>COMPUTER ARCHITECTURE</program>
    <programelementcode>7941</programelementcode>
    <pi>Cho, Sangyeun</pi>
  </document>
  <document>
    <docID>0905645</docID>
    <docDate>September 1, 2009</docDate>
    <docSource></docSource>
    <docText>NetSe: Medium: Network Structure, Incentives, and Outcomes

   This project is developing and validating rigorous models of several central problems in the design of the Internet and its applications, which can be viewed as evolving distributed systems composed of software agents employing some algorithmic process.  In these systems, one can predict the outcome of a particular task as a function of a set of input variables: the agent communication pattern, individual incentives, and algorithmic strategy---aspects that have previously been studied in isolation, but rarely in concert.  The PIs are developing an analytic framework that explicitly accounts for both network structure and agent incentives. By considering simple tasks like information diffusion, search, and leader election, they will construct a theory that can be applied to practical problems such as Internet routing, congestion control, and reputation systems.    Intellectual Merit:  This project brings together a team of researchers with backgrounds spanning economics, algorithms, and networking to develop a unified approach to complex social networking that captures both network structure and agent incentives through a rigorous algorithmic framework.  This project employs several research methodologies including human-subject experimentation, algorithm design, economic analysis, and large-scale simulation.    Broader Impact:  The multidisciplinary approach of this project promises to lead to a comprehensive understanding of the effect of network structure and agent incentives in networks.  The project is training graduate and undergraduate students in the skills necessary to deal with social networks, which are emerging as a fundamental underpinning of many applications. The PIs are designing two new courses based upon the research conducted in the project.</docText>
    <keyword>algorithms</keyword>
    <division>CCF</division>
    <directorate>CSE</directorate>
    <award-instr>Standard Grant</award-instr>
    <programreferencecode>HPCC</programreferencecode>
    <keyword>network</keyword>
    <programreferencecode>9218</programreferencecode>
    <state>CA</state>
    <fieldofapplication>0000912 Computer Science</fieldofapplication>
    <keyword>networking</keyword>
    <keyword>simulation</keyword>
    <organization>University of California-San Diego</organization>
    <progmgr>Eun K. Park</progmgr>
    <amount>900000</amount>
    <program>NETWORK SCIENCE &amp; ENGINEERING</program>
    <programelementcode>7794</programelementcode>
    <programreferencecode>7924</programreferencecode>
    <programreferencecode>7794</programreferencecode>
    <pi>Paturi, Ramamohan</pi>
    <copi>Joel Sobel</copi>
    <copi>Mathew McCubbins</copi>
    <copi>Stefan Savage</copi>
    <copi>Alex Snoeren</copi>
  </document>
  <document>
    <docID>0905626</docID>
    <docDate>July 15, 2009</docDate>
    <docSource></docSource>
    <docText>AF: Medium: Center for Quantum Algorithms and Complexity

   Quantum computation has forced a dramatic change in our beliefs about the foundations of computer science, the security of cryptosystems, and the nature of quantum systems. This award focuses on several fundamental algorithmic questions that arise out of this viewpoint. The first is the design of new quantum algorithms. The challenge here is that the major paradigm for the design of quantum algorithms - the hidden subgroup framework - has recently been shown to have severe limitations in its applicability. The center will explore several approaches, including a new framework for the design of quantum algorithms via the quantum approximation of tensor networks, as well as recent work on the use of quantum algorithms for discovering hidden nonlinear structures.    Establishing the limits of quantum algorithms is equally important to the possibility of designing efficient classical cryptosystems that are immune to quantum cryptanalysis. Such "post-quantum" cryptosystems could have an enormous practical impact well before the first working quantum computer is ever built. For this to happen it is necessary to better understand the quantum hardness of concrete classical cryptosystems such as the lattice-based cryptosystems or the McEliese cryptosystem. A different approach would involve designing novel cryptosystems whose security is based on already established quantum hardness results in the hidden subgroup framework.    The center would also study fundamental questions in quantum complexity theory, including the complexity of quantum interactive proof systems. Arguably the most important challenge is proving the quantum analog of the celebrated PCP theorem. This would have wide implications including quantum hardness of inapproximability results, improved fault-tolerance results for adiabatic quantum computing, as well as implications for theoretical condensed matter physics. Another fundamental question is the power of multi-prover quantum interactive proof systems. Resolving whether or not this complexity class is NEXP as in the celebrated classical result MIP = NEXP, is expected to provide important insights into the nature of quantum entanglement.</docText>
    <keyword>algorithms</keyword>
    <division>CCF</division>
    <directorate>CSE</directorate>
    <award-instr>Standard Grant</award-instr>
    <programreferencecode>HPCC</programreferencecode>
    <keyword>security</keyword>
    <programreferencecode>9218</programreferencecode>
    <state>CA</state>
    <fieldofapplication>0000912 Computer Science</fieldofapplication>
    <organization>University of California-Berkeley</organization>
    <progmgr>Dmitry Maslov</progmgr>
    <program>ALGORITHMS</program>
    <programelementcode>7926</programelementcode>
    <pi>Vazirani, Umesh</pi>
    <program>QUANTUM COMPUTING</program>
    <programelementcode>7928</programelementcode>
    <amount>1127080</amount>
  </document>
  <document>
    <docID>0905541</docID>
    <docDate>July 15, 2009</docDate>
    <docSource></docSource>
    <docText>From Frames to Events: A Statistical Approach to Activity Analysis in Multi-Camera Systems

   From Frames to Events: A Statistical Approach to Activity Analysis in Multi-Camera Systems    Venkatesh Saligrama and Janusz Konrad, Boston University, MA 02215    Unlike other sensors, cameras provide excellent resolution, long viewing range,  wide field of view and low latency thus permitting pervasive, wide-area visual  surveillance. However, most network cameras deployed today are simple  capture/compression/transmission devices, at most supporting rudimentary motion    detection; all higher-level processing is highly centralized. This centralized  architecture stems from human-centric visual analytics as well as limited  in-camera processing capacity, and is not scalable to large multi-camera  systems. With over 30 million surveillance cameras in use in the United States  today, that produce 4 billion hours of video footage per week, monitoring by  human operators is obviously not sustainable. An autonomous, distributed,  bandwidth-efficient, real-time video analytics system is needed.    This project makes a step towards building such a system. At its core is a  novel statistical framework for activity discovery and analysis that departs  from the centralized model and leverages processing power of camera nodes.  While traditional activity analysis operates at object level, e.g., objects are  identified, tracked, and tested for abnormality, methods under development in  this project employ activity analysis at pixel level. If the abnormal activity  is reliably identified, then object extraction and tracking focus on region of  interest and thus are relatively straightforward, on account of absence of  clutter. In order to reliably identify pixel-level abnormalities, or more  generally activities, a novel event-based video representation is used that  decomposes video into iid samples lending itself to the application of  statistical learning. In order to facilitate multi-camera collaboration,  geometric invariance of dynamic events is exploited thus bypassing the  difficult issues related to 3-D geometry dependent on viewing angles.</docText>
    <division>CCF</division>
    <directorate>CSE</directorate>
    <award-instr>Standard Grant</award-instr>
    <programreferencecode>HPCC</programreferencecode>
    <state>MA</state>
    <keyword>network</keyword>
    <keyword>architecture</keyword>
    <programreferencecode>9218</programreferencecode>
    <progmgr>John Cozzens</progmgr>
    <fieldofapplication>0000912 Computer Science</fieldofapplication>
    <organization>Trustees of Boston University</organization>
    <program>SIGNAL PROCESSING</program>
    <programelementcode>7936</programelementcode>
    <keyword>visual analytics</keyword>
    <pi>Saligrama, Venkatesh</pi>
    <copi>Janusz Konrad</copi>
    <amount>507364</amount>
  </document>
  <document>
    <docID>0905536</docID>
    <docDate>September 1, 2009</docDate>
    <docSource></docSource>
    <docText>Data Flow across Heterogenous and Frustrated Protein Networks

     This award is funded under the American Recovery and Reinvestment Act of 2009 (Public Law 111-5).  This study addresses a core problem in biology: to predict function from massive and diverse experimental data that identify individual cell components, such as proteins, or suggest interactions among them. The approach will model all such information as networks. New network analyses methods will then be developed to overcome conflicting information due to experimental errors or inherent biological complexities. Other methods will aim at weighing optimally different types of information so that they may be best combined together. The result will pool biological data on a dramatically larger scale than previously feasible to yield a self-consistent and improved picture of protein function.  More broadly, however, the network analysis techniques developed here should apply widely and efficiently to any massive, diverse and conflicting data, typical of complex systems.    Specifically, the investigators will integrate information from frustrated networks by diffusing diverse evolutionary, structural and functional data along the edges of protein graphs. To cope with the large network sizes, and data inconsistencies or alternative interpretation, semi-supervised learning algorithms will be extended, in aim 1, to test prediction accuracy under different network information diffusion mechanisms and, in aim 2, under alternative weighing strategies to pool complementary information networks. The outcome will (1) implement realistic biological networks with millions of nodes and edges to benchmark computational efficiency; (2) predict protein function and the phenotypes they induce based on integrated, massive and heterogeneous biological data sets; and (3), since high computational efficiency will be maintained even in networks with spin glass type frustration, these results will be transformative across a wide variety of fields by extending graph-based semi-supervised learning to a broad, cross-discipline class of complex networks with random interactions. Students will be trained at the interface between computational science and biology and developed software tools will be made public to the research community.</docText>
    <keyword>algorithms</keyword>
    <division>CCF</division>
    <directorate>CSE</directorate>
    <state>TX</state>
    <award-instr>Standard Grant</award-instr>
    <programreferencecode>HPCC</programreferencecode>
    <keyword>network</keyword>
    <programreferencecode>9218</programreferencecode>
    <fieldofapplication>0000912 Computer Science</fieldofapplication>
    <keyword>computational science</keyword>
    <amount>1000000</amount>
    <progmgr>Tatsuya Suda</progmgr>
    <program>BIO COMPUTING</program>
    <programelementcode>7946</programelementcode>
    <programreferencecode>6890</programreferencecode>
    <pi>Lichtarge, Olivier</pi>
    <organization>Baylor College of Medicine</organization>
  </document>
  <document>
    <docID>0905509</docID>
    <docDate>September 1, 2009</docDate>
    <docSource></docSource>
    <docText>SHF: Medium: Hardware/Software Partitioning for Hybrid Shared Memory Multiprocessors

         Hybrid multiprocessor architectures present an unprecedented opportunity for high performance computing through the seamless integration of large number of processors and hardware accelerators. This project addresses the research challenges in the design and exploitation of hybrid multiprocessors through innovations that span across the areas of architectures, compilers, and high-performance computing.  A hybrid cache coherent non-uniform memory access (CC-NUMA) architecture is designed that clusters CPUs, hardware accelerators, and memories to preserve locality and reduce memory latency. Partitioning models are developed to enable optimal partitioning of data among CPUs and hardware accelerators. Compiler techniques are developed for detection of parallelism, its partitioning, and assignment across CPUs and hardware accelerators. The project  enables coexistence of data streaming (push data) and data fetching (pull data) mechanisms. The research benefits from detailed measurements using a 64-processor SGI Altix 4700 CC-NUMA machine with FPGAs, the Intel FSB-FPGA architecture accelerator, and Niveus 4000 workstation with NVIDIA GPUs.        The research has impact on large-scale scientific computing. The hybrid multiprocessor technology is likely to be transferred to industry while the developed software (compilers, simulators and Hybrid SPLASH-2 benchmarks) will be distributed to researchers. The project also has impact on education and research. The SGI Altix machine is already being used in our graduate classes and further projects on hybrid parallel computing are introduced in architecture, parallel processing, and compiler classes. The project contributes to minority undergraduate education in Computer Science since UCR is recognized for its large undergraduate Hispanic population.</docText>
    <division>CCF</division>
    <directorate>CSE</directorate>
    <award-instr>Standard Grant</award-instr>
    <programreferencecode>HPCC</programreferencecode>
    <keyword>parallel computing</keyword>
    <keyword>compiler</keyword>
    <keyword>architecture</keyword>
    <programreferencecode>9218</programreferencecode>
    <state>CA</state>
    <fieldofapplication>0000912 Computer Science</fieldofapplication>
    <keyword>scientific computing</keyword>
    <progmgr>Sankar Basu</progmgr>
    <keyword>education</keyword>
    <keyword>high-performance computing</keyword>
    <copi>Walid Najjar</copi>
    <organization>University of California-Riverside</organization>
    <amount>800000</amount>
    <program>COMPILERS</program>
    <programelementcode>7329</programelementcode>
    <pi>Bhuyan, Laxmi</pi>
    <program>COMPUTER ARCHITECTURE</program>
    <programelementcode>7941</programelementcode>
    <program>DES AUTO FOR MICRO &amp; NANO SYST</program>
    <programelementcode>7945</programelementcode>
    <copi>Rajiv Gupta</copi>
  </document>
  <document>
    <docID>0905473</docID>
    <docDate>July 15, 2009</docDate>
    <docSource></docSource>
    <docText>AF: Medium: Collaborative Research: Integral-Equation-Based Fast Algorithms and Graph-Theoretic Methods for Large-Scale Simulations

   The phenomenal advance in computer technology in terms of processing  speed and capacity, closely described by Moore's law, in the last four  decades has been outpaced by the explosive amount of data that are used  to describe more realistic models in scientific computing. For instance,  the number of unknowns in a linear system has grown from hundreds in   the past to tens of millions nowadays. Fast algorithms such as the  celebrated fast multipole method (FMM) have provided a computational  tool for narrowing the gap. At the same time, there is a great need  and challenge to develop better computation techniques and utilize the  present and emerging computers, with the gain in speed up to a couple   of orders of magnitude. The goal of the proposed research is to   advance computational theories and techniques, in order to meet the   demand and challenge for large scale simulations of complex   systems in scientific, medical and engineering studies.    The research team proposed to investigate, innovate and integrate the  key simulation steps, from analytic re-formulation of system models with  complex geometries to combinatorial optimization in mapping numerical  algorithms to computing architectures.  Many traditional models are  formulated in terms of linear or nonlinear partial differential  equations (PDEs) with boundary conditions on complex geometries. By  the work of other researchers and principal investigators,  integral equation (IE) formulations have lead to better numerical  algorithms in both efficiency and stability, and more importantly  enabled certain important large-scale simulations. It is proposed first  to study the reformulation of traditional PDE models into IE models, as  a direct and analytical approach to innovative algorithm design. Next,  preconditioning techniques will be studied as an indirect and  stabilization approach. Furthermore, Graph-theoretic methods will be  applied to optimize the FMM-based algorithms on various modern  computer architectures, especially, parallel architectures.  These key  components will be studied in conjunction, not in isolation.    The intellectual merits of the proposed work are three-fold.   It sheds lights on (1) the model reformulation into IEs of the second   kind as a fundamental analytic-algorithmic approach to accelerating   and stabilizing numerical computation, (2) the connection between   reformulation and preconditioning, and (3) on the mutual dependence   of numerical algorithms and computer architectures. The proposed   work will have broader impacts on various applications through  timely dissemination with demonstration of case studies.  Three  application areas of specific concern are electrostatics calculation   in molecular dynamics simulations, computational fluid dynamics, and   the study of oxygen delivery in tissues and tumors via microvascular  networks. The proposed work involves interdisciplinary research  collaboration and cultivation of young and new researchers with  multi-disciplinary backgrounds.  Finally, the findings and   algorithms will be embodied in open source high performance   software to facilitate research computing by and large and to   be used in classrooms.</docText>
    <keyword>algorithms</keyword>
    <division>CCF</division>
    <directorate>CSE</directorate>
    <award-instr>Standard Grant</award-instr>
    <programreferencecode>HPCC</programreferencecode>
    <programreferencecode>9218</programreferencecode>
    <fieldofapplication>0000912 Computer Science</fieldofapplication>
    <keyword>scientific computing</keyword>
    <keyword>simulation</keyword>
    <state>NC</state>
    <amount>200000</amount>
    <organization>University of North Carolina at Chapel Hill</organization>
    <progmgr>Lenore M. Mullin</progmgr>
    <program>NUM, SYMBOL, &amp; ALGEBRA COMPUT</program>
    <programelementcode>7933</programelementcode>
    <pi>Huang, Jingfang</pi>
  </document>
  <document>
    <docID>0905464</docID>
    <docDate>July 15, 2009</docDate>
    <docSource></docSource>
    <docText>SHF: Medium: Formal Analysis of Concurrent Software on Relaxed Memory Models

   Programmers are increasingly designing concurrent software to effectively harness the computational power of multi-processor and multi-core architectures.  Writing correct concurrent software is challenging, and system-specific concurrency libraries are particularly vulnerable in that they are affected by the subtle and complex rules governing the relationship among reads and writes to shared memory in multi-processor systems.  The goal of this project is to develop technology that will assist programmers in building high-performance and correct system-level concurrent software with respect to precise modeling of the essential details of the underlying architecture.  The investigators will explore specifications for accurate machine-readable descriptions of experimental and commercial memory models in both constraint-based and operational styles.  To allow developers to understand subtleties of specific memory models, this project will investigate algorithms and tools for checking equivalence between two specifications and for automatically generating test programs that exhibit the differences.  Tools for verifying concurrency libraries with respect to memory model specifications and for automatic insertion of memory ordering fences, will be developed and evaluated on lock-free implementations of commonly used data structures.  The proposed research will be integrated in a new upper-level course on multiprocessor programming.</docText>
    <keyword>algorithms</keyword>
    <division>CCF</division>
    <directorate>CSE</directorate>
    <award-instr>Standard Grant</award-instr>
    <programreferencecode>HPCC</programreferencecode>
    <keyword>architecture</keyword>
    <programreferencecode>9218</programreferencecode>
    <fieldofapplication>0000912 Computer Science</fieldofapplication>
    <state>PA</state>
    <progmgr>Sol J. Greenspan</progmgr>
    <organization>University of Pennsylvania</organization>
    <pi>Alur, Rajeev</pi>
    <amount>1200000</amount>
    <program>SOFTWARE ENG &amp; FORMAL METHODS</program>
    <programelementcode>7944</programelementcode>
    <copi>Milo Martin</copi>
  </document>
  <document>
    <docID>0905459</docID>
    <docDate>September 1, 2009</docDate>
    <docSource></docSource>
    <docText>SHF: Medium: Heterogeneous Virtual Machine: Future Execution Environments for Heterogeneous Many-core Architectures

   A current industry trend aimed at addressing platform performance/power requirements is to create heterogeneous manycore systems, comprised of general purpose and specialized cores designed to accelerate certain application or system functions. A second trend, designed to make it easier to map a wide variety of functions and components to manycore platforms, is platform-level support for system virtualization. This research innovates, implements, and evaluates new virtualization technologies for heterogeneous manycore architectures composed of commodity general-purpose and accelerator cores. The goal is to realize an efficient execution environment for composing and executing a range of computationally and data-intensive applications.    The system abstractions innovated include (i) the HVM (heterogeneous virtual machine) platform abstraction for dynamic composition of resources (e.g., cores, accelerators, memory, I/O) (ii) new methods for managing heterogeneous manycore resources, including power, and (iii) specialized execution environments for optimizing accelerator interactions. These components are implicitly integrated through an execution model wherein the same abstractions and mechanisms are used to dynamically manage diverse accelerator platforms, thereby realizing our vision of freely shared and customized platform resources provided to applications.</docText>
    <division>CCF</division>
    <directorate>CSE</directorate>
    <award-instr>Standard Grant</award-instr>
    <programreferencecode>HPCC</programreferencecode>
    <organization>GA Tech Research Corporation - GA Institute of Technology</organization>
    <state>GA</state>
    <programreferencecode>9218</programreferencecode>
    <progmgr>Almadena Y. Chtchelkanova</progmgr>
    <fieldofapplication>0000912 Computer Science</fieldofapplication>
    <keyword>vision</keyword>
    <pi>Schwan, Karsten</pi>
    <program>SOFTWARE ENG &amp; FORMAL METHODS</program>
    <programelementcode>7944</programelementcode>
    <copi>Ada Gavrilovska</copi>
    <program>HIGH-PERFORMANCE COMPUTING</program>
    <programelementcode>7942</programelementcode>
    <copi>Sudhakar Yalamanchili</copi>
    <copi>Jeffrey Vetter</copi>
    <amount>1090132</amount>
  </document>
  <document>
    <docID>0905395</docID>
    <docDate>July 15, 2009</docDate>
    <docSource></docSource>
    <docText>AF: Medium: Collaborative Research: Integral-Equation-Based Fast Algorithms and Graph-Theoretic Methods for Large-Scale Simulations

   The phenomenal advance in computer technology in terms of processing  speed and capacity, closely described by Moore's law, in the last four  decades has been outpaced by the explosive amount of data that are used  to describe more realistic models in scientific computing. For instance,  the number of unknowns in a linear system has grown from hundreds in   the past to tens of millions nowadays. Fast algorithms such as the  celebrated fast multipole method (FMM) have provided a computational  tool for narrowing the gap. At the same time, there is a great need  and challenge to develop better computation techniques and utilize the  present and emerging computers, with the gain in speed up to a couple   of orders of magnitude. The goal of the proposed research is to   advance computational theories and techniques, in order to meet the   demand and challenge for large scale simulations of complex   systems in scientific, medical and engineering studies.    The research team proposed to investigate, innovate and integrate the  key simulation steps, from analytic re-formulation of system models with  complex geometries to combinatorial optimization in mapping numerical  algorithms to computing architectures.  Many traditional models are  formulated in terms of linear or nonlinear partial differential  equations (PDEs) with boundary conditions on complex geometries. By  the work of other researchers and principal investigators,  integral equation (IE) formulations have lead to better numerical  algorithms in both efficiency and stability, and more importantly  enabled certain important large-scale simulations. It is proposed first  to study the reformulation of traditional PDE models into IE models, as  a direct and analytical approach to innovative algorithm design. Next,  preconditioning techniques will be studied as an indirect and  stabilization approach. Furthermore, Graph-theoretic methods will be  applied to optimize the FMM-based algorithms on various modern  computer architectures, especially, parallel architectures.  These key  components will be studied in conjunction, not in isolation.    The intellectual merits of the proposed work are three-fold.   It sheds lights on (1) the model reformulation into IEs of the second   kind as a fundamental analytic-algorithmic approach to accelerating   and stabilizing numerical computation, (2) the connection between   reformulation and preconditioning, and (3) on the mutual dependence   of numerical algorithms and computer architectures. The proposed   work will have broader impacts on various applications through  timely dissemination with demonstration of case studies.  Three  application areas of specific concern are electrostatics calculation   in molecular dynamics simulations, computational fluid dynamics, and   the study of oxygen delivery in tissues and tumors via microvascular  networks. The proposed work involves interdisciplinary research  collaboration and cultivation of young and new researchers with  multi-disciplinary backgrounds.  Finally, the findings and   algorithms will be embodied in open source high performance   software to facilitate research computing by and large and to   be used in classrooms.</docText>
    <keyword>algorithms</keyword>
    <division>CCF</division>
    <directorate>CSE</directorate>
    <award-instr>Standard Grant</award-instr>
    <programreferencecode>HPCC</programreferencecode>
    <state>NJ</state>
    <programreferencecode>9218</programreferencecode>
    <fieldofapplication>0000912 Computer Science</fieldofapplication>
    <keyword>scientific computing</keyword>
    <keyword>simulation</keyword>
    <amount>300000</amount>
    <organization>New Jersey Institute of Technology</organization>
    <progmgr>Lenore M. Mullin</progmgr>
    <program>NUM, SYMBOL, &amp; ALGEBRA COMPUT</program>
    <programelementcode>7933</programelementcode>
    <pi>Jiang, Shidong</pi>
  </document>
  <document>
    <docID>0905375</docID>
    <docDate>September 1, 2009</docDate>
    <docSource></docSource>
    <docText>SHF: Medium:  Assurance Based Development: A Rational Approach To Creating High Assurance Software

   The objective of this research is to create an approach to software development for critical systems where a high level of assurance is essential to prevent failures from having serious consequences. The approach being developed, Assurance Based Development (ABD), is based on two rigorous arguments that evolve throughout development. A fitness argument shows that the system has the functional, non-functional (include legal and ethical) and dependability properties necessary to satisfy all stakeholders, and a success argument shows how the development activities will yield a satisfactory system within time and budget constraints. Because these arguments capture the concerns of all stakeholders, their state at any given time reveals the obligations incident on the developers. Choosing development activities to meet these obligations facilitates early detection and avoidance of potential assurance difficulties. Choice also allows the developer to deploy expensive technology, such as formal verification, only on components whose assurance needs demand it.Evaluation and assessment of ABD is being conducted using case studies of a prototype artificial heart pump and a security-critical application.</docText>
    <division>CCF</division>
    <directorate>CSE</directorate>
    <award-instr>Standard Grant</award-instr>
    <programreferencecode>HPCC</programreferencecode>
    <amount>250000</amount>
    <keyword>verification</keyword>
    <keyword>security</keyword>
    <programreferencecode>9218</programreferencecode>
    <fieldofapplication>0000912 Computer Science</fieldofapplication>
    <organization>University of Virginia Main Campus</organization>
    <state>VA</state>
    <progmgr>Sol J. Greenspan</progmgr>
    <pi>Knight, John</pi>
    <program>SOFTWARE ENG &amp; FORMAL METHODS</program>
    <programelementcode>7944</programelementcode>
    <copi>Houston Wood</copi>
    <copi>Mitchell Green</copi>
  </document>
  <document>
    <docID>0905346</docID>
    <docDate>August 1, 2009</docDate>
    <docSource></docSource>
    <docText>CIF: Medium: Analog Architectures for Optimization in Signal Processing

   Abstract:    Modern techniques giving the best performance for acquiring and processing signals/images rely on repeatedly solving mathematical optimization problems which can be computationally expensive.  This research involves advancing, by orders of magnitude, the state of the art for solving an important class of these problems.  Rather than developing algorithms tailored to current digital computational platform, the investigators depart completely from this current line of research to study analog architectures for solving these problems. These analog architectures, when fully developed, have the potential for dramatic gains in speed and power efficiency over their digital counterparts.  This research project is inherently multidisciplinary, as it combines recent advances in computational neuroscience, signal processing, and reconfigurable VLSI architectures.  Among other applications, these systems  enable reductions in the time needed to acquire a magnetic resonance image (MRI).    This project focuses primarily on solving optimization programs combining a mean-squared error data fidelity term with a sparsity inducing cost function (e.g., the L1 norm) via an analog dynamical system architecture.  Specifically , the project contains two intertwined threads: circuit implementation and mathematical analysis.   The goal of the circuit implementation thread is to produce a analog circuit which solves significant optimization programs (e.g., tens of thousands of variables) substantially faster than state-of-the-art digital solutions.  The investigators leverage recent advances in reconfigurable analog architectures to achieve efficient designs at this large scale.  The analysis thread includes deriving bounds on the circuit convergence time  and generalizing the architecture to include   other relevant signal processing problems.    The research also involves   applying this analog architecture as a nonlinear "filter" which continuously reacts to changes in the input.</docText>
    <keyword>algorithms</keyword>
    <division>CCF</division>
    <directorate>CSE</directorate>
    <award-instr>Standard Grant</award-instr>
    <programreferencecode>HPCC</programreferencecode>
    <organization>GA Tech Research Corporation - GA Institute of Technology</organization>
    <state>GA</state>
    <keyword>architecture</keyword>
    <programreferencecode>9218</programreferencecode>
    <progmgr>John Cozzens</progmgr>
    <fieldofapplication>0000912 Computer Science</fieldofapplication>
    <keyword>vlsi</keyword>
    <program>SIGNAL PROCESSING</program>
    <programelementcode>7936</programelementcode>
    <copi>Justin Romberg</copi>
    <copi>Paul Hasler</copi>
    <program>SENSOR NETWORKS</program>
    <programelementcode>7938</programelementcode>
    <pi>Rozell, Christopher</pi>
    <amount>906631</amount>
  </document>
  <document>
    <docID>0905320</docID>
    <docDate>July 15, 2009</docDate>
    <docSource></docSource>
    <docText>CIF:Medium:Collaborative Research: Understanding and Managing Interference in Communication Networks

   The ubiquity of wireless devices and services and the ever increasing bandwidth demand make it imperative to improve spectrum utilization. Key to improving spectrum efficiency in a multi-user networks is understanding and managing interference. This collaborative project studies the phenomenon of interference in communication networks and develops a theoretical foundation on how to deal with interference under realistic operating conditions. The study addresses several long-standing open problems; solutions to those problems should collectively advance our understanding on interference and provide guidance on the design of future wireless networks.     This project pursues a broad range of topics that are of great theoretical and practical significance. Conventional wisdom suggests that, since interference has structure that is not present in thermal noise, this structure should be exploited by transceivers. On the other hand, there are situations where interference can be essentially ignored without compromising system throughput, as evidenced by recent breakthroughs in the study of the sum-rate capacity of Gaussian interference channels. This project demonstrates that there are different regimes for interference management and provide means of analysis for various multi-user communication systems. The transformative nature of this project lies in its ambitious goal of establishing a solid theoretical foundation on how interference should be dealt with in complex networks, and in providing guidance on system designs that achieve optimal performance.</docText>
    <division>CCF</division>
    <directorate>CSE</directorate>
    <award-instr>Standard Grant</award-instr>
    <programreferencecode>HPCC</programreferencecode>
    <keyword>wireless</keyword>
    <programreferencecode>9218</programreferencecode>
    <state>NY</state>
    <fieldofapplication>0000912 Computer Science</fieldofapplication>
    <amount>300000</amount>
    <progmgr>William H Tranter</progmgr>
    <organization>Syracuse University</organization>
    <pi>Chen, Biao</pi>
    <program>COMM &amp; INFORMATION THEORY</program>
    <programelementcode>7935</programelementcode>
  </document>
  <document>
    <docID>0905244</docID>
    <docDate>September 1, 2009</docDate>
    <docSource></docSource>
    <docText>SHF: Medium: Exposing and Eliminating Errors at Component Boundaries

   The research investigates a new method for detecting errors that occur at module boundaries involving complex application program interfaces. The method first dynamically observes running programs to obtain constraints that characterize successful interactions at module boundaries. It then uses symbolic dynamic taint tracing to obtain symbolic expressions that characterize how regions of the input map to specific values that appear at module boundaries. A constraint solver then generates new input regions that produce values at module boundaries that violate the observed constraints. The final step is to run the program on the resulting new inputs to see if the inputs expose errors involving interactions between modules.    The significance of the research is that many reusable modules present complex interfaces that are difficult for developers to understand.  Module boundaries therefore comprise a prime location for errors and security vulnerabilities in software systems. The research promises to develop new testing techniques for finding and eliminating these errors and vulnerabilities. Broader impacts include more reliable software infrastructure for our society and the education of a skilled workforce. Intellectual merit includes a better understanding of errors in software systems and new techniques for finding and eliminating these errors.</docText>
    <division>CCF</division>
    <directorate>CSE</directorate>
    <award-instr>Standard Grant</award-instr>
    <programreferencecode>HPCC</programreferencecode>
    <organization>Massachusetts Institute of Technology</organization>
    <state>MA</state>
    <keyword>security</keyword>
    <programreferencecode>9218</programreferencecode>
    <progmgr>Almadena Y. Chtchelkanova</progmgr>
    <fieldofapplication>0000912 Computer Science</fieldofapplication>
    <pi>Rinard, Martin</pi>
    <keyword>education</keyword>
    <amount>600000</amount>
    <program>SOFTWARE ENG &amp; FORMAL METHODS</program>
    <programelementcode>7944</programelementcode>
    <copi>Vijay Ganesh</copi>
  </document>
  <document>
    <docID>0905235</docID>
    <docDate>July 15, 2009</docDate>
    <docSource></docSource>
    <docText>CIF: Medium: Collaborative Research: Understanding and Managing Interference in Communications Networks

   The ubiquity of wireless devices and services and the ever increasing bandwidth demand make it imperative to improve spectrum utilization. Key to improving spectrum efficiency in a multi-user networks is understanding and managing interference. This collaborative project studies the phenomenon of interference in communication networks and develops a theoretical foundation on how to deal with interference under realistic operating conditions. The study addresses several long-standing open problems; solutions to those problems should collectively advance our understanding on interference and provide guidance on the design of future wireless networks.     This project pursues a broad range of topics that are of great theoretical and practical significance. Conventional wisdom suggests that, since interference has structure that is not present in thermal noise, this structure should be exploited by transceivers. On the other hand, there are situations where interference can be essentially ignored without compromising system throughput, as evidenced by recent breakthroughs in the study of the sum-rate capacity of Gaussian interference channels. This project demonstrates that there are different regimes for interference management and provide means of analysis for various multi-user communication systems. The transformative nature of this project lies in its ambitious goal of establishing a solid theoretical foundation on how interference should be dealt with in complex networks, and in providing guidance on system designs that achieve optimal performance.</docText>
    <division>CCF</division>
    <directorate>CSE</directorate>
    <award-instr>Standard Grant</award-instr>
    <programreferencecode>HPCC</programreferencecode>
    <keyword>wireless</keyword>
    <programreferencecode>9218</programreferencecode>
    <state>CA</state>
    <fieldofapplication>0000912 Computer Science</fieldofapplication>
    <organization>University of Southern California</organization>
    <amount>300000</amount>
    <progmgr>William H Tranter</progmgr>
    <program>COMM &amp; INFORMATION THEORY</program>
    <programelementcode>7935</programelementcode>
    <pi>Kramer, Gerhard</pi>
  </document>
  <document>
    <docID>0905224</docID>
    <docDate>August 1, 2009</docDate>
    <docSource></docSource>
    <docText>CIF: Medium: Collaborative Research: Cooperative Networking Across the Layers

   CIF: Medium: Collaborative Research: Cooperative Networking Across the Layers    This research goes beyond the physical layer in defining and analyzing cooperative techniques for wireless networks. By incorporating higher layer properties such as traffic dynamics and access control, the investigators develop a new   theoretical framework for analyzing and designing cooperative networking algorithms across the layers, which includes existing cooperative techniques such as cooperative relaying and network coding. The basis of this research rests on two major points:: first, the realization that cooperative communication at the physical layer cannot be viewed in isolation, since it has implications at the access and network layers, and second, the recognition . that cooperation at the higher layers, in its own right, can significantly impact overall network performance.     This project has three inter-related thrusts: The first thrust studies resource allocation policies which stabilize the queues within various classes of cooperative networks, if stability is indeed attainable. The second thrust determines a family of scheduling algorithms which maximize the volume of traffic served by a cooperative network within a finite horizon. Finally, game theoretic models are developed for cooperative networks where nodes in the network are allowed to  pursue differing objectives, and come to a distributed agreement on the (locally) optimal operating point for the overall network.  This research also considers non-stationary and non-ergodic environments that are more appropriate representations of the wireless channel in a network.</docText>
    <keyword>algorithms</keyword>
    <division>CCF</division>
    <directorate>CSE</directorate>
    <award-instr>Standard Grant</award-instr>
    <programreferencecode>HPCC</programreferencecode>
    <keyword>network</keyword>
    <keyword>wireless</keyword>
    <programreferencecode>9218</programreferencecode>
    <fieldofapplication>0000912 Computer Science</fieldofapplication>
    <state>IL</state>
    <keyword>networking</keyword>
    <organization>Northwestern University</organization>
    <progmgr>William H Tranter</progmgr>
    <pi>Berry, Randall</pi>
    <program>NETWORK CODING AND INFO THEORY</program>
    <programelementcode>7937</programelementcode>
    <amount>379400</amount>
  </document>
  <document>
    <docID>0905208</docID>
    <docDate>September 1, 2009</docDate>
    <docSource></docSource>
    <docText>SHF:  Medium:  Collaborative Research: Throughput-Driven Multi-Core Architecture and a Compilation System

   Computing substrates such as multi-core processors or Field Programmable Gate Arrays (FPGAs) share the characteristic of having two-dimensional arrays of processing elements interconnected by a routing fabric. At one end of the spectrum, FPGAs have single-output programmable logic functions, and at the other end, multi-core chips have complex 32/64-bit processing cores. For different applications, different programmable substrates produce the best area-power-performance tradeoffs. This project is developing a large-scale multi-core substrate that has hundreds or thousands of simple processing cores along with a compilation system that maps computations onto this fabric. This many-core architecture, named Diastolic Array, is coarser-grained than FPGAs but &amp;#64257;ner-grained than conventional multi-cores. To efficiently exploit such a large number of processing cores, the architecture needs spatially mapping a computation to processing cores and communication to the point-to-point interconnect network. To be practically viable, this mapping process must be automated and effective. The project addresses this challenge by simultaneously developing hardware architecture and a compilation system.       A diastolic array chip is expected to outperform FPGAs or general-purpose processors on an interesting class of applications, enabling more efficient prototyping and low-volume production. The outcomes of this project such as statically-con&amp;#64257;gured interconnection architecture with associated algorithms for routing and resource allocation will also be applicable to other multi-core designs. Finally, the project is developing a new parallel processing module for an undergraduate computer architecture class to give sophomores early exposure to parallel hardware, experience with writing parallel programs and using compilers that exploit parallelism.</docText>
    <keyword>algorithms</keyword>
    <division>CCF</division>
    <directorate>CSE</directorate>
    <programreferencecode>HPCC</programreferencecode>
    <programreferencecode>9216</programreferencecode>
    <award-instr>Continuing grant</award-instr>
    <keyword>network</keyword>
    <keyword>architecture</keyword>
    <programreferencecode>9218</programreferencecode>
    <state>NY</state>
    <fieldofapplication>0000912 Computer Science</fieldofapplication>
    <progmgr>Sankar Basu</progmgr>
    <organization>Cornell University</organization>
    <program>DES AUTO FOR MICRO &amp; NANO SYST</program>
    <programelementcode>7945</programelementcode>
    <pi>Suh, Gookwon</pi>
    <amount>230528</amount>
  </document>
  <document>
    <docID>0905204</docID>
    <docDate>August 1, 2009</docDate>
    <docSource></docSource>
    <docText>CIF:Medium:Collaborative Research: Cooperative Networking Across the Layers

   CIF: Medium: Collaborative Research: Cooperative Networking Across the Layers    This research goes beyond the physical layer in defining and analyzing cooperative techniques for wireless networks. By incorporating higher layer properties such as traffic dynamics and access control, the investigators develop a new   theoretical framework for analyzing and designing cooperative networking algorithms across the layers, which includes existing cooperative techniques such as cooperative relaying and network coding. The basis of this research rests on two major points:: first, the realization that cooperative communication at the physical layer cannot be viewed in isolation, since it has implications at the access and network layers, and second, the recognition . that cooperation at the higher layers, in its own right, can significantly impact overall network performance.     This project has three inter-related thrusts: The first thrust studies resource allocation policies which stabilize the queues within various classes of cooperative networks, if stability is indeed attainable. The second thrust determines a family of scheduling algorithms which maximize the volume of traffic served by a cooperative network within a finite horizon. Finally, game theoretic models are developed for cooperative networks where nodes in the network are allowed to  pursue differing objectives, and come to a distributed agreement on the (locally) optimal operating point for the overall network.  This research also considers non-stationary and non-ergodic environments that are more appropriate representations of the wireless channel in a network.</docText>
    <keyword>algorithms</keyword>
    <division>CCF</division>
    <directorate>CSE</directorate>
    <award-instr>Standard Grant</award-instr>
    <programreferencecode>HPCC</programreferencecode>
    <keyword>network</keyword>
    <organization>University of Maryland College Park</organization>
    <state>MD</state>
    <keyword>wireless</keyword>
    <programreferencecode>9218</programreferencecode>
    <fieldofapplication>0000912 Computer Science</fieldofapplication>
    <keyword>networking</keyword>
    <progmgr>William H Tranter</progmgr>
    <program>NETWORK CODING AND INFO THEORY</program>
    <programelementcode>7937</programelementcode>
    <pi>Ephremides, Anthony</pi>
    <amount>371166</amount>
  </document>
  <document>
    <docID>0905200</docID>
    <docDate>August 1, 2009</docDate>
    <docSource></docSource>
    <docText>CIF:  Medium:  Collaborative Research:  Cooperative Networking Across the Layers

   CIF: Medium: Collaborative Research: Cooperative Networking Across the Layers    This research goes beyond the physical layer in defining and analyzing cooperative techniques for wireless networks. By incorporating higher layer properties such as traffic dynamics and access control, the investigators develop a new   theoretical framework for analyzing and designing cooperative networking algorithms across the layers, which includes existing cooperative techniques such as cooperative relaying and network coding. The basis of this research rests on two major points:: first, the realization that cooperative communication at the physical layer cannot be viewed in isolation, since it has implications at the access and network layers, and second, the recognition . that cooperation at the higher layers, in its own right, can significantly impact overall network performance.     This project has three inter-related thrusts: The first thrust studies resource allocation policies which stabilize the queues within various classes of cooperative networks, if stability is indeed attainable. The second thrust determines a family of scheduling algorithms which maximize the volume of traffic served by a cooperative network within a finite horizon. Finally, game theoretic models are developed for cooperative networks where nodes in the network are allowed to  pursue differing objectives, and come to a distributed agreement on the (locally) optimal operating point for the overall network.  This research also considers non-stationary and non-ergodic environments that are more appropriate representations of the wireless channel in a network.</docText>
    <keyword>algorithms</keyword>
    <division>CCF</division>
    <directorate>CSE</directorate>
    <state>TX</state>
    <award-instr>Standard Grant</award-instr>
    <programreferencecode>HPCC</programreferencecode>
    <keyword>network</keyword>
    <keyword>wireless</keyword>
    <programreferencecode>9218</programreferencecode>
    <fieldofapplication>0000912 Computer Science</fieldofapplication>
    <keyword>networking</keyword>
    <organization>University of Texas at Austin</organization>
    <progmgr>William H Tranter</progmgr>
    <program>NETWORK CODING AND INFO THEORY</program>
    <pi>Vishwanath, Sriram</pi>
    <programelementcode>7937</programelementcode>
    <amount>375894</amount>
  </document>
  <document>
    <docID>0905164</docID>
    <docDate>July 15, 2009</docDate>
    <docSource></docSource>
    <docText>AF: Medium: Collaborative Research: Integral-Equation-Based Fast Algorithms and Graph-Theoretic Methods for Large-Scale Simulations

   The phenomenal advance in computer technology in terms of processing  speed and capacity, closely described by Moore's law, in the last four  decades has been outpaced by the explosive amount of data that are used  to describe more realistic models in scientific computing. For instance,  the number of unknowns in a linear system has grown from hundreds in   the past to tens of millions nowadays. Fast algorithms such as the  celebrated fast multipole method (FMM) have provided a computational  tool for narrowing the gap. At the same time, there is a great need  and challenge to develop better computation techniques and utilize the  present and emerging computers, with the gain in speed up to a couple   of orders of magnitude. The goal of the proposed research is to   advance computational theories and techniques, in order to meet the   demand and challenge for large scale simulations of complex   systems in scientific, medical and engineering studies.    The research team proposed to investigate, innovate and integrate the  key simulation steps, from analytic re-formulation of system models with  complex geometries to combinatorial optimization in mapping numerical  algorithms to computing architectures.  Many traditional models are  formulated in terms of linear or nonlinear partial differential  equations (PDEs) with boundary conditions on complex geometries. By  the work of other researchers and principal investigators,  integral equation (IE) formulations have lead to better numerical  algorithms in both efficiency and stability, and more importantly  enabled certain important large-scale simulations. It is proposed first  to study the reformulation of traditional PDE models into IE models, as  a direct and analytical approach to innovative algorithm design. Next,  preconditioning techniques will be studied as an indirect and  stabilization approach. Furthermore, Graph-theoretic methods will be  applied to optimize the FMM-based algorithms on various modern  computer architectures, especially, parallel architectures.  These key  components will be studied in conjunction, not in isolation.    The intellectual merits of the proposed work are three-fold.   It sheds lights on (1) the model reformulation into IEs of the second   kind as a fundamental analytic-algorithmic approach to accelerating   and stabilizing numerical computation, (2) the connection between   reformulation and preconditioning, and (3) on the mutual dependence   of numerical algorithms and computer architectures. The proposed   work will have broader impacts on various applications through  timely dissemination with demonstration of case studies.  Three  application areas of specific concern are electrostatics calculation   in molecular dynamics simulations, computational fluid dynamics, and   the study of oxygen delivery in tissues and tumors via microvascular  networks. The proposed work involves interdisciplinary research  collaboration and cultivation of young and new researchers with  multi-disciplinary backgrounds.  Finally, the findings and   algorithms will be embodied in open source high performance   software to facilitate research computing by and large and to   be used in classrooms.</docText>
    <keyword>algorithms</keyword>
    <division>CCF</division>
    <directorate>CSE</directorate>
    <award-instr>Standard Grant</award-instr>
    <programreferencecode>HPCC</programreferencecode>
    <programreferencecode>9218</programreferencecode>
    <fieldofapplication>0000912 Computer Science</fieldofapplication>
    <keyword>scientific computing</keyword>
    <keyword>simulation</keyword>
    <state>NC</state>
    <organization>Duke University</organization>
    <progmgr>Lenore M. Mullin</progmgr>
    <program>NUM, SYMBOL, &amp; ALGEBRA COMPUT</program>
    <programelementcode>7933</programelementcode>
    <amount>399997</amount>
    <pi>Sun, Xiaobai</pi>
    <copi>Nikos Pitsianis</copi>
  </document>
  <document>
    <docID>0905014</docID>
    <docDate>August 15, 2009</docDate>
    <docSource></docSource>
    <docText>NetSE: Medium: A Data Mining Approach to Diagnostic Debugging in Sensor Networks

   Abstract (limited to 250 words): This award is funded under the American Recovery and Reinvestment Act of 2009 (Public Law 111-5).     Our nation's infrastructure relies increasingly on networks that connect growing amounts of data and systems, including those that interact directly with the physical world. Increased connectivity leads to a higher degree of vulnerability to attacks, malfunctions, and failures that can cascade more rapidly along network links. The project develops techniques to improve the reliability of emerging networked infrastructure, where computation, communication, and sensing are intimately intertwined. Use of data mining techniques is investigated to determine and eliminate scenarios involving cascaded failures and propagation of performance problems. The complexity of emerging networked and pervasive computing systems increases maintenance cost, challenges classical design approaches, and makes traditional diagnostics and debugging tools less effective at catching problems. To reverse these trends, this project develops tools that are specifically suited to address three fundamental challenges of complex distributed systems; namely, non-reproducible stochastic behavior, high interactive complexity, and physical resource constraints. Other than improving reliability, this research is integrated with education curricula at the University of Illinois, offering real-world challenges to intellectually stimulate both graduate and undergraduate students, while seeking avenues to encourage cultural diversity and promote women and minority involvement in engineering. Laboratory modules allow students to experiment with and diagnose real-world design problems and cascading interaction anomalies in a hands-on fashion. The project will result in improved versions of a data mining textbook by the Co-PI, which is currently considered the standard reference in the field.</docText>
    <division>CCF</division>
    <directorate>CSE</directorate>
    <award-instr>Standard Grant</award-instr>
    <programreferencecode>HPCC</programreferencecode>
    <keyword>network</keyword>
    <programreferencecode>9218</programreferencecode>
    <fieldofapplication>0000912 Computer Science</fieldofapplication>
    <organization>University of Illinois at Urbana-Champaign</organization>
    <state>IL</state>
    <keyword>education</keyword>
    <progmgr>Eun K. Park</progmgr>
    <keyword>data mining</keyword>
    <copi>Jiawei Han</copi>
    <programreferencecode>6890</programreferencecode>
    <program>NETWORK SCIENCE &amp; ENGINEERING</program>
    <pi>Abdelzaher, Tarek</pi>
    <amount>1001565</amount>
    <programelementcode>7794</programelementcode>
    <programreferencecode>7924</programreferencecode>
    <programreferencecode>7794</programreferencecode>
  </document>
  <document>
    <docID>0904832</docID>
    <docDate>September 1, 2009</docDate>
    <docSource></docSource>
    <docText>AF: Medium: Collaborative Research: Approximate Computational Geometry via Controlled Linear Perturbation

   The investigators will develop an approximate computational geometry that is algorithm independent, accurate, and fast.  Geometric predicate evaluation and element construction will be performed approximately using floating point arithmetic.  Degeneracy will be handled transparently.  The evaluation and construction techniques will be encapsulated in a software library that will be free for nonprofit use.    The research challenge is robustness: the output of an approximate algorithm must be correct for a small perturbation of the given input.  This definition extends the numerical analysis definition of a stable algorithm to cover combinatorial error.  Robustness is a fundamental computer science problem that is a major challenge in computational geometry.  The predominant strategy in computational geometry, exact computation using algebraic geometry, has high computational complexity and contradicts the standard scientific and engineering strategy of approximate computation with error bounds.  The investigators will adapt approximate computation to the special needs of computational geometry, which is primarily combinatorial.  This task involves core research at the interface between computational geometry and numerical computing.    Robust approximate computation will transform how computational geometry is taught, how algorithms are developed and implemented, and how the field interacts with the wider scientific and engineering community.  Introductory courses will present a rigorous, practical robustness theory, instead of treating robustness in an ad hoc, incomplete way.  Programmers will implement real RAM algorithms as stated, using our library to ensure robustness and to handle degeneracy, instead of addressing these problems anew for every algorithm, which is often a major research challenge.  Computational geometry will be available to other disciplines in the form of high-quality software libraries, akin to modern applied mathematics libraries.</docText>
    <keyword>algorithms</keyword>
    <division>CCF</division>
    <directorate>CSE</directorate>
    <award-instr>Standard Grant</award-instr>
    <programreferencecode>HPCC</programreferencecode>
    <programreferencecode>9218</programreferencecode>
    <organization>Purdue University</organization>
    <state>IN</state>
    <fieldofapplication>0000912 Computer Science</fieldofapplication>
    <keyword>computational geometry</keyword>
    <amount>300000</amount>
    <progmgr>Dmitry Maslov</progmgr>
    <pi>Sacks, Elisha</pi>
    <program>ALGORITHMS</program>
    <programelementcode>7926</programelementcode>
  </document>
  <document>
    <docID>0904707</docID>
    <docDate>September 1, 2009</docDate>
    <docSource></docSource>
    <docText>AF: Medium: Collaborative Research: Approximate Computational Geometry via Controlled Linear Perturbation

   The investigators will develop an approximate computational geometry that is algorithm independent, accurate, and fast.  Geometric predicate evaluation and element construction will be performed approximately using floating point arithmetic.  Degeneracy will be handled transparently.  The evaluation and construction techniques will be encapsulated in a software library that will be free for nonprofit use.    The research challenge is robustness: the output of an approximate algorithm must be correct for a small perturbation of the given input.  This definition extends the numerical analysis definition of a stable algorithm to cover combinatorial error.  Robustness is a fundamental computer science problem that is a major challenge in computational geometry.  The predominant strategy in computational geometry, exact computation using algebraic geometry, has high computational complexity and contradicts the standard scientific and engineering strategy of approximate computation with error bounds.  The investigators will adapt approximate computation to the special needs of computational geometry, which is primarily combinatorial.  This task involves core research at the interface between computational geometry and numerical computing.    Robust approximate computation will transform how computational geometry is taught, how algorithms are developed and implemented, and how the field interacts with the wider scientific and engineering community.  Introductory courses will present a rigorous, practical robustness theory, instead of treating robustness in an ad hoc, incomplete way.  Programmers will implement real RAM algorithms as stated, using our library to ensure robustness and to handle degeneracy, instead of addressing these problems anew for every algorithm, which is often a major research challenge.  Computational geometry will be available to other disciplines in the form of high-quality software libraries, akin to modern applied mathematics libraries.</docText>
    <keyword>algorithms</keyword>
    <division>CCF</division>
    <directorate>CSE</directorate>
    <award-instr>Standard Grant</award-instr>
    <programreferencecode>HPCC</programreferencecode>
    <programreferencecode>9218</programreferencecode>
    <fieldofapplication>0000912 Computer Science</fieldofapplication>
    <state>FL</state>
    <keyword>computational geometry</keyword>
    <amount>300000</amount>
    <progmgr>Dmitry Maslov</progmgr>
    <organization>University of Miami</organization>
    <pi>Milenkovic, Victor</pi>
    <program>ALGORITHMS</program>
    <programelementcode>7926</programelementcode>
  </document>
  <document>
    <docID>0904619</docID>
    <docDate>July 15, 2009</docDate>
    <docSource></docSource>
    <docText>CIF:Medium:Collaborative Research: Understanding and Managing Interference in Communication Networks

   The ubiquity of wireless devices and services and the ever increasing bandwidth demand make it imperative to improve spectrum utilization. Key to improving spectrum efficiency in a multi-user networks is understanding and managing interference. This collaborative project studies the phenomenon of interference in communication networks and develops a theoretical foundation on how to deal with interference under realistic operating conditions. The study addresses several long-standing open problems; solutions to those problems should collectively advance our understanding on interference and provide guidance on the design of future wireless networks.     This project pursues a broad range of topics that are of great theoretical and practical significance. Conventional wisdom suggests that, since interference has structure that is not present in thermal noise, this structure should be exploited by transceivers. On the other hand, there are situations where interference can be essentially ignored without compromising system throughput, as evidenced by recent breakthroughs in the study of the sum-rate capacity of Gaussian interference channels. This project demonstrates that there are different regimes for interference management and provide means of analysis for various multi-user communication systems. The transformative nature of this project lies in its ambitious goal of establishing a solid theoretical foundation on how interference should be dealt with in complex networks, and in providing guidance on system designs that achieve optimal performance.</docText>
    <division>CCF</division>
    <directorate>CSE</directorate>
    <award-instr>Standard Grant</award-instr>
    <programreferencecode>HPCC</programreferencecode>
    <keyword>wireless</keyword>
    <programreferencecode>9218</programreferencecode>
    <fieldofapplication>0000912 Computer Science</fieldofapplication>
    <pi>Veeravalli, Venugopal</pi>
    <organization>University of Illinois at Urbana-Champaign</organization>
    <state>IL</state>
    <progmgr>William H Tranter</progmgr>
    <program>COMM &amp; INFORMATION THEORY</program>
    <programelementcode>7935</programelementcode>
    <amount>299300</amount>
  </document>
  <document>
    <docID>0904598</docID>
    <docDate>September 1, 2009</docDate>
    <docSource></docSource>
    <docText>SHF:  Medium:  Collaborative Research: Throughput-Driven Multi-Core Architecture and a Compilation System

   Computing substrates such as multi-core processors or Field Programmable Gate Arrays (FPGAs) share the characteristic of having two-dimensional arrays of processing elements interconnected by a routing fabric. At one end of the spectrum, FPGAs have single-output programmable logic functions, and at the other end, multi-core chips have complex 32/64-bit processing cores. For different applications, different programmable substrates produce the best area-power-performance tradeoffs. This project is developing a large-scale multi-core substrate that has hundreds or thousands of simple processing cores along with a compilation system that maps computations onto this fabric. This many-core architecture, named Diastolic Array, is coarser-grained than FPGAs but &amp;#64257;ner-grained than conventional multi-cores. To efficiently exploit such a large number of processing cores, the architecture needs spatially mapping a computation to processing cores and communication to the point-to-point interconnect network. To be practically viable, this mapping process must be automated and effective. The project addresses this challenge by simultaneously developing hardware architecture and a compilation system.      A diastolic array chip is expected to outperform FPGAs or general-purpose processors on an interesting class of applications, enabling more efficient prototyping and low-volume production. The outcomes of this project such as statically-con&amp;#64257;gured interconnection architecture with associated algorithms for routing and resource allocation will also be applicable to other multi-core designs. Finally, the project is developing a new parallel processing module for an undergraduate computer architecture class to give sophomores early exposure to parallel hardware, experience with writing parallel programs and using compilers that exploit parallelism.</docText>
    <keyword>algorithms</keyword>
    <division>CCF</division>
    <directorate>CSE</directorate>
    <award-instr>Standard Grant</award-instr>
    <programreferencecode>HPCC</programreferencecode>
    <organization>Massachusetts Institute of Technology</organization>
    <state>MA</state>
    <keyword>network</keyword>
    <keyword>architecture</keyword>
    <programreferencecode>9218</programreferencecode>
    <fieldofapplication>0000912 Computer Science</fieldofapplication>
    <progmgr>Sankar Basu</progmgr>
    <amount>450000</amount>
    <program>DES AUTO FOR MICRO &amp; NANO SYST</program>
    <programelementcode>7945</programelementcode>
    <pi>Devadas, Srini</pi>
  </document>
  <document>
    <docID>0904577</docID>
    <docDate>September 1, 2009</docDate>
    <docSource></docSource>
    <docText>SHF: MEDIUM: Semiconductor Life Extenstion through Reconfiguration

       Industry will soon manufacture transistors whose sizes are on the order of atoms. These tiny transistors are fragile, meaning each transistor will be different and will change during use.  Many transistors will be unusable when first built; still others will degrade or fail with use.  Like people or snowflakes, each of our components (e.g. microprocessors, graphic chips, memories) and systems (e.g. cell phones,  mp3 players, anti-lock brakes) built with these tiny transistors will be unique.  Traditional, one-size-fits-all approaches assign tasks to transistors oblivious of their unique strengths and weaknesses; these approaches waste much of the potential benefits of these tiny transistors, leading to systems that cost too much, use too much energy, and fail too soon.  This research explores a novel assignment approach that assigns tasks adaptively based on measured transistor characteristics.  The fastest transistors are assigned where they most accelerate performance, while the slower transistors can still be used for less time-critical tasks.  Assignments are further re-evaluated during system operation, allowing fresh transistors to replace transistors that wear out.      Practically, this means IC manufacturers can produce smaller transistors and continue to deliver more capable electronics (e.g. digital video recorders, cell phones, laptops, supercomputers) for fixed dollar budgets.  These capabilities continue to improve our quality of life, providing richer media, better communication, greater automation, and greater safety.  This work will reduce the energy per computational task thereby extending battery life, reducing energy bills, and facilitating cooler operation.  Replacement and reassignment mean electronic components will last longer and degrade gracefully.</docText>
    <division>CCF</division>
    <directorate>CSE</directorate>
    <award-instr>Standard Grant</award-instr>
    <programreferencecode>HPCC</programreferencecode>
    <programreferencecode>9218</programreferencecode>
    <fieldofapplication>0000912 Computer Science</fieldofapplication>
    <state>PA</state>
    <progmgr>Chitaranjan Das</progmgr>
    <organization>University of Pennsylvania</organization>
    <pi>DeHon, Andre</pi>
    <program>COMPUTER ARCHITECTURE</program>
    <programelementcode>7941</programelementcode>
    <amount>749999</amount>
  </document>
  <document>
    <docID>0904371</docID>
    <docDate>September 1, 2009</docDate>
    <docSource></docSource>
    <docText>SHF: Medium: MACANTOK -- a MAchine-Code-ANalysis TOol Kit -- and its Applications

   Recent work has revealed how important it is to examine the  properties of programs after they have been translated to machine  code.  For instance, many security exploits depend on  platform-specific features that are not visible at the source-code  level, such as memory-layout details (e.g., the offsets of variables  in activation records and padding between fields of a structure).  The  expected contributions of the project include (i) a  language-independent tool generator that, from a formal specification  of a given instruction set's syntax and semantics, generates  implementations of dynamic-analysis, static-analysis, and  symbolic-evaluation components tailored to that instruction set, and  (ii) a variety of prototype language-specific applications (i.e.,  specific machine-code-analysis tools), including     o A tool to automate the detection of bugs and security     vulnerabilities in machine code. The aim is to identify definite     bugs and vulnerabilities, and information about what is required to     trigger them.   o A tool to check sequencing properties on machine code.   o A tool that can aid in detecting interoperability problems among     components by inferring input/output and network-communication     formats, and by summarizing the behavior of a component's client.    The results will help programmers create correct, reliable, and secure  software systems by providing them with new kinds of tools to (a) verify  properties of a program?s behavior, and (b) find potential bugs and  security vulnerabilities.</docText>
    <division>CCF</division>
    <directorate>CSE</directorate>
    <award-instr>Standard Grant</award-instr>
    <programreferencecode>HPCC</programreferencecode>
    <keyword>network</keyword>
    <keyword>security</keyword>
    <programreferencecode>9218</programreferencecode>
    <fieldofapplication>0000912 Computer Science</fieldofapplication>
    <state>WI</state>
    <organization>University of Wisconsin-Madison</organization>
    <progmgr>Sol J. Greenspan</progmgr>
    <amount>600000</amount>
    <pi>Reps, Thomas</pi>
    <program>SOFTWARE ENG &amp; FORMAL METHODS</program>
    <programelementcode>7944</programelementcode>
  </document>
  <document>
    <docID>0904305</docID>
    <docDate>July 15, 2009</docDate>
    <docSource></docSource>
    <docText>CIF:Medium:Collaborative Research:Understanding and Managing Interference in Communications Networks

   The ubiquity of wireless devices and services and the ever increasing bandwidth demand make it imperative to improve spectrum utilization. Key to improving spectrum efficiency in a multi-user networks is understanding and managing interference. This collaborative project studies the phenomenon of interference in communication networks and develops a theoretical foundation on how to deal with interference under realistic operating conditions. The study addresses several long-standing open problems; solutions to those problems should collectively advance our understanding on interference and provide guidance on the design of future wireless networks.     This project pursues a broad range of topics that are of great theoretical and practical significance. Conventional wisdom suggests that, since interference has structure that is not present in thermal noise, this structure should be exploited by transceivers. On the other hand, there are situations where interference can be essentially ignored without compromising system throughput, as evidenced by recent breakthroughs in the study of the sum-rate capacity of Gaussian interference channels. This project demonstrates that there are different regimes for interference management and provide means of analysis for various multi-user communication systems. The transformative nature of this project lies in its ambitious goal of establishing a solid theoretical foundation on how interference should be dealt with in complex networks, and in providing guidance on system designs that achieve optimal performance.</docText>
    <division>CCF</division>
    <directorate>CSE</directorate>
    <award-instr>Standard Grant</award-instr>
    <programreferencecode>HPCC</programreferencecode>
    <organization>Massachusetts Institute of Technology</organization>
    <state>MA</state>
    <keyword>wireless</keyword>
    <programreferencecode>9218</programreferencecode>
    <fieldofapplication>0000912 Computer Science</fieldofapplication>
    <amount>300000</amount>
    <progmgr>William H Tranter</progmgr>
    <pi>Zheng, Lizhong</pi>
    <program>COMM &amp; INFORMATION THEORY</program>
    <programelementcode>7935</programelementcode>
  </document>
  <document>
    <docID>0904124</docID>
    <docDate>July 1, 2009</docDate>
    <docSource></docSource>
    <docText>Collaborative Research: SGER: Layout Generation Tools for Double-Gate-Transistor-Array-Based IC Designs

     Title: Collaborative Research: SGER: Layout Generation Tools for Double-Gate-Transistor-Array-Based IC Designs    CCF - 0904122    Maly, Wojciech    (Carnegie-Mellon University)    CCF - 0904124    Marek-Sadowska, Malgorzata  (University of California-Santa Barbara)    ABSTRACT  The proposed project aims to demonstrate the feasibility of an approach that can potentially remedy the huge productivity crisis plaguing the IC industry. The PIs  propose a design methodology utilizing transistor-array-based canvases. The building block of a canvas is a vertical slit (VeS), dual-gate, junction-less transistor that can be fabricated with an SOI-like process. Canvases can be configured into useful circuits by customizing interconnects fabricated in a metallization process. In this way, one of the show stoppers of the modern design, lithographic imperfections, can be almost completely eliminated. The research proposed here is focused on developing basic layout tools for VeS-transistor arrays to show that dense transistor layouts are feasible, and to quantify the performance and power consumption of circuits built from VeS transistors.      If successful, the methodology may have a huge effect on IC manufacturing and design practices.  The design and manufacturing strategy proposed here has a very real chance of helping designers  to make rapid use of the huge number of transistors available on a single chip without sacrificing performance and cost. The VeS transistor arrays can also serve as foundations for 3-D integration.</docText>
    <division>CCF</division>
    <directorate>CSE</directorate>
    <award-instr>Standard Grant</award-instr>
    <programreferencecode>HPCC</programreferencecode>
    <programreferencecode>9237</programreferencecode>
    <programreferencecode>9218</programreferencecode>
    <state>CA</state>
    <fieldofapplication>0000912 Computer Science</fieldofapplication>
    <organization>University of California-Santa Barbara</organization>
    <progmgr>Sankar Basu</progmgr>
    <pi>Marek-Sadowska, Malgorzata</pi>
    <program>DES AUTO FOR MICRO &amp; NANO SYST</program>
    <programelementcode>7945</programelementcode>
    <amount>167326</amount>
  </document>
  <document>
    <docID>0904122</docID>
    <docDate>July 1, 2009</docDate>
    <docSource></docSource>
    <docText>Collaborative Research: SGER: Layout Generation Tools for Double-Gate-Transistor-Array-Based IC Designs

     Title: Collaborative Research: SGER: Layout Generation Tools for Double-Gate-Transistor-Array-Based IC Designs    CCF - 0904122    Maly, Wojciech    (Carnegie-Mellon University)    CCF - 0904124    Marek-Sadowska, Malgorzata  (University of California-Santa Barbara)    ABSTRACT  The proposed project aims to demonstrate the feasibility of an approach that can potentially remedy the huge productivity crisis plaguing the IC industry. The PIs  propose a design methodology utilizing transistor-array-based canvases. The building block of a canvas is a vertical slit (VeS), dual-gate, junction-less transistor that can be fabricated with an SOI-like process. Canvases can be configured into useful circuits by customizing interconnects fabricated in a metallization process. In this way, one of the show stoppers of the modern design, lithographic imperfections, can be almost completely eliminated. The research proposed here is focused on developing basic layout tools for VeS-transistor arrays to show that dense transistor layouts are feasible, and to quantify the performance and power consumption of circuits built from VeS transistors.      If successful, the methodology may have a huge effect on IC manufacturing and design practices.  The design and manufacturing strategy proposed here has a very real chance of helping designers  to make rapid use of the huge number of transistors available on a single chip without sacrificing performance and cost. The VeS transistor arrays can also serve as foundations for 3-D integration.</docText>
    <division>CCF</division>
    <directorate>CSE</directorate>
    <award-instr>Standard Grant</award-instr>
    <programreferencecode>HPCC</programreferencecode>
    <programreferencecode>9237</programreferencecode>
    <programreferencecode>9218</programreferencecode>
    <fieldofapplication>0000912 Computer Science</fieldofapplication>
    <state>PA</state>
    <organization>Carnegie-Mellon University</organization>
    <progmgr>Sankar Basu</progmgr>
    <pi>Maly, Wojciech</pi>
    <program>DES AUTO FOR MICRO &amp; NANO SYST</program>
    <programelementcode>7945</programelementcode>
    <amount>32674</amount>
  </document>
  <document>
    <docID>0903549</docID>
    <docDate>August 1, 2009</docDate>
    <docSource></docSource>
    <docText>Architectures for Highly-Efficient 1000+ Core Chips for Compute and Data-Intensive Applications

   "This award is funded under the American Recovery and Reinvestment Act of 2009 (Public Law 111-5)."    Many emerging and future electronics applications require large amounts of digital signal processing, and operate with very limited power budgets. Examples include: many types of wireless communications, medical imaging such as ultrasound, sensor networks, and portable multimedia devices. A very promising solution for the processing of these workloads is a single-chip platform containing one thousand or more simple and highly-efficient programmable processors. The goals of this project are to: develop architectural hardware concepts and software tools that enable high-performance and energy-efficient computational platforms, introduce results into several courses at UC Davis, and make results and tools widely and easily available to other researchers.     In particular, the project goals will be achieved by exploring: 1) novel inter-processor connection topologies and processor shapes, 2) new algorithms for mapping large collections of software tasks onto processor arrays, 3) specialized hardware processors for common tasks, and 4) architectures for efficient shared and configurable memories.  The PIs are active in several campus-wide and national organizations that work to attract and retain members of under-represented groups to engage in research and complete graduate degrees in science and engineering. Research effort and results will be instrumental in the cross-disciplinary training of future scientists and engineers in the design of massive processing arrays.</docText>
    <keyword>algorithms</keyword>
    <division>CCF</division>
    <directorate>CSE</directorate>
    <award-instr>Standard Grant</award-instr>
    <programreferencecode>HPCC</programreferencecode>
    <keyword>wireless</keyword>
    <programreferencecode>9218</programreferencecode>
    <state>CA</state>
    <fieldofapplication>0000912 Computer Science</fieldofapplication>
    <keyword>multimedia</keyword>
    <organization>University of California-Davis</organization>
    <progmgr>Chitaranjan Das</progmgr>
    <pi>Baas, Bevan</pi>
    <programreferencecode>6890</programreferencecode>
    <program>MCDA</program>
    <program>INTEGRATIVE, HYBRD &amp; COMPLX SY</program>
    <programelementcode>7786</programelementcode>
    <programelementcode>7564</programelementcode>
    <programreferencecode>7786</programreferencecode>
    <copi>Soheil Ghiasi</copi>
    <amount>317000</amount>
  </document>
  <document>
    <docID>0903541</docID>
    <docDate>July 15, 2009</docDate>
    <docSource></docSource>
    <docText>Synthesis and Mapping for Application-Specific Processor Networks

   Proposal ID: 0903541	  PI name: Cong, Jason	  Inst.:U of Cal Los Angeles	  Title: Synthesis and Mapping for Application-Specific Processor Networks    Abstract:    The electronic industry is facing great challenge in terms of design complexity and productivity. Today?s complex system-on-a-chip (SOC) design has over one billion transistors and requires many man-years to design, resulting prohibitively high design cost.  The goal of this project is to significantly improve the design productivity for electronic systems to enable cost-efficient innovation.   In this proposal the PIs explore the concept of using a collection of application-specific processors as a general platform for design and implementation of a domain-specific SOC which can be used for multiple applications in a common domain to amortize the design time and cost. Such a platform may consist of a number of fixed and customizable processors, customized logic blocks, field-programmable logic blocks, and a customizable network-on-chip. Effectively, the PIs are extending the standard cell-based methodology for application-specific integrated circuit designs to the application-specific processor-based design methodology for embedded system designs. The proposed design methodology will significantly raise the level of design abstraction, in turn improve the electronic design productivity and cost, and enable cost-efficient innovation. This project also includes the integration of research and education ? the project will expose the new concepts and research results from this project to graduate students and upper-division undergraduate students via new courses and individual studies. The integrated research and education program is also designed to attract underrepresented students via partnership with other campus organizations focused on diversity, such as the UCLA Center for Excellence in Engineering and Diversity and the Society of Woman Engineers.</docText>
    <division>CCF</division>
    <directorate>CSE</directorate>
    <award-instr>Standard Grant</award-instr>
    <programreferencecode>HPCC</programreferencecode>
    <keyword>network</keyword>
    <programreferencecode>9218</programreferencecode>
    <state>CA</state>
    <fieldofapplication>0000912 Computer Science</fieldofapplication>
    <organization>University of California-Los Angeles</organization>
    <progmgr>Sankar Basu</progmgr>
    <keyword>education</keyword>
    <pi>Cong, Jason</pi>
    <program>MCDA</program>
    <program>INTEGRATIVE, HYBRD &amp; COMPLX SY</program>
    <programelementcode>7786</programelementcode>
    <programelementcode>7564</programelementcode>
    <amount>338999</amount>
  </document>
  <document>
    <docID>0903513</docID>
    <docDate>September 1, 2009</docDate>
    <docSource></docSource>
    <docText>System-level Design of Streaming Applications on Domain Specific Multi-core Processors

   "This award is funded under the American Recovery and Reinvestment Act of 2009 (Public Law 111-5)."        Domain specific multi-core processors (DSMPs) are aimed at high performance embedded system applications (image/signal processing, networking, graphics, medical instrumentation, and so on). DSMPs incorporate several architectural innovations including symmetric multi-processing, block multi-threading, hardware accelerators, scratch-pad memories and support for inter-processor communication. However, there is a lack of application development tools which requires the designer to manually divide the functionality among threads and processors, and determine the data mapping on the memory elements. This low level approach to programming leads to increased design time in the best case, and poor quality designs in the worst case. Further, with increasing power densities in each successive generation of processors, it is expected that eventually performance optimization on DSMPs would have to consider power and thermal constraints.     The proposal aims to address two research issues. First is the development of system-level design techniques for programming on DSMPs. The techniques will take a streaming application description and target processor features as inputs, and automatically generate a mapping of the application on the DSMP with an objective of maximizing the performance. The second task focuses on development of power and thermal-aware design techniques for DSMPs. The power and thermal-aware design techniques will perform automated system-level application mapping on DSMP architectures under respective peak power and temperature constraints.     As DSMP architectures are aimed at embedded system applications, the research will have an impact on many interfaces of human-computer interaction. Education activities will include training of graduate students, dissemination of research outcomes, and incorporation of the results in undergraduate/graduate coursework.</docText>
    <division>CCF</division>
    <directorate>CSE</directorate>
    <award-instr>Standard Grant</award-instr>
    <programreferencecode>HPCC</programreferencecode>
    <state>AZ</state>
    <programreferencecode>9218</programreferencecode>
    <fieldofapplication>0000912 Computer Science</fieldofapplication>
    <keyword>graphics</keyword>
    <keyword>networking</keyword>
    <keyword>education</keyword>
    <organization>Arizona State University</organization>
    <progmgr>Chitaranjan Das</progmgr>
    <keyword>human-computer interaction</keyword>
    <pi>Chatha, Karamvir</pi>
    <programreferencecode>6890</programreferencecode>
    <program>MCDA</program>
    <program>INTEGRATIVE, HYBRD &amp; COMPLX SY</program>
    <programelementcode>7786</programelementcode>
    <programelementcode>7564</programelementcode>
    <programreferencecode>7786</programreferencecode>
    <copi>Goran Konjevod</copi>
    <amount>233014</amount>
  </document>
  <document>
    <docID>0903491</docID>
    <docDate>August 1, 2009</docDate>
    <docSource></docSource>
    <docText>Collaborative Research: Formal Analysis of Multicore Communication APIs and Applications

   "This award is funded under the American Recovery and Reinvestment Act of 2009(Public Law 111-5)."      CCF - 0903408    Collaborative Research - MCDA: Formal Analysis of Multicore Communication APIs and Applications  Gopalakrishnan, Ganesh L.       University of Utah     CCF - 0903491    Collaborative Research: Formal Analysis of Multicore Communication APIs and Applications  Mercer, Eric G.       Brigham Young Univ      ABSRTACT  This project contributes tools to engineer future information processing systems so that they operate reliably and efficiently. Given that many of these systems will be produced on single micro-chips, and given the increasing demands for rapid turn-around times of designs, manufacturers are standardizing on methods by which the central processing units in these chips may communicate. Such standards will eliminate duplication of labor and allow components originating from different manufacturers to be mixed and matched.  Since such standards will govern the construction of millions of future systems, one has to apply rigorous engineering principles accompanied by mathematically sound analysis methods to ensure that the standards are not flawed. This is one of the important goals of this project.  The other key goals are to ensure that the manufacturing of these systems proceeds as per the standard definition and that testing methods to check the correctness of manufacture will be in place in a timely manner. The complementary strengths of the principal investigators, one of whom is from the School of Computing, University of Utah, Salt Lake City, and the other from Brigham Young University in Provo Utah will help drive this project forward in unique ways. The first year of this project will investigate rigorous specification methods for this standard called MCAPI. The second year will involve the research design of a variety of analysis tools for programs written using MCAPI. The third year will involve pilot testing of our tools at the manufacturer sites of systems on chips.</docText>
    <division>CCF</division>
    <directorate>CSE</directorate>
    <award-instr>Standard Grant</award-instr>
    <programreferencecode>HPCC</programreferencecode>
    <programreferencecode>9218</programreferencecode>
    <fieldofapplication>0000912 Computer Science</fieldofapplication>
    <progmgr>Sankar Basu</progmgr>
    <state>UT</state>
    <organization>Brigham Young University</organization>
    <programreferencecode>6890</programreferencecode>
    <program>MCDA</program>
    <program>INTEGRATIVE, HYBRD &amp; COMPLX SY</program>
    <programelementcode>7786</programelementcode>
    <programelementcode>7564</programelementcode>
    <programreferencecode>7786</programreferencecode>
    <pi>Mercer, Eric</pi>
    <amount>125533</amount>
  </document>
  <document>
    <docID>0903478</docID>
    <docDate>August 1, 2009</docDate>
    <docSource></docSource>
    <docText>Collaborative Research: Globally Optimized Robust Systems on Multi-Core Hardware

   The focus of this project is on designing robust multi-core systems at lowest cost that are resilient to hardware failures. It is motivated by an imminent paradigm shift in hardware design resulting from the growing problem of hardware failures in future process technologies. The central vision is to develop techniques and tools for designing hierarchical robust multi-core systems that are globally optimized across multiple abstraction layers ? circuit, architecture, runtime, and application ? without incurring the high cost of expensive redundancy techniques. An inter disciplinary approach will integrate research and education required to enable future robust systems. Because of its cross-cutting nature, the proposed research has the potential of having a major impact on future systems, enabling future technology scaling, thus making everyday lives better.</docText>
    <division>CCF</division>
    <directorate>CSE</directorate>
    <award-instr>Standard Grant</award-instr>
    <programreferencecode>HPCC</programreferencecode>
    <keyword>architecture</keyword>
    <programreferencecode>9218</programreferencecode>
    <fieldofapplication>0000912 Computer Science</fieldofapplication>
    <state>PA</state>
    <organization>Carnegie-Mellon University</organization>
    <keyword>education</keyword>
    <keyword>vision</keyword>
    <progmgr>Chitaranjan Das</progmgr>
    <pi>Blanton, Ronald</pi>
    <amount>190000</amount>
    <program>MCDA</program>
    <program>INTEGRATIVE, HYBRD &amp; COMPLX SY</program>
    <programelementcode>7786</programelementcode>
    <programelementcode>7564</programelementcode>
  </document>
  <document>
    <docID>0903471</docID>
    <docDate>August 1, 2009</docDate>
    <docSource></docSource>
    <docText>Heterogeneous Multi-core Architectures from Homogeneous Arrays using Configurable Interconnect

     Recent trends in microprocessor design are shifting toward incorporation of heterogeneous core types onto the same die. However, current design techniques provision only a fixed set of cores and suffer from poor resource utilization when the workload is not a good match for those resources and the system cannot efficiently employ all resources simultaneously.  Hardware should adapt the organization of the heterogeneous cores in response to dynamic behavior.     This project lays the groundwork for realizing such a dynamic heterogeneous processor - the field programmable core array (FPCA) - that is capable of simultaneously implementing many heterogeneous architectural configurations on a configurable, homogeneous platform. The required flexibility will be provided through a combination of architecture, circuit, and EDA advances.     The intellectual merit of this project is the technique of separating a processor's front end and functional units into homogeneous pools of building blocks, and development of a programmable interconnect allowing these building blocks to be coupled and decoupled dynamically, enabling efficient intra- and inter-core connectivity and the assembly of a variety of heterogeneous organizations. The broader impact will be the development of a new design paradigm that allows the same chip to be used for a wider range of markets and workloads.  This reduces design and procurement costs, while improving programmer productivity - all of which will provide economic and social benefits. This project also includes education and outreach activities, including improved teaching of emerging programming models and outreach to high school students and underrepresented groups.</docText>
    <division>CCF</division>
    <directorate>CSE</directorate>
    <award-instr>Standard Grant</award-instr>
    <programreferencecode>HPCC</programreferencecode>
    <keyword>architecture</keyword>
    <programreferencecode>9218</programreferencecode>
    <fieldofapplication>0000912 Computer Science</fieldofapplication>
    <organization>University of Virginia Main Campus</organization>
    <state>VA</state>
    <keyword>education</keyword>
    <pi>Skadron, Kevin</pi>
    <progmgr>Chitaranjan Das</progmgr>
    <amount>280000</amount>
    <copi>John Lach</copi>
    <program>MCDA</program>
    <program>INTEGRATIVE, HYBRD &amp; COMPLX SY</program>
    <programelementcode>7786</programelementcode>
    <programelementcode>7564</programelementcode>
    <programreferencecode>7786</programreferencecode>
    <copi>Benton Calhoun</copi>
  </document>
  <document>
    <docID>0903470</docID>
    <docDate>August 1, 2009</docDate>
    <docSource></docSource>
    <docText>Performance Debugging Support for Many-Core Processors

   Microprocessor performance has doubled approximately every 18 months for several decades, making existing applications faster without much programming effort and allowing more demanding new applications to be developed. However, now the trend of steadily improving performance for existing applications has stalled. The performance potential of a microprocessor chip is still rapidly increasing, but the increase now mainly comes from packing more and more processor cores onto the chip, not from making each core faster. This provides little benefit to existing applications that can only utilize one core, so they must be re-designed to take advantage of multiple cores. Unfortunately, correct design of multi-core applications is much harder to achieve than was the case for single-core applications, and it is even harder for programmers to achieve scalability ? enabling applications to keep improving their performance as even more cores become available in the future. This problem threatens to disrupt the entire hardware-software ecosystem and possibly put an end to rapid improvements in computing performance, the information technology revolution, and the resulting productivity increases.    This research project will investigate hardware and software performance debugging mechanisms that would help programmers identify and alleviate performance problems in their many-core applications, both for use in application development and in education. This will help the information technology revolution stay on track by helping existing programmers and training new ones to write scalable many-core applications that will in turn create demand for even more cores, allowing rapid progress in computing performance to continue.</docText>
    <division>CCF</division>
    <directorate>CSE</directorate>
    <award-instr>Standard Grant</award-instr>
    <programreferencecode>HPCC</programreferencecode>
    <organization>GA Tech Research Corporation - GA Institute of Technology</organization>
    <state>GA</state>
    <programreferencecode>9218</programreferencecode>
    <fieldofapplication>0000912 Computer Science</fieldofapplication>
    <keyword>education</keyword>
    <progmgr>Chitaranjan Das</progmgr>
    <pi>Prvulovic, Milos</pi>
    <program>MCDA</program>
    <program>INTEGRATIVE, HYBRD &amp; COMPLX SY</program>
    <programelementcode>7786</programelementcode>
    <programelementcode>7564</programelementcode>
    <amount>137278</amount>
  </document>
  <document>
    <docID>0903459</docID>
    <docDate>August 1, 2009</docDate>
    <docSource></docSource>
    <docText>Collaborative Research: Globally Optimized Robust Systems on Multi-Core Hardware

   The focus of this project is on designing robust multi-core systems at lowest cost that are resilient to hardware failures. It is motivated by an imminent paradigm shift in hardware design resulting from the growing problem of hardware failures in future process technologies. The central vision is to develop techniques and tools for designing hierarchical robust multi-core systems that are globally optimized across multiple abstraction layers ? circuit, architecture, runtime, and application ? without incurring the high cost of expensive redundancy techniques. An inter disciplinary approach will integrate research and education required to enable future robust systems. Because of its cross-cutting nature, the proposed research has the potential of having a major impact on future systems, enabling future technology scaling, thus making everyday lives better.</docText>
    <division>CCF</division>
    <directorate>CSE</directorate>
    <award-instr>Standard Grant</award-instr>
    <programreferencecode>HPCC</programreferencecode>
    <keyword>architecture</keyword>
    <programreferencecode>9218</programreferencecode>
    <state>CA</state>
    <fieldofapplication>0000912 Computer Science</fieldofapplication>
    <organization>Stanford University</organization>
    <keyword>education</keyword>
    <keyword>vision</keyword>
    <progmgr>Chitaranjan Das</progmgr>
    <amount>190000</amount>
    <pi>Mitra, Subhasish</pi>
    <program>MCDA</program>
    <programelementcode>7786</programelementcode>
  </document>
  <document>
    <docID>0903456</docID>
    <docDate>August 1, 2009</docDate>
    <docSource></docSource>
    <docText>MCDA: Collaborative Research: A Multi-Element and Multi-Objective Optimization Approach for Allocating tasks to Multi-Core Processors

   The objective of the proposed research is to design innovative algorithms and tools for energy-aware scheduling and mapping of tasks onto homogeneous and heterogeneous multi-core processor (HeMP) architectures. The research proposes to develop a new theoretical and experimental framework, called multi-element and multi-objective (MEMO) optimization, that will simultaneously and flexibly optimize the goals of energy minimization and performance maximization while taking into account constraints due to multiple architectural elements such as cores and caches of current and emerging multi-core processors.  The project will develop CorePac, a toolkit that will provide a flexible and friendly environment to schedule task-parallel applications on HeMPs under various performance/energy trade-offs and demonstrate the usefulness of the algorithms and CorePac. Benchmarking of the algorithms will be conducted using a diverse suite of scientific, multimedia, and bioinformatics applications.    Through its production of new algorithms and software toolkit, this work will have a direct and immediate impact on a number of communities. At the collaborating institutions, this project will have an educational impact by involving undergraduate and graduate students. This situation also presents excellent opportunities for interaction with postdoctoral researchers as well as with colleagues in academic, government and industry research labs. The CorePac software toolkit will be the basis for subsequent development of production quality software for energy-performance tradeoffs. Developing means to manage energy consumption in computers is imperative from both environmental and economical perspectives.</docText>
    <keyword>algorithms</keyword>
    <division>CCF</division>
    <directorate>CSE</directorate>
    <state>TX</state>
    <award-instr>Standard Grant</award-instr>
    <programreferencecode>HPCC</programreferencecode>
    <programreferencecode>9218</programreferencecode>
    <fieldofapplication>0000912 Computer Science</fieldofapplication>
    <keyword>multimedia</keyword>
    <keyword>bioinformatics</keyword>
    <progmgr>Chitaranjan Das</progmgr>
    <amount>170000</amount>
    <organization>University of Texas at Arlington</organization>
    <program>MCDA</program>
    <program>INTEGRATIVE, HYBRD &amp; COMPLX SY</program>
    <programelementcode>7786</programelementcode>
    <programelementcode>7564</programelementcode>
    <pi>Ahmad, Ishfaq</pi>
  </document>
  <document>
    <docID>0903447</docID>
    <docDate>August 1, 2009</docDate>
    <docSource></docSource>
    <docText>Qameleon: Hardware/software Co-operative Automated Tuning for Heterogeneous Architectures

     "This award is funded under the American Recovery and Reinvestment Act of 2009 (Public Law 111-5)."    The push toward heterogeneous architectures to increase performance, while reducing energy consumption creates considerable challenges for software development. For example, programmers must make non-trivial decisions about when to use special accelerators vs. powerful core CPUs and also become steeped in complex architectural details to tune effectively. The goal of this research project is to alleviate these challenges using a novel framework that enables a wide-range of computations to be expressed at a high-level and subsequently tuned automatically for the underlying heterogeneous platform. More specifically, the PIs propose Qameleon, a new programming environment that can cooperatively tune the program and the hardware configuration automatically and continuously using statistical machine learning techniques.   The proposed work will be the first in GPU programming to consider adaptively partitioning a computation on a heterogeneous platform at run-time. This work will also improve understanding of the trade-offs among programming features, architectural support, performance, and power in heterogeneous architectures. The research will also develop several metrics to characterize the application based on the outcome of the statistical modeling.     The proposed research brings together cross-disciplinary techniques?from architectures, compilers, machine learning, and applications ? and researchers from both academia and industry to build new common programming interfaces that can hide the complexity of heterogeneous architectures from the programmers, while still providing high-performance and energy-efficient execution. The Qameleon programming environment will be designed to teach at the undergraduate level by incorporating research results into new undergraduate courses aimed at both computer scientists and domain scientists alike.</docText>
    <division>CCF</division>
    <directorate>CSE</directorate>
    <award-instr>Standard Grant</award-instr>
    <programreferencecode>HPCC</programreferencecode>
    <organization>GA Tech Research Corporation - GA Institute of Technology</organization>
    <state>GA</state>
    <programreferencecode>9218</programreferencecode>
    <fieldofapplication>0000912 Computer Science</fieldofapplication>
    <keyword>programming environment</keyword>
    <keyword>machine learning</keyword>
    <progmgr>Chitaranjan Das</progmgr>
    <programreferencecode>6890</programreferencecode>
    <program>MCDA</program>
    <program>INTEGRATIVE, HYBRD &amp; COMPLX SY</program>
    <programelementcode>7786</programelementcode>
    <programelementcode>7564</programelementcode>
    <programreferencecode>7786</programreferencecode>
    <pi>Kim, Hyesoon</pi>
    <copi>Richard Vuduc</copi>
    <amount>267810</amount>
  </document>
  <document>
    <docID>0903439</docID>
    <docDate>August 1, 2009</docDate>
    <docSource></docSource>
    <docText>MCDA: Collaborative Research: A Multi-Element and Multi-Objective Optimization Approach for Allocating tasks to Multi-Core Processors

     The objective of the proposed research is to design innovative algorithms and tools for energy-aware scheduling and mapping of tasks onto homogeneous and heterogeneous multi-core processor (HeMP) architectures. The plan is to develop a new theoretical and experimental framework, called multi-element and multi-objective (MEMO) optimization, that will simultaneously and flexibly optimize the goals of energy minimization and performance maximization, while taking into account constraints due to multiple architectural elements such as cores and caches of current and emerging multi-core processors.  The researchers will develop CorePac, a toolkit that will provide a flexible and friendly environment to schedule task-parallel applications on HeMPs under various performance/energy trade-offs. The usefulness of the algorithms and CorePac will be demonstrated on a diverse suite of scientific, multimedia, and bioinformatics applications.    Through its production of new algorithms and software toolkit, this work will have a direct and immediate impact on a number of communities. At the home institutions, this project will have an educational impact by involving undergraduate and graduate students. This situation also presents excellent opportunities for interaction with postdoctoral researchers as well as with colleagues in academic, government and industry research labs.  The CorePac software toolkit will be the basis for subsequent development of production quality software for energy-performance tradeoffs. Developing means to manage energy consumption in computers is imperative from both environmental and economical perspectives. Reductions in energy consumption of multi-core processors will contribute to system-wide energy and cost savings.</docText>
    <keyword>algorithms</keyword>
    <division>CCF</division>
    <directorate>CSE</directorate>
    <award-instr>Standard Grant</award-instr>
    <programreferencecode>HPCC</programreferencecode>
    <programreferencecode>9218</programreferencecode>
    <fieldofapplication>0000912 Computer Science</fieldofapplication>
    <keyword>multimedia</keyword>
    <organization>University of Tennessee Knoxville</organization>
    <state>TN</state>
    <programreferencecode>9150</programreferencecode>
    <keyword>bioinformatics</keyword>
    <progmgr>Chitaranjan Das</progmgr>
    <pi>Dongarra, Jack</pi>
    <amount>170000</amount>
    <program>MCDA</program>
    <programelementcode>7786</programelementcode>
  </document>
  <document>
    <docID>0903437</docID>
    <docDate>August 1, 2009</docDate>
    <docSource></docSource>
    <docText>Flexible Voltage Stacking for Chip Multiprocessors

     Effective management of supply voltage is of critical importance to overcome power limitations in future highly parallel multi-core microprocessors.  This project proposes a new approach to efficiently deliver power and manage voltage in chip multiprocessors through a technique, called flexible voltage stacking.  Voltage stacking involves delivering a higher supply voltage to the chip (resulting in lower current draw for a fixed power budget), which can reduce IR losses and improve power delivery efficiency.  By providing flexibility to the stack, individual cores can be stacked in such a way as to regulate the voltage to the desired core supply level.  The PIs plan to explore a range of architectural and circuit techniques to mitigate issues related to voltage noise. Also, a prototype chip will be designed demonstrating the flexible voltage stack concept, driven by realistic workload traces from a combined software/FPGA simulator of a multicore system.  The work will have broader impacts through technology transfer to the computing industry and by providing training for both undergraduate and graduate students.</docText>
    <division>CCF</division>
    <directorate>CSE</directorate>
    <award-instr>Standard Grant</award-instr>
    <programreferencecode>HPCC</programreferencecode>
    <state>MA</state>
    <programreferencecode>9218</programreferencecode>
    <fieldofapplication>0000912 Computer Science</fieldofapplication>
    <progmgr>Chitaranjan Das</progmgr>
    <organization>Harvard University</organization>
    <program>MCDA</program>
    <program>INTEGRATIVE, HYBRD &amp; COMPLX SY</program>
    <programelementcode>7786</programelementcode>
    <programelementcode>7564</programelementcode>
    <programreferencecode>7786</programreferencecode>
    <pi>Wei, Gu-Yeon</pi>
    <copi>David Brooks</copi>
    <amount>216756</amount>
  </document>
  <document>
    <docID>0903432</docID>
    <docDate>August 1, 2009</docDate>
    <docSource></docSource>
    <docText>ADAMS: Architecture and Design Automation for 3D Multi-core Systems

     "This award is funded under the American Recovery and Reinvestment Act of 2009  (Public Law 111-5)."      Proposal ID: 0903432	  PI name: Xie, Yuan  Inst: PA St U University Park	  Title: ADAMS: Architecture and Design Automation for 3D Multi-core Systems      ABSTRACT  Three-dimensional integrated circuits (3D ICs) are envisioned as a promising solution for future multi-core architecture design.  This project will investigate two cross-cutting research thrusts related to architectural exploration and design-automation tools for future 3D multi-core systems. The stacking of memory components and the relationship between memory stacking and interconnect will be explored. The stacking of logic layers that provide distinct service to the system such as improved reliability and efficient power management will also be investigated. The PI will consider the interplay between different constraints such as thermal profiles, performance, and cost in these explorations. To facilitate such explorations, a set of design automation toolsets will be developed. In addition to validation using simulation and emulation environments, the project will fabricate and test some of these designs to demonstrate the feasibility of the ideas.       The research will be conducted in collaboration with industrial partners enabling direct transfer of technology to industry. The outcome of this research will, therefore, have a direct impact on future multi-core designs. Undergraduate and graduate students involved in this research will get versatile training.  The tools and techniques developed in this research will be used in developing  a new course on multi-core design. The PIs will also organize tutorials along with major conferences to disseminate the results from this work.</docText>
    <division>CCF</division>
    <directorate>CSE</directorate>
    <award-instr>Standard Grant</award-instr>
    <programreferencecode>HPCC</programreferencecode>
    <keyword>architecture</keyword>
    <programreferencecode>9218</programreferencecode>
    <fieldofapplication>0000912 Computer Science</fieldofapplication>
    <state>PA</state>
    <keyword>simulation</keyword>
    <progmgr>Sankar Basu</progmgr>
    <amount>480000</amount>
    <copi>Vijaykrishnan Narayanan</copi>
    <organization>Pennsylvania State Univ University Park</organization>
    <programreferencecode>6890</programreferencecode>
    <program>MCDA</program>
    <program>INTEGRATIVE, HYBRD &amp; COMPLX SY</program>
    <programelementcode>7786</programelementcode>
    <programelementcode>7564</programelementcode>
    <programreferencecode>7786</programreferencecode>
    <pi>Xie, Yuan</pi>
  </document>
  <document>
    <docID>0903430</docID>
    <docDate>August 1, 2009</docDate>
    <docSource></docSource>
    <docText>MCDA: Collaborative Research: A Multi-Element and Multi-Objective Optimization Approach for Allocating tasks to Multi-Core Processors

   The objective of the proposed research is to design innovative algorithms and tools for energy-aware scheduling and mapping of tasks onto homogeneous and heterogeneous multi-core processor (HeMP) architectures. The research proposes to develop a new theoretical and experimental framework, called multi-element and multi-objective (MEMO) optimization, that will simultaneously and flexibly optimize the goals of energy minimization and performance maximization while taking into account constraints due to multiple architectural elements such as cores and caches of current and emerging multi-core processors.  The project will develop CorePac, a toolkit that will provide a flexible and friendly environment to schedule task-parallel applications on HeMPs under various performance/energy trade-offs and demonstrate the usefulness of the algorithms and CorePac. Benchmarking of the algorithms will be conducted using a diverse suite of scientific, multimedia, and bioinformatics applications.    Through its production of new algorithms and software toolkit, this work will have a direct and immediate impact on a number of communities. At the collaborating institutions, this project will have an educational impact by involving undergraduate and graduate students. This situation also presents excellent opportunities for interaction with postdoctoral researchers as well as with colleagues in academic, government and industry research labs. The CorePac software toolkit will be the basis for subsequent development of production quality software for energy-performance tradeoffs. Developing means to manage energy consumption in computers is imperative from both environmental and economical perspectives.</docText>
    <keyword>algorithms</keyword>
    <division>CCF</division>
    <directorate>CSE</directorate>
    <award-instr>Standard Grant</award-instr>
    <programreferencecode>HPCC</programreferencecode>
    <programreferencecode>9218</programreferencecode>
    <fieldofapplication>0000912 Computer Science</fieldofapplication>
    <keyword>multimedia</keyword>
    <organization>University of Florida</organization>
    <state>FL</state>
    <keyword>bioinformatics</keyword>
    <progmgr>Chitaranjan Das</progmgr>
    <amount>270000</amount>
    <pi>Ranka, Sanjay</pi>
    <program>MCDA</program>
    <programelementcode>7786</programelementcode>
    <copi>Prabhat Mishra</copi>
  </document>
  <document>
    <docID>0903408</docID>
    <docDate>August 1, 2009</docDate>
    <docSource></docSource>
    <docText>Collaborative Research: MCDA: Formal Analysis of Multicore Communication APIs and Applications

         "This award is funded under the American Recovery and Reinvestment Act of 2009 (Public Law 111-5)."    CCF - 0903408    Collaborative Research - MCDA: Formal Analysis of Multicore Communication APIs and Applications  Gopalakrishnan, Ganesh L.       University of Utah     CCF - 0903491    Collaborative Research: Formal Analysis of Multicore Communication APIs and Applications  Mercer, Eric G.       Brigham Young Univ      ABSRTACT  This project contributes tools to engineer future information processing systems so that they operate reliably and efficiently. Given that many of these systems will be produced on single micro-chips, and given the increasing demands for rapid turn-around times of designs, manufacturers are standardizing on methods by which the central processing units in these chips may communicate. Such standards will eliminate duplication of labor and allow components originating from different manufacturers to be mixed and matched.  Since such standards will govern the construction of millions of future systems, one has to apply rigorous engineering principles accompanied by mathematically sound analysis methods to ensure that the standards are not flawed. This is one of the important goals of this project.  The other key goals are to ensure that the manufacturing of these systems proceeds as per the standard definition and that testing methods to check the correctness of manufacture will be in place in a timely manner. The complementary strengths of the principal investigators, one of whom is from the School of Computing, University of Utah, Salt Lake City, and the other from Brigham Young University in Provo Utah will help drive this project forward in unique ways. The first year of this project will investigate rigorous specification methods for this standard called MCAPI. The second year will involve the research design of a variety of analysis tools for programs written using MCAPI. The third year will involve pilot testing of our tools at the manufacturer sites of systems on chips.</docText>
    <division>CCF</division>
    <directorate>CSE</directorate>
    <award-instr>Standard Grant</award-instr>
    <programreferencecode>HPCC</programreferencecode>
    <programreferencecode>9218</programreferencecode>
    <fieldofapplication>0000912 Computer Science</fieldofapplication>
    <progmgr>Sankar Basu</progmgr>
    <organization>University of Utah</organization>
    <state>UT</state>
    <pi>Gopalakrishnan, Ganesh</pi>
    <programreferencecode>6890</programreferencecode>
    <program>MCDA</program>
    <program>INTEGRATIVE, HYBRD &amp; COMPLX SY</program>
    <programelementcode>7786</programelementcode>
    <programelementcode>7564</programelementcode>
    <programreferencecode>7786</programreferencecode>
    <amount>188299</amount>
  </document>
  <document>
    <docID>0903392</docID>
    <docDate>July 15, 2009</docDate>
    <docSource></docSource>
    <docText>Optimization of Test and Diagnosis Infrastructure for Multicore Chips

   CCF - 0903392    Optimization of Test and Diagnosis Infrastructure for Multicore Chips  Chakrabarty, Krishnendu       Duke University     ABSTRACT  The emergence of multicore integrated circuits offers continued technological advances in computing through the on-chip integration of processors, graphics accelerators, memories, and other types of cores. Test solutions are needed to reduce cost and defect escapes, and to facilitate repair and reconfiguration through diagnosis. This project is therefore directed at new methods for comprehensive defect screening, optimization techniques for test delivery, and diagnosis flows to quickly identify faulty cores. It is structured around the following topics: (i) generation of high-quality tests to augment core-level patterns, including tests for power-management structures and clock-domain boundaries, and tests for the interconnect fabric and interfaces to the cores; (ii) theory and optimization tools for utilizing the interconnection fabric for test-data transportation; (iii) optimization methods to reduce the time needed for identifying faulty cores and clock domains. The project is being carried out in collaboration with partners at Intel and AMD.    This project will reduce test cost and defect levels, and lead to higher shipped-product quality for multicore-based systems. The test infrastructure will facilitate in-field testing, diagnosis, and dynamic reconfiguration through the use of spare cores. Resulting benefits for society include cheaper and reliable computing platforms for a wide range of applications. Undergraduate and graduate students will be prepared for the semiconductor industry. SRC Master?s Scholarships and PhD Fellowships will be used as recruitment tools, especially for under-represented groups. Tutorials at conferences and lectures at IEEE/ACM Chapters worldwide will lead to broad dissemination of research results.</docText>
    <division>CCF</division>
    <directorate>CSE</directorate>
    <award-instr>Standard Grant</award-instr>
    <programreferencecode>HPCC</programreferencecode>
    <programreferencecode>9218</programreferencecode>
    <fieldofapplication>0000912 Computer Science</fieldofapplication>
    <keyword>graphics</keyword>
    <state>NC</state>
    <progmgr>Sankar Basu</progmgr>
    <organization>Duke University</organization>
    <pi>Chakrabarty, Krishnendu</pi>
    <program>MCDA</program>
    <program>INTEGRATIVE, HYBRD &amp; COMPLX SY</program>
    <programelementcode>7786</programelementcode>
    <programelementcode>7564</programelementcode>
    <amount>197326</amount>
  </document>
  <document>
    <docID>0903384</docID>
    <docDate>August 1, 2009</docDate>
    <docSource></docSource>
    <docText>Collaborative Research: Energy-Aware Memory Synchronization for Embedded Multicore Systems

   High-end embedded systems such as smart phones, game consoles, GPS-enabled automotive systems, home entertainment centers, and other ?ambient intelligence? systems are becoming increasingly important in everyday life. Making such systems energy-efficient presents new challenges with broad implications for the economy and the environment.  Such high-end embedded systems are multicore architectures, which require management of resources such as memory connectivity and scheduling. This proposal investigates the energy implications of system-level concurrency issues in high-end embedded systems that are not limited by real-time constraints. In particular, it aims to develop energy-efficient techniques of synchronizing memory accesses, and tries to understand the optimal division of tasks between hardware and software.     Embedded systems are an integral component of modern life, and is a continually growing market. As the computational needs of the products in this market becomes more sophisticated, there will be more challenges in meeting the tight constraints imposed by these systems. Improvements in the performance and in particular the energy efficiency of such devices would have a substantial impact in terms of improved functionality, device longevity, and resource conservation.  This proposal involves collaboration between two disciplines, computer engineering and computer science, and two institutions.  Broader impacts of the proposal include development of workshops focused on multicore and parallel computing with special emphasis on encouraging women and under-represented minorities to participate. In addition, the findings of this project will be integrated into existing courses, specifically aiming to introduce cross-cutting issues between the computer science and engineering courses.</docText>
    <division>CCF</division>
    <directorate>CSE</directorate>
    <award-instr>Standard Grant</award-instr>
    <programreferencecode>HPCC</programreferencecode>
    <keyword>parallel computing</keyword>
    <programreferencecode>9218</programreferencecode>
    <fieldofapplication>0000912 Computer Science</fieldofapplication>
    <state>RI</state>
    <keyword>embedded systems</keyword>
    <programreferencecode>9150</programreferencecode>
    <organization>Brown University</organization>
    <progmgr>Chitaranjan Das</progmgr>
    <pi>Bahar, Ruth</pi>
    <program>MCDA</program>
    <program>INTEGRATIVE, HYBRD &amp; COMPLX SY</program>
    <programelementcode>7786</programelementcode>
    <programelementcode>7564</programelementcode>
    <programreferencecode>7786</programreferencecode>
    <copi>Maurice Herlihy</copi>
    <amount>244262</amount>
  </document>
  <document>
    <docID>0903295</docID>
    <docDate>August 1, 2009</docDate>
    <docSource></docSource>
    <docText>Collaborative Research: Energy-Aware Memory Synchronization for Embedded Multicore Systems

   High-end embedded systems such as smart phones, game consoles, GPS-enabled automotive systems, home entertainment centers, and other ?ambient intelligence? systems are becoming increasingly important in everyday life. Making such systems energy-efficient presents new challenges with broad implications for the economy and the environment. Such high-end embedded systems are multicore architectures, which require management of resources such as memory connectivity and scheduling. This proposal investigates the energy implications of system-level concurrency issues in high-end embedded systems that are not limited by real-time constraints. In particular, it aims to develop energy-efficient techniques of synchronizing memory accesses, and tries to understand the optimal division of tasks between hardware and software.     Embedded systems are an integral component of modern life, and is a continually growing market. As the computational needs of the products in this market becomes more sophisticated, there will be more challenges in meeting the tight constraints imposed by these systems. Improvements in the performance and in particular the energy efficiency of such devices would have a substantial impact in terms of improved functionality, device longevity, and resource conservation. This proposal involves collaboration between two disciplines, computer engineering and computer science, and two institutions. Broader impacts of the proposal include development of workshops focused on multicore and parallel computing with special emphasis on encouraging women and under-represented minorities to participate. In addition, the findings of this project will be integrated into existing courses, specifically aiming to introduce cross-cutting issues between the computer science and engineering courses.</docText>
    <division>CCF</division>
    <directorate>CSE</directorate>
    <award-instr>Standard Grant</award-instr>
    <programreferencecode>HPCC</programreferencecode>
    <keyword>parallel computing</keyword>
    <programreferencecode>9218</programreferencecode>
    <fieldofapplication>0000912 Computer Science</fieldofapplication>
    <state>PA</state>
    <keyword>embedded systems</keyword>
    <progmgr>Chitaranjan Das</progmgr>
    <program>MCDA</program>
    <programelementcode>7786</programelementcode>
    <programreferencecode>7786</programreferencecode>
    <pi>Moreshet, Tali</pi>
    <organization>Swarthmore College</organization>
    <amount>42381</amount>
  </document>
  <document>
    <docID>0903191</docID>
    <docDate>August 1, 2009</docDate>
    <docSource></docSource>
    <docText>A Design Framework for Improving Reliability, Debug and Security of Multi-Core Systems

         "This award is funded under the American Recovery and Reinvestment Act of 2009(Public Law 111-5)."    Project ID: 0903191  PI names: Sandip Kundu and Israel Koren  Title: A Design Framework for Improving Reliability, Debug and Security of Multi-Core Systems  Inst: University of Massachusetts, Amherst    ABSTRACT:  Today?s computer chips feature multiple cores in the same substrate where all cores may perform concurrent tasks, improving overall performance. However, multi-core systems exacerbate some problems such as power dissipation, system and software debugging, security and long term system reliability. Power consumption in computer systems is a major concern. For example, Google server plants, reportedly consume about 103 megawatts of electricity ? enough to power a city of the size of Tacoma, Washington.    Debugging multi-core hardware/software in a multitasking, multithreading, multi-core environment is very complex as an individual core may crash and communication may deadlock. Computer reliability and security are increasing concerns, as society becomes ever more dependent on the availability of computer systems and on the security of the data that they process and store. Continuous monitoring of the health of the computer system to allow fast recovery from faults, and protecting critical and private data from tampering attempts are thus necessary.    The project envisions designing a simple dedicated supervisory core integrated into chip multi-processors that is always alive. This core supports execution of commands for rebooting individual cores and allows query of internal states of any core on the same substrate. Such a core adds little to system cost but adds a number of run time capabilities that allow us to solve the above problems and also allow improved remote system management, which has emerged as a major challenge in computer data centers.    The broader impact of this project is two fold. At a technical level, it provides solutions to mitigate societal problems such as energy consumption, advancing computer security and improving computer up-time. At a curriculum level, it trains researchers in a discipline that is extremely important for US industrial competitiveness. This project is actively supported by major US industries through technical collaboration.</docText>
    <division>CCF</division>
    <directorate>CSE</directorate>
    <award-instr>Standard Grant</award-instr>
    <programreferencecode>HPCC</programreferencecode>
    <state>MA</state>
    <keyword>security</keyword>
    <programreferencecode>9218</programreferencecode>
    <fieldofapplication>0000912 Computer Science</fieldofapplication>
    <organization>University of Massachusetts Amherst</organization>
    <progmgr>Sankar Basu</progmgr>
    <amount>330000</amount>
    <copi>Israel Koren</copi>
    <pi>Kundu, Sandip</pi>
    <programreferencecode>6890</programreferencecode>
    <program>MCDA</program>
    <program>INTEGRATIVE, HYBRD &amp; COMPLX SY</program>
    <programelementcode>7786</programelementcode>
    <programelementcode>7564</programelementcode>
    <programreferencecode>7786</programreferencecode>
  </document>
  <document>
    <docID>0903109</docID>
    <docDate>August 1, 2009</docDate>
    <docSource></docSource>
    <docText>MCDA: Efficient Mechanisms for Multicore Processors

     "This award is funded under the American Recovery and Reinvestment Act of 2009 (Public Law 111-5)."    Mainstream computing - on the desktop, in the datacenter, and in embedded devices - is undergoing an unprecedented shift toward parallelism as manufacturers adopt multi-core architectures.  Conventional multi-core processors have very inefficient communication, synchronization, and locality-management mechanisms causing them to scale poorly on hard problems and to be difficult to program.  The research proposes to develop a set of efficient  mechanisms - hardware APIs and supporting microarchitecture - for communication, synchronization, and locality management.   Specifically, the project proposes to develop an agile memory hierarchy, register-based communication and synchronization, and fast active messages.  By reducing communication and synchronization overhead by orders of magnitude, it is possible to substantially improve the efficiency, programmability, and scalability of multi-core processors. Overall, the mechanisms will free programmers from the incidental constraints imposed by conventional multi-core architectures - allowing them to concentrate instead on the fundamental issues of parallelism, locality, and load balance.     The proposed work is expected to have an immense impact on future architecture and programming systems for multi-core processors. By reducing communication and synchronization overheads, the mechanisms will enable many applications that are not embarrassingly parallel to benefit from multi-core architectures.  The work is likely to enable a new generation of multi-core programming systems. The educational plan includes to integrate the results of this research into graduate and undergraduate courses at Stanford University.</docText>
    <division>CCF</division>
    <directorate>CSE</directorate>
    <award-instr>Standard Grant</award-instr>
    <programreferencecode>HPCC</programreferencecode>
    <keyword>architecture</keyword>
    <programreferencecode>9218</programreferencecode>
    <state>CA</state>
    <fieldofapplication>0000912 Computer Science</fieldofapplication>
    <organization>Stanford University</organization>
    <progmgr>Chitaranjan Das</progmgr>
    <program>COMPUTER ARCHITECTURE</program>
    <programelementcode>7941</programelementcode>
    <pi>Dally, William</pi>
    <programreferencecode>6890</programreferencecode>
    <program>MCDA</program>
    <program>INTEGRATIVE, HYBRD &amp; COMPLX SY</program>
    <programelementcode>7786</programelementcode>
    <programelementcode>7564</programelementcode>
    <programreferencecode>7786</programreferencecode>
    <amount>404000</amount>
  </document>
  <document>
    <docID>0902885</docID>
    <docDate>August 1, 2009</docDate>
    <docSource></docSource>
    <docText>Parameterized Architecture-Level Thermal Modeling and Characterization for Multi-Core Microprocessor Design

         "This award is funded under the American Recovery and Reinvestment Act of 2009(Public Law 111-5)."      Lead Proposal#: 0902885  Title: Parameterized Architecture-Level Thermal Modeling and Characterization for Multi-Core Microprocessor Design  PI: Sheldon X.-D. Tan, Dept of Electrical Engineering, UC Riverside  co-PI: Yingbo Hua, Dept of Electrical Engineering, UC Riverside     Inst: Department of Electrical Engineering  CoPI Inst:University of California at Riverside      ABSTRACT  Multicore (also known as so-called chip-multiprocessors (CMP)) architectures are the trend for current and future microprocessor designs. They provide better performance via thread-level parallelism, better power/thermal scaling, and easy design by design reuse. However, power/thermal considerations are still the first-class constraints for multicore microprocessor designs. Thermal-aware design space explorations at core and architecture level for multicore microprocessors become critical design issues.      This research seeks to explore new techniques of building compact parameterized, transient thermal models for efficient thermal-aware design space explorations in multicore microprocessor designs.    The project consists of three thrusts: (1) Architecture-level behavioral transient thermal modeling and characterization; (2) Parameterized thermal modeling considering variable design parameters; (3) Thermal model optimization and reduction.  The proposed method is a top-down, black-box approach, meaning that it does not require any knowledge of the internal structures of the systems; This approach makes the proposed method very general and flexible, which contrasts the existing approaches. The accuracy of the models is ensured by the measured or precisely computed thermal-power information from hardware.  The parameterized models can accommodate different design variable parameters for efficient design space explorations.    The outcome of this research will add significantly to the core knowledge of thermal modeling multicore design. It will provide a new alternative way to complement existing architecture-level thermal models for the architecture community. Since the PIs will work closely with SRC, the proposed project will have immediate impacts on thermal-aware multicore microprocessor design in industry. This grant will enable the PI to hire more women and underrepresented minority students to contribute to the greater diversity in America's science and technology workforce.</docText>
    <division>CCF</division>
    <directorate>CSE</directorate>
    <award-instr>Standard Grant</award-instr>
    <programreferencecode>HPCC</programreferencecode>
    <keyword>architecture</keyword>
    <programreferencecode>9218</programreferencecode>
    <state>CA</state>
    <fieldofapplication>0000912 Computer Science</fieldofapplication>
    <progmgr>Sankar Basu</progmgr>
    <organization>University of California-Riverside</organization>
    <pi>Tan, Sheldon X.-D.</pi>
    <programreferencecode>6890</programreferencecode>
    <program>MCDA</program>
    <program>INTEGRATIVE, HYBRD &amp; COMPLX SY</program>
    <copi>Yingbo Hua</copi>
    <amount>259544</amount>
    <programelementcode>7786</programelementcode>
    <programelementcode>7564</programelementcode>
    <programreferencecode>7786</programreferencecode>
  </document>
  <document>
    <docID>0902717</docID>
    <docDate>January 15, 2009</docDate>
    <docSource></docSource>
    <docText>SGER: A Proposal For Research Into The Jacobians Of Graphs

   The design of efficient graph algorithms continues to be one of the central problems of computer science. Graphs can be used to model everything from social networks to biological systems to boolean circuits. There are currently many approaches to the design of graph algorithms, but there still remain many open problems. The proposed research studies a new algebraic approach to the design of efficient graph algorithms that is based on the Jacobian of a graph. Every graph has an abelian group?the Jacobian? that is associated with it. This group is the same for isomorphic graphs, although it does not uniquely determine the graph. However, the Jacobian does contain a great deal of important information about the graph.  The plan is to exploit the Jacobian to design new efficient algorithms for important graph problems. Some of the problems that will be studied include: sampling random sub-graphs with specific properties, graph isomorphism for new classes of graphs, and many other problems. The success of the proposed research will significantly increase our understanding of graph algorithms. It will not only discover new algorithms, but will open the door on an entirely new approach to the creation of additional algorithms.</docText>
    <keyword>algorithms</keyword>
    <division>CCF</division>
    <directorate>CSE</directorate>
    <award-instr>Standard Grant</award-instr>
    <programreferencecode>HPCC</programreferencecode>
    <programreferencecode>9237</programreferencecode>
    <pi>Lipton, Richard</pi>
    <organization>GA Tech Research Corporation - GA Institute of Technology</organization>
    <state>GA</state>
    <programreferencecode>9218</programreferencecode>
    <fieldofapplication>0000912 Computer Science</fieldofapplication>
    <progmgr>Richard Beigel</progmgr>
    <amount>200000</amount>
    <program>ALGORITHMS</program>
    <programelementcode>7926</programelementcode>
  </document>
  <document>
    <docID>0902084</docID>
    <docDate>January 15, 2009</docDate>
    <docSource></docSource>
    <docText>Student Travel Support for SODA 2009

   This award will help to support student attendance at the ACM-SIAM Symposium on Discrete Algorithms (SODA) in New York City, January 3-6, 2009.  SODA is the major conference on the analysis of (discrete) algorithms in North America.  Nearly half of the attendees are students, for whom the conference serves as a valuable educational experience, both in the technical content of the talks and in the opportunities for networking that it provides.  This award will provide partial support to as many as thirty student attendees, covering registration fees, shared hotel rooms, and travel.</docText>
    <keyword>algorithms</keyword>
    <division>CCF</division>
    <directorate>CSE</directorate>
    <award-instr>Standard Grant</award-instr>
    <programreferencecode>HPCC</programreferencecode>
    <programreferencecode>9218</programreferencecode>
    <fieldofapplication>0000912 Computer Science</fieldofapplication>
    <state>PA</state>
    <progmgr>Richard Beigel</progmgr>
    <keyword>networking</keyword>
    <amount>15000</amount>
    <pi>Crowley, James</pi>
    <organization>Society For Industrial and Applied Math (SIAM)</organization>
    <program>ALGORITHMS</program>
    <programelementcode>7926</programelementcode>
  </document>
  <document>
    <docID>0901175</docID>
    <docDate>April 1, 2009</docDate>
    <docSource></docSource>
    <docText>CISE-CCF-AF-Algebra: SGER: Computational Methods for Systems of Difference Equations

   Alexey I. Ovchinnikov proposes to develop efficient algorithms that  determine the differential, difference, and algebraic structure of  solutions of difference equations using methods of differential,  difference, and computer algebra. The investigator has successfully  contributed to the development of computational differential ideal   theory and the Galois theory of linear differential equations. He will  apply these results and methods to give efficient algorithms that compute  properties of systems of difference equations. These properties are  reflected in characteristic sets and Galois groups of the equations.   In particular, the investigator will develop algorithms to reduce systems  of non-linear difference equations to simpler systems. These algorithms  test consistency of the input system and eliminate variables from the  equations of the system. He will also give a Galois theory of linear  difference equations with difference parameters to study difference  algebraic dependences among solutions of difference equations.</docText>
    <keyword>algorithms</keyword>
    <division>CCF</division>
    <directorate>CSE</directorate>
    <award-instr>Standard Grant</award-instr>
    <programreferencecode>HPCC</programreferencecode>
    <programreferencecode>9237</programreferencecode>
    <programreferencecode>9218</programreferencecode>
    <fieldofapplication>0000912 Computer Science</fieldofapplication>
    <state>IL</state>
    <organization>University of Illinois at Chicago</organization>
    <progmgr>Lenore M. Mullin</progmgr>
    <program>NUM, SYMBOL, &amp; ALGEBRA COMPUT</program>
    <programelementcode>7933</programelementcode>
    <pi>Ovchinnikov, Alexey</pi>
    <amount>89310</amount>
  </document>
  <document>
    <docID>0851856</docID>
    <docDate>April 1, 2009</docDate>
    <docSource></docSource>
    <docText>REU Site in Telematics and Automotive Information Technology

   This award provides support to undergraduate students in science and engineering disciplines, in particular underrepresented women and minorities with cohort and high-quality research experiences in an interdisciplinary area of information technology and automotive engineering. The program is run in an eight-week long intensive summer research camp involving ten students per year. The program is cross-disciplinary, involving twelve participating faculty mentors from three departments: Electrical and Computer Engineering, Computer Science, and Biomechanical Engineering. The program seeks to improve students' skills in applying the scientific method to hands-on research and train each student in modern research techniques; lead students to greater independence in pursuing their research interests; and strive to increase the participation of women and underrepresented minorities who enter and complete graduate programs in science and engineering.    The students will be matched with suitable mentors to participate in a wide range of individual research projects in the fields of computer modeling and simulation in vehicle safety study, embedded systems and computer-based control in vehicles, vehicular networks, telematics applications, and reliable and secure mobile Internet services. The program integrates meaningful interdisciplinary research and active learning experience into undergraduate education to promote retention of students in science and engineering, and motivate them to continue to graduate schools. The program benefits society at large by contributing to developing an educated computing workforce capable of quickly putting new ideas to work in innovative ways that serve the needs of the populace and begin to take better advantage of flat world realities.</docText>
    <division>CCF</division>
    <directorate>CSE</directorate>
    <award-instr>Standard Grant</award-instr>
    <programreferencecode>HPCC</programreferencecode>
    <state>MI</state>
    <programreferencecode>9218</programreferencecode>
    <programreferencecode>9251</programreferencecode>
    <fieldofapplication>0000912 Computer Science</fieldofapplication>
    <keyword>simulation</keyword>
    <keyword>embedded systems</keyword>
    <keyword>education</keyword>
    <progmgr>Eun K. Park</progmgr>
    <programreferencecode>9152</programreferencecode>
    <amount>315000</amount>
    <organization>Wayne State University</organization>
    <pi>Xu, Chengzhong</pi>
    <program>RSCH EXPER FOR UNDERGRAD SITES</program>
    <programelementcode>1139</programelementcode>
    <copi>Syed Masud Mahmud</copi>
  </document>
  <document>
    <docID>0851848</docID>
    <docDate>April 1, 2009</docDate>
    <docSource></docSource>
    <docText>REU Site: Verification and Validation for Software Safety

   Software safety is critical to many projects conducted  by both private industry and the government. After the  Challenger accident, NASA adopted a safety policy based  on a National Research Council report that requires every  project to take an organized and systematic approach to  identify safety hazards or unsafe situations and practices,  and to follow appropriate steps to assure adequate safety.  At the REU site to be established undergraduates participate  in research on verification and validation for software  safety: from, initially, a series of training seminars on  the necessary background knowledge, to becoming involved  in one of several specially designed research topics  according to their interests. Topics include safety analysis,  model construction and simulation, validation test generation  and execution, etc. Interaction between the students and  faculty mentors is emphasized. Follow-ups are also conducted  with the students after the summer program to prepare their  results for presentation at conferences and publication in  journals.    The research subject is software safety with a focus on the  analysis and integration of failure conditions with functional  specifications, the use of assertions in formal specifications,  and validation not only for testing software under normal  conditions but also for showing that unsafe states cannot be  generated by the software as the result of single or multiple  erroneous inputs. This project allows students from  underrepresented groups or universities with limited research  opportunities to experience cutting-edge research in software  engineering and to gain proficiency in a broadly applicable  skill set, including critical thinking, research methods,  problem solving, and oral and written communication -- all of  which are very important for success in graduate programs and  careers in science and technology research.</docText>
    <division>CCF</division>
    <directorate>CSE</directorate>
    <state>TX</state>
    <programreferencecode>HPCC</programreferencecode>
    <award-instr>Continuing grant</award-instr>
    <keyword>verification</keyword>
    <programreferencecode>9218</programreferencecode>
    <keyword>software engineering</keyword>
    <programreferencecode>9251</programreferencecode>
    <fieldofapplication>0000912 Computer Science</fieldofapplication>
    <keyword>simulation</keyword>
    <progmgr>Eun K. Park</progmgr>
    <programreferencecode>9152</programreferencecode>
    <organization>University of Texas at Dallas</organization>
    <program>RSCH EXPER FOR UNDERGRAD SITES</program>
    <programelementcode>1139</programelementcode>
    <copi>Weili Wu</copi>
    <pi>Wong, Weichen</pi>
    <amount>186666</amount>
  </document>
  <document>
    <docID>0851812</docID>
    <docDate>May 1, 2009</docDate>
    <docSource></docSource>
    <docText>REU Site: Research Experiences in Computer Science for Students at Undergraduate Institutions

   The primary objective of the investigators is to encourage talented undergraduate   students to pursue graduate study and research careers in computer science.  The   program directly impacts students by giving them first-hand experience with some   of the most rewarding activities that characterize graduate study and research   careers: conducting research as a team, disseminating results, and participating   in a community of scholars.  The research projects are drawn from a number of   important fields of computer science.  The importance of teamwork and participating   in a scholarly community is emphasized to the students.  It should be noted that all   of the student participants in this program are enrolled at undergraduate-only   institutions.  Thus, the program extends research experiences to students who are   not enrolled in large research institutions, and who thus might not have the   opportunity to participate in research otherwise.    The particular projects vary with the specialties and interests of the faculty   members participating in any given year.  Project areas include pen-based computing,   computer-supported cooperative work, assistive technology (text navigation for the   visually impaired), natural language processing (text summarization), functional   programming languages, wireless sensor networks, programming pedagogy, and virtual   reality.  In addition to providing an orientation to their research projects,   faculty mentors sponsor orientation activities to help the students appreciate the   nature of research and the value of working cooperatively.  Students are encouraged   to collaborate formally and informally.  Students have several opportunities to   present their work to other REU participants as well as to external audiences.    Finally, students learn about the graduate school application process in part by   visiting a major research university.</docText>
    <division>CCF</division>
    <directorate>CSE</directorate>
    <award-instr>Standard Grant</award-instr>
    <programreferencecode>HPCC</programreferencecode>
    <keyword>wireless</keyword>
    <programreferencecode>9218</programreferencecode>
    <state>IN</state>
    <programreferencecode>9251</programreferencecode>
    <fieldofapplication>0000912 Computer Science</fieldofapplication>
    <keyword>programming languages</keyword>
    <progmgr>Eun K. Park</progmgr>
    <programreferencecode>9152</programreferencecode>
    <program>RSCH EXPER FOR UNDERGRAD SITES</program>
    <programelementcode>1139</programelementcode>
    <keyword>assistive technology</keyword>
    <pi>Thede, Scott</pi>
    <copi>Brian Howard</copi>
    <organization>DePauw University</organization>
    <amount>218910</amount>
  </document>
  <document>
    <docID>0851743</docID>
    <docDate>May 1, 2009</docDate>
    <docSource></docSource>
    <docText>REU Site: High Performance Filesystems and Data Visualization

   Simulations of galactic events such as black hole and galaxy mergers   allow scientists to understand the fundamental nature of the universe.    These simulations create terabytes of data, which are extremely difficult   and time consuming to analyze using traditional mathematical tools and   techniques. To address these challenges, scientists often use data   visualization, which provides a powerful and effective approach to   understand interactions and behavior of simulations such as visualizing   the radiation of gravity waves during a supermassive black hole merger.   Visualization systems require high performance file-systems for efficient   data management.  Over the last three years, a collaborative effort   between the Computer Science Department and the Center for Computational   Relativity and Gravitation at Rochester Institute of Technology resulted   in a visualization framework called Spiegel that has been used successfully   to analyze and visualize the simulation of a variety of galactic events.    This REU site provides students with the opportunity, environment and support   to conduct research in data visualization and high-performance file systems   using Spiegel as the starting point. Working in a collaborative and   interdisciplinary environment, students develop solutions to a broad set   of research problems in performing computation on massive amounts of   multi-dimensional data. Consequently, students gain knowledge in understanding,   critiquing, and presenting research literature. This project offers students   opportunities to work on state-of-the-art computing techniques that are   increasingly vital for solving research problems in modern scientific   disciplines. Undergraduate students are encouraged to pursue interdisciplinary   graduate studies in STEM disciplines. With specific recruiting efforts that   target underrepresented groups such as women, minorities, and persons with   disabilities, especially deaf and hard-of-hearing students, this REU program   also aims to increase the size and diversity of the scientific workforce.</docText>
    <division>CCF</division>
    <directorate>CSE</directorate>
    <award-instr>Standard Grant</award-instr>
    <programreferencecode>HPCC</programreferencecode>
    <keyword>visualization</keyword>
    <programreferencecode>9218</programreferencecode>
    <state>NY</state>
    <programreferencecode>9251</programreferencecode>
    <fieldofapplication>0000912 Computer Science</fieldofapplication>
    <keyword>simulation</keyword>
    <programreferencecode>9150</programreferencecode>
    <progmgr>Eun K. Park</progmgr>
    <programreferencecode>9152</programreferencecode>
    <amount>275000</amount>
    <organization>Rochester Institute of Tech</organization>
    <program>RSCH EXPER FOR UNDERGRAD SITES</program>
    <programelementcode>1139</programelementcode>
    <pi>Bischof, Hans-Peter</pi>
    <copi>Minseok Kwon</copi>
  </document>
  <document>
    <docID>0847659</docID>
    <docDate>May 15, 2009</docDate>
    <docSource></docSource>
    <docText>SGER: From Gene Network to Geno-Mimetic Architecture

   The goal of the SGER project is to develop new tools to understand the principles of gene network operation and to use these principles as the basis for a new kind of geno-mimetic network architecture.  Gene networks display multiple (degenerate) ways of giving a common output. The project identifies what principles these degenerate networks have in common and incorporate such common principles into network and circuit architectures for non-biological computational devices.    The project constitutes a new approach to the question of whether there are common underlying principles to biological network operation. The project also presents the potential to introduce an entirely new class of network architecture based on the functional configurations of gene networks.</docText>
    <division>CCF</division>
    <directorate>CSE</directorate>
    <award-instr>Standard Grant</award-instr>
    <programreferencecode>HPCC</programreferencecode>
    <programreferencecode>9237</programreferencecode>
    <keyword>network</keyword>
    <keyword>architecture</keyword>
    <programreferencecode>9218</programreferencecode>
    <state>CA</state>
    <fieldofapplication>0000912 Computer Science</fieldofapplication>
    <organization>University of California-San Diego</organization>
    <amount>90000</amount>
    <pi>Greenspan, Ralph</pi>
    <progmgr>Tatsuya Suda</progmgr>
    <program>BIO COMPUTING</program>
    <programelementcode>7946</programelementcode>
    <copi>Terrence Sejnowski</copi>
  </document>
  <document>
    <docID>0846872</docID>
    <docDate>May 1, 2009</docDate>
    <docSource></docSource>
    <docText>CAREER: Computational Geometry, Mesh Generation, Geometric Modeling

   ABSTRACT  	Geometric modeling for simulation of complex physical phenomena raises many challenges including algorithmic efficiency, practicality, scalability, robustness, theoretical guarantees, and compatibility with the emerging numerical methods.  We study solutions for geometric discretization problems for spatial domains (encountered in conventional scientific computing) and for space-time domains (motivated by the next-generation numerical methods being developed for solving PDEs directly in the space-time continuum).  Our approach combines the strengths of theoretical algorithms (time complexity, output size optimality, and quality guarantees) and practical heuristics (ease of implementation, performance in practice, scalability).  Two broad classes of problems are studied:  (i) We develop fast, sequential and parallel algorithms and software to compute premium-quality, size-optimal, simplicial and cubical meshes of spatial domains which can evolve as the simulation progress for isotropic and anisotropic problems.  (ii) We develop scalable, provably-good meshing algorithms and software to compute space-time triangulations which enables us to perform simulations directly in the space-time domain.    	The algorithms and the software tools developed within this project are being integrated with applications and contributing to the fundamental research in engineering, scientific computing, solid modeling, computer-aided design, graphics, geographic information systems, computational biology, visualization and molecular modeling. As a result, this project has broader impact across a number of scientific, medical and industrial fields.  Moreover, the project has academic impact through the inclusion of underrepresented groups, the development of interdisciplinary courses which focus on linking fundamental concepts in theoretical areas such as graph theory, geometry and topology to application problems in biology and engineering.</docText>
    <keyword>algorithms</keyword>
    <division>CCF</division>
    <directorate>CSE</directorate>
    <award-instr>Standard Grant</award-instr>
    <programreferencecode>HPCC</programreferencecode>
    <keyword>visualization</keyword>
    <programreferencecode>9218</programreferencecode>
    <fieldofapplication>0000912 Computer Science</fieldofapplication>
    <programreferencecode>1187</programreferencecode>
    <programreferencecode>1045</programreferencecode>
    <programreferencecode>MANU</programreferencecode>
    <programreferencecode>9148</programreferencecode>
    <keyword>graphics</keyword>
    <keyword>computational biology</keyword>
    <keyword>scientific computing</keyword>
    <keyword>simulation</keyword>
    <organization>University of Florida</organization>
    <state>FL</state>
    <keyword>computational geometry</keyword>
    <progmgr>Dmitry Maslov</progmgr>
    <program>COMPUTATIONAL GEOMETRY</program>
    <programelementcode>7929</programelementcode>
    <pi>Ungor, Alper</pi>
    <amount>400627</amount>
    <programreferencecode>068E</programreferencecode>
    <programreferencecode>067E</programreferencecode>
  </document>
  <document>
    <docID>0846196</docID>
    <docDate>July 1, 2009</docDate>
    <docSource></docSource>
    <docText>CAREER: Co-optimization of Integrated Circuit Design and Manufacturing

   Proposal ID: 0846196  Title: CAREER: Co-optimization of Integrated Circuit Design and Manufacturing  PI name:  Puneet Gupta    This CAREER proposal aims to investigate methods for co-optimization of integrated circuit design and the manufacturing process for improved power, performance, yield, cost and turnaround time. The semiconductor industry is likely to see several radical changes in the fabrication and device technologies in the next decade. Each of these technologies requires enormous research investment before they can see any adoption. Conventional after-the-fact changes to design methodologies and tools to technology leads to wasted effort and under-utilization of technology. Therefore, this project focuses on early assessment of circuit design restrictions imposed by technological choices. ?Equivalent scaling? improvements - perhaps as much as one full technology generation - must come from new synergies between various ?silos? of the integrated circuit design to manufacturing flow. The PI plan on developing an algorithmic method of manufacturing process optimization driven by design analyses to significantly speed up yield ramp and improve product characteristics.    Semiconductors have fueled wealth creation and technological revolution for better quality of life in the past few decades. The broader impact of the proposed research comes from enabling chip designers and manufacturers to co-develop future technologies for affordable, high-performance, high-density, low-power integrated circuits. My work will inform both the design technology and process technology roadmaps, so as to enable the electronics industry to derive maximum product benefit from underlying technology. The education component of the proposal will train a new breed of designers who are aware of process interactions and process/device engineers aware of design implications. The PI will leverage UCLA's extensive diversity and outreach resources to recruit students from female and underrepresented groups.</docText>
    <division>CCF</division>
    <directorate>CSE</directorate>
    <award-instr>Standard Grant</award-instr>
    <programreferencecode>HPCC</programreferencecode>
    <programreferencecode>9218</programreferencecode>
    <state>CA</state>
    <fieldofapplication>0000912 Computer Science</fieldofapplication>
    <programreferencecode>1045</programreferencecode>
    <organization>University of California-Los Angeles</organization>
    <progmgr>Sankar Basu</progmgr>
    <keyword>education</keyword>
    <program>DES AUTO FOR MICRO &amp; NANO SYST</program>
    <programelementcode>7945</programelementcode>
    <pi>Gupta, Puneet</pi>
    <programreferencecode>6890</programreferencecode>
    <amount>400633</amount>
  </document>
  <document>
    <docID>0846195</docID>
    <docDate>August 1, 2009</docDate>
    <docSource></docSource>
    <docText>CAREER:  Language Features for Robust Software

   Developing reliable software systems is a key challenge for our  society.  Despite many years of effort, software systems still suffer  from catastrophic failures.  All too often, software failures are  caused by the propagation of errors through critical components of the  system.  Unfortunately, current software development tools and  practices actually encourage the introduction of unnecessary  dependencies that serve to propagate errors between conceptually  unrelated components.    The goal of this research is to explore a new approach for creating  software systems that are robust against failures.  The approach  exposes the high-level structure of a software system to the compiler  and run-time environment to enable the automatic application of techniques that  appropriately manage error propagation to make software systems more  resilient.  The foundation of this approach is a specification  language that allows the developer to identify tasks and describe when  tasks should be invoked and how each task changes the conceptual  states of objects.  A set of techniques use this information to  monitor and analyze task execution to eliminate unnecessary  dependencies.  The broader impact of this research is the potential to  mitigate the effects of software faults.</docText>
    <division>CCF</division>
    <directorate>CSE</directorate>
    <programreferencecode>HPCC</programreferencecode>
    <award-instr>Continuing grant</award-instr>
    <keyword>compiler</keyword>
    <programreferencecode>9218</programreferencecode>
    <state>CA</state>
    <fieldofapplication>0000912 Computer Science</fieldofapplication>
    <programreferencecode>1187</programreferencecode>
    <programreferencecode>1045</programreferencecode>
    <progmgr>Sol J. Greenspan</progmgr>
    <organization>University of California-Irvine</organization>
    <amount>90000</amount>
    <program>PROGRAMMING LANGUAGES</program>
    <programelementcode>7943</programelementcode>
    <pi>Demsky, Brian</pi>
  </document>
  <document>
    <docID>0846152</docID>
    <docDate>July 1, 2009</docDate>
    <docSource></docSource>
    <docText>CAREER: Energy-Efficient Parallel Architectures for Computer Vision

   In the evolution of biological organisms, the ability to see has been a popular feature for millions of years. However, the majority of machines built today remain essentially blind to the photons that continually bombard them. Effective real-time computer vision has countless applications and would have a transformative effect on the economy and safety. Enabling machines to see relies not only on the advancement of computer vision research, but also the design of the hardware platforms that will execute these algorithms with sufficient energy efficiency.    Until recently, the conventional wisdom was that the ability to manufacture chips with exponentially increasing numbers of transistors will bring us processors that are fast enough for whichever algorithm it is we want to run. Unfortunately, power limitations are limiting how many of these transistors a chip can use at any one time. As a result, energy efficiency is the critical metric which will influence whether future vision algorithms are viable solutions to the real-time vision problems.     This research focuses around the design of Stingray, a chip with many massively specialized, diverse kinds of processing cores, which is tuned for maximal energy efficiency in vision processing applications. The project explores these and other architectural challenges that arise in designing effective low power Stingray systems.  It exposes students to a broad range of issues including parallel compilation, vision, and hardware design. It seeks to capture the properties of vision applications to build a complete, prototype vision processor.      This award is funded under the American Recovery and Reinvestment Act of 2009  (Public Law 111-5).</docText>
    <keyword>algorithms</keyword>
    <division>CCF</division>
    <directorate>CSE</directorate>
    <award-instr>Standard Grant</award-instr>
    <programreferencecode>HPCC</programreferencecode>
    <programreferencecode>9218</programreferencecode>
    <state>CA</state>
    <fieldofapplication>0000912 Computer Science</fieldofapplication>
    <programreferencecode>1187</programreferencecode>
    <programreferencecode>1045</programreferencecode>
    <organization>University of California-San Diego</organization>
    <keyword>computer vision</keyword>
    <keyword>vision</keyword>
    <progmgr>Chitaranjan Das</progmgr>
    <program>COMPUTER ARCHITECTURE</program>
    <programelementcode>7941</programelementcode>
    <pi>Taylor, Michael</pi>
    <programreferencecode>6890</programreferencecode>
    <amount>404396</amount>
  </document>
  <document>
    <docID>0846121</docID>
    <docDate>March 1, 2009</docDate>
    <docSource></docSource>
    <docText>CAREER:  Bridging the Gap Between Prototyping and Production

   Modern software engineering methods improve programmer productivity by taking an incremental approach to software development. Software engineers rapidly develop prototypes and then iteratively refine the prototypes into production systems.  However, today's programming systems do not support a smooth transition from prototyping to production. On one hand, scripting languages and interactive environments support prototyping while on the other hand conventional programming languages and optimizing compilers support the development of reusable and efficient production codes. Neither support both prototyping and production, so developers use a mixture of programming systems.  This practice incurs many costs such as the impedance mismatch of inter-language data transfers and the time to translate programs between languages.    The goal of this research is to discover the scientific principles necessary for a single programming system to effectively support the incremental refinement of prototypes into production software. To accomplish this research objective, classic conflicts between flexibility and safety and between abstraction and performance need to be resolved. To achieve both flexibility and safety, the research will investigate ways to combine dynamic and static type checking, using an approach called gradual typing. To achieve both abstraction and performance, the research will develop a domain-specific compiler for linear algebra and show how show how high-level abstractions can provide greater opportunities for compiler optimization than conventional abstractions such as loops and scalar operations. The broader impacts of the project arise from improvements to programmer productivity and software quality.</docText>
    <division>CCF</division>
    <directorate>CSE</directorate>
    <programreferencecode>HPCC</programreferencecode>
    <award-instr>Continuing grant</award-instr>
    <keyword>compiler</keyword>
    <programreferencecode>9218</programreferencecode>
    <keyword>software engineering</keyword>
    <programreferencecode>9251</programreferencecode>
    <fieldofapplication>0000912 Computer Science</fieldofapplication>
    <programreferencecode>1187</programreferencecode>
    <programreferencecode>1045</programreferencecode>
    <organization>University of Colorado at Boulder</organization>
    <state>CO</state>
    <keyword>programming languages</keyword>
    <progmgr>Sol J. Greenspan</progmgr>
    <program>SOFTWARE &amp; HARDWARE FOUNDATION</program>
    <programelementcode>7798</programelementcode>
    <program>PROGRAMMING LANGUAGES</program>
    <programelementcode>7943</programelementcode>
    <pi>Siek, Jeremy</pi>
    <amount>98519</amount>
  </document>
  <document>
    <docID>0846113</docID>
    <docDate>January 1, 2009</docDate>
    <docSource></docSource>
    <docText>CAREER:  Mechanism Design

   Internet systems perform suboptimally because of selfish user behavior; examples include email spam, freeloading, link spam, and packet flooding. How should a multi-user system such as a computer network be designed such that it operates well in the presence of selfish user behavior?  The field of mechanism design lays the economic foundations for the design and analysis of protocols, services, and applications in computer networks where users may act selfishly in their own best interest.  With varying degrees of clarity, the classical mechanism design literature gives rigorous mathematical tools from which optimal mechanisms can be derived.  Unfortunately, except for a few cases, optimal mechanisms are complex, highly dependent on the details of the setting, and impractical.  Dr.  Hartline addresses each these critiques in detail, and his project includes a well connected research agenda for developing a theory of mechanism design that is relevant to computer systems.    This project will develop a theory for the design of mechanisms that are universal, simple, and practical.  Mechanisms for computer systems must be universal -- indeed the success of the Internet is owed in part to the fact that most Internet protocols function under a wide range of workloads.  Mechanisms for the Internet must be simple, if they are parameterized by more than a few dimensions, they are too difficult to optimize.  Note in contrast that the classical economic theory gives complicated mechanisms that are inextricably dependent on the the setting.  Finally, mechanisms for the Internet must be practical; this project addresses the disconnect between theory and practice in the computer science literature on mechanism design.</docText>
    <division>CCF</division>
    <directorate>CSE</directorate>
    <programreferencecode>HPCC</programreferencecode>
    <award-instr>Continuing grant</award-instr>
    <keyword>network</keyword>
    <programreferencecode>9218</programreferencecode>
    <programreferencecode>9251</programreferencecode>
    <fieldofapplication>0000912 Computer Science</fieldofapplication>
    <programreferencecode>1187</programreferencecode>
    <programreferencecode>1045</programreferencecode>
    <state>IL</state>
    <organization>Northwestern University</organization>
    <progmgr>Tracy J. Kimbrel</progmgr>
    <program>COMPUT GAME THEORY &amp; ECON</program>
    <programelementcode>7932</programelementcode>
    <pi>Hartline, Jason</pi>
    <amount>90245</amount>
  </document>
  <document>
    <docID>0846059</docID>
    <docDate>July 1, 2009</docDate>
    <docSource></docSource>
    <docText>CAREER: On Mutualism of Modularity and Concurrency Goals

   This project focuses on the problem of making concurrent programs easier to write correctly and to implement efficiently.  Modularity promotes ease of understand and maintainability, but modularity is often at odds with the discovery and exploitation of concurrency needed to get high performance while avoiding undesirable interactions and race conditions. To approach this problem, this project is developing a novel language, Panini, in which events are first-class objects which can be analyzed to plan concurrent executions.  The objective is to reconcile modularity and concurrency goals so that modular designs are naturally more amenable to concurrency. Panini will be evaluated in terms of its ability to support program modularity and performance on publicly available versions of large open-source software projects on multi-core processors use. The broader impacts are to make software more reliable, maintainable, and at the same time faster. Considering that software systems are essential elements of today's society, better and faster software will directly impact society.</docText>
    <division>CCF</division>
    <directorate>CSE</directorate>
    <programreferencecode>HPCC</programreferencecode>
    <award-instr>Continuing grant</award-instr>
    <programreferencecode>9218</programreferencecode>
    <programreferencecode>9251</programreferencecode>
    <fieldofapplication>0000912 Computer Science</fieldofapplication>
    <programreferencecode>1045</programreferencecode>
    <organization>Iowa State University</organization>
    <state>IA</state>
    <progmgr>Sol J. Greenspan</progmgr>
    <program>SOFTWARE ENG &amp; FORMAL METHODS</program>
    <programelementcode>7944</programelementcode>
    <program>PROGRAMMING LANGUAGES</program>
    <programelementcode>7943</programelementcode>
    <pi>Rajan, Hridesh</pi>
    <amount>121573</amount>
  </document>
  <document>
    <docID>0846053</docID>
    <docDate>September 1, 2009</docDate>
    <docSource></docSource>
    <docText>CAREER: An Effective Integration of Research and Education on High-Speed and Energy-Efficient Interconnects for Multi-Core and Multi-Thread Systems

   Proposal ID: 0846053   Title: CAREER: An Effective Integration of Research and Education on High-Speed and Energy-Efficient Interconnects for Multi-Core and Multi-Thread Systems  PI name:  Jiangjiang Liu       Abstract:    The goal of this CAREER project is to improve the speed and energy efficiency of computers that use multi-core systems.  There is enormous demand for these multi-core systems in high-performance and data-intensive applications.  When information is sent from one core to another, the interconnect devices create a bottleneck.  Compressing the information to reduce its size speeds up the transfer over the interconnects and reduces energy consumption.  This project will conduct the first comprehensive compressibility analysis of information on all important interconnect components for multi-core systems in the context of real-world application programs.  This will help guide the proposed design of compression techniques for interconnects and provide a deeper understanding of how compression should be applied to help interconnect performance and alleviate energy bottlenecks in multi-core systems. Three novel information compression techniques are proposed. The proposed methods can be adapted and applied to address high-speed I/O channel performance and energy bottlenecks.      The CAREER project effectively integrates research and education; promotes undergraduate and graduate research; stimulates and equips aspiring computer science undergraduates who are underrepresented or economically challenged in advanced study; triggers initial interest of K-12 students in computing with strong outreach efforts; enhances Lamar?s infrastructure by providing high-performance computing equipment; enhances scientific and technological understanding by disseminating the results of the program to a broad audience through international publications and a dedicated website; and advances and accelerates expansion of high performance computing applications as well as commercial business applications by improving the interconnect speed and overall performance of multi-core systems.</docText>
    <division>CCF</division>
    <directorate>CSE</directorate>
    <state>TX</state>
    <award-instr>Standard Grant</award-instr>
    <programreferencecode>HPCC</programreferencecode>
    <programreferencecode>9218</programreferencecode>
    <fieldofapplication>0000912 Computer Science</fieldofapplication>
    <programreferencecode>1187</programreferencecode>
    <programreferencecode>1045</programreferencecode>
    <progmgr>Sankar Basu</progmgr>
    <keyword>education</keyword>
    <keyword>high-performance computing</keyword>
    <amount>400000</amount>
    <organization>Lamar University Beaumont</organization>
    <program>DES AUTO FOR MICRO &amp; NANO SYST</program>
    <programelementcode>7945</programelementcode>
    <pi>Liu, Jiangjiang</pi>
  </document>
  <document>
    <docID>0846028</docID>
    <docDate>March 1, 2009</docDate>
    <docSource></docSource>
    <docText>CAREER: Secure Communication via Source and Channel Randomness

   Abstract for  ?CAREER: Secure Communication via Source and Channel Randomness?  Current cryptosystem design depends on two main kinds of algorithms: secret-key and public-key algorithms. Secret-key algorithms are simple and efficient but have key management difficulty. Public-key algorithms are simple in key management but are computationally costly and vulnerable to the man-in-the-middle attack. This research investigates the emerging physical layer security approaches, which either achieve secure communication without keys, or simplify key management by generating keys using powerful coding techniques. This research aims at facilitating implementation of the physical layer security approaches to practical wireless communication systems, and stimulating interdisciplinary collaborations among researchers in mathematics, computer science and electrical engineering.  This research provides a comprehensive framework to solve the problems of keyless secure communication and key agreement (key generation and distribution) for a variety of communication environments including noncoherent communication, channels with compound states, fading channels, noisy eavesdropping, and multihop networks. To be specific, this research investigates robust secure communication under channel uncertainty and delay constraint, fundamental tradeoff in multi-key agreement for different terminal pairs, key agreement algorithms by jointly using source and channel randomness, and key agreement protocols in multihop networks by exploiting network coding. This program is strongly coupled with educational and curriculum development at the University of Hawaii, and involves development of an advanced monograph on the topic of physical layer security to help disseminate the progresses in this active area in and outside the communication society.</docText>
    <keyword>algorithms</keyword>
    <division>CCF</division>
    <directorate>CSE</directorate>
    <programreferencecode>HPCC</programreferencecode>
    <award-instr>Continuing grant</award-instr>
    <keyword>network</keyword>
    <keyword>security</keyword>
    <keyword>wireless</keyword>
    <programreferencecode>9218</programreferencecode>
    <progmgr>John Cozzens</progmgr>
    <fieldofapplication>0000912 Computer Science</fieldofapplication>
    <programreferencecode>1045</programreferencecode>
    <programreferencecode>9150</programreferencecode>
    <organization>University of Hawaii</organization>
    <state>HI</state>
    <program>COMM &amp; INFORMATION THEORY</program>
    <programelementcode>7935</programelementcode>
    <pi>Liang, Yingbin</pi>
    <amount>123209</amount>
  </document>
  <document>
    <docID>0846012</docID>
    <docDate>June 1, 2009</docDate>
    <docSource></docSource>
    <docText>CAREER: Lightweight, Blame-aware Contract Checking

   This award is funded under the American Recovery and Reinvestment Act of 2009  (Public Law 111-5).    As computers become more powerful, the limiting factor for building software systems is shifting away from the underlying computer's performance limitations to the software's inherent complexity. One way to cope with this complexity is to use software contracts to separate a large system into smaller chunks, thereby enabling programmers to focus their energy on just one small part of the system at a time. A key feature of this separation is the ability to assign blame; that is, when the software system fails, a contract checker can use the contracts to identify a single sub-system as faulty, automatically narrowing the search for the underlying cause of the failure to that one subsystem or possibly its contract; of course, fixing a bug in a contract may yet expose latent bugs in other subsystems but in each case the contract system will help the programmer identify the failure. Even better, software contracts are typically written in a language that is very close to the programming language, meaning that programmers only have to invest a little bit of their time and resources in order to start seeing the benefits of contracts.    This work promises to improve the state of the art in contract checking. Specifically, the PI will study the interaction between statically and dynamically verified portions of systems, in a manner similar to hybrid and gradual types. Building on this integration, the PI will also study how to integrate theorem provers into software systems in a way that the theorem prover's scope can be limited to just the most mission-critical parts of the system. The PI will also study how to add contracts to more sophisticated modularity mechanisms like traits and the ML module system, and explore how contracts can help generalize existing techniques for automatic test case and test oracle generation to support higher-order functions and unknown classes. All the while, the PI will ensure that these new techniques are practically viable by using them in a 500,000 line software system that the he maintains, as well as conducting detailed studies of how contracts are used in other settings, including JML and Eiffel.</docText>
    <division>CCF</division>
    <directorate>CSE</directorate>
    <award-instr>Standard Grant</award-instr>
    <programreferencecode>HPCC</programreferencecode>
    <programreferencecode>9218</programreferencecode>
    <fieldofapplication>0000912 Computer Science</fieldofapplication>
    <programreferencecode>1187</programreferencecode>
    <programreferencecode>1045</programreferencecode>
    <state>IL</state>
    <organization>Northwestern University</organization>
    <progmgr>Sol J. Greenspan</progmgr>
    <pi>Findler, Robert</pi>
    <program>SOFTWARE ENG &amp; FORMAL METHODS</program>
    <programelementcode>7944</programelementcode>
    <programreferencecode>6890</programreferencecode>
    <amount>429723</amount>
  </document>
  <document>
    <docID>0846010</docID>
    <docDate>July 1, 2009</docDate>
    <docSource></docSource>
    <docText>CAREER: Contingent Static Analysis for Dynamically Composed Systems

   This award is funded under the American Recovery and Reinvestment Act of 2009  (Public Law 111-5).    Pervasive societal use of information systems has increased the need  for software to be both reliable and extensible.  One technique that  can be used to improve software reliability is the application of  static analyses to discover and validate that properties hold across  all program executions.  Unfortunately, additional challenges arise when  applying static analyses to programs that can be dynamically extended,  such as is the case, for example, with Firefox plugins, Microsoft Office  Add-Ins, and Eclipse plugins.  This project will develop techniques  for contingent static analysis that will be able to more precisely and  efficiently analyze dynamically extensible software systems.    Specifically, this project will explore techniques for accommodating  dynamic composition during interprocedural program analysis using a  runtime mechanism to efficiently avoid making overly conservative  approximations.  Analysis results will be expressed as contingent  properties of different program regions, where the validity of each  contingent property depends explicitly on the validity of properties  from other program regions.  The runtime mechanism will then validate  and invalidate these contingent properties as new code is dynamically  loaded into the execution environment.  This approach will be applied  to develop contingent escape and information flow analyses.</docText>
    <division>CCF</division>
    <directorate>CSE</directorate>
    <state>TX</state>
    <award-instr>Standard Grant</award-instr>
    <programreferencecode>HPCC</programreferencecode>
    <programreferencecode>9218</programreferencecode>
    <fieldofapplication>0000912 Computer Science</fieldofapplication>
    <programreferencecode>1187</programreferencecode>
    <programreferencecode>1045</programreferencecode>
    <progmgr>Sol J. Greenspan</progmgr>
    <organization>University of Texas at San Antonio</organization>
    <amount>425000</amount>
    <program>SOFTWARE ENG &amp; FORMAL METHODS</program>
    <programelementcode>7944</programelementcode>
    <programreferencecode>6890</programreferencecode>
    <pi>von Ronne, Jeffery</pi>
  </document>
  <document>
    <docID>0846004</docID>
    <docDate>March 1, 2009</docDate>
    <docSource></docSource>
    <docText>CAREER: Deterministic Shared Memory Multiprocessing: Vision, Architecture, and Impact on Programmability

   Software innovation typically relies on performance improvements of  the underlying hardware. However, technology limitations hinder  further significant progress in single-thread performance. Therefore,  the software industry has the immense problem of rethinking its  software development process and techniques to adopt multicore  systems. Popularizing parallel programming is a Grand Research  Challenge for the systems community [CRA]. Being able to leverage the  full potential of multicores would put us back into exponential growth  of usable performance as well as lead to significant power savings.    One of the main reasons why parallel programming is hard is that  parallel code in current multicore systems can execute  nondeterministically. Each time a multicore executes a parallel  application, it can produce a different output even if supplied with  the same input. This frustrates debugging efforts and limits the  ability to properly test parallel code, becoming a major obstacle to  widespread adoption of parallel programming.     This project poses broad intellectual questions with far-reaching  implications in modern computer systems: Can nondeterminism be removed  from shared-memory multiprocessor systems without degrading  performance? What are the trade-offs in designing deterministic  multiprocessor systems?  What are the implications and uses of  deterministic behavior in programmability? The PI plans to answer these  questions by devising efficient, general purpose, fully deterministic  shared memory multiprocessor systems and demonstrating that they can  enable significant changes in how parallel programs are written,  tested and deployed. An integral part of the concurrency challenge is  education, so this project also aims to develop a graduate and  undergraduate curriculum that will teach students about concurrency  principles and practical parallel programming.</docText>
    <division>CCF</division>
    <directorate>CSE</directorate>
    <programreferencecode>HPCC</programreferencecode>
    <award-instr>Continuing grant</award-instr>
    <keyword>architecture</keyword>
    <programreferencecode>9218</programreferencecode>
    <programreferencecode>9251</programreferencecode>
    <fieldofapplication>0000912 Computer Science</fieldofapplication>
    <programreferencecode>1045</programreferencecode>
    <organization>University of Washington</organization>
    <state>WA</state>
    <keyword>education</keyword>
    <keyword>vision</keyword>
    <program>COMPILERS</program>
    <programelementcode>7329</programelementcode>
    <progmgr>Chitaranjan Das</progmgr>
    <program>SOFTWARE &amp; HARDWARE FOUNDATION</program>
    <programelementcode>7798</programelementcode>
    <program>COMPUTER ARCHITECTURE</program>
    <programelementcode>7941</programelementcode>
    <pi>Ceze, Luis</pi>
    <amount>98564</amount>
  </document>
  <document>
    <docID>0845998</docID>
    <docDate>March 1, 2009</docDate>
    <docSource></docSource>
    <docText>CAREER: Communication-Centric Chip Multiprocessor Design

   The ever-shrinking feature size in CMOS process technology has enabled the integration of a large number of devices such as cores, caches, and other special engines in a single chip. The growing popularity of Chip Multiprocessors (CMPs) has ushered in the arrival of a communication-centric system where the design of interconnection architecture has a significant impact on the overall system performance as well as power dissipation and area of a chip. To overcome traditional interconnects problems, Network-on-chip (NoC), using switch-based networks, has been widely accepted as a promising architecture to orchestrate chip-wide communication. Although there has been significant research on NoC designs, there is still a lack of a unified design methodology integrating system and NoC design.    The investigator is developing a comprehensive design paradigm for exploring the on-chip interconnect design space, especially focusing on how it interacts with the rest of the CMP architecture. This research program is comprised of four intertwined research objectives. First, simulation testbeds and traffic analysis methodologies are developed to understand the interplay between applications and system architecture.  Traffic analysis tools are used to capture the runtime behavior of various applications in CMPs. Second, solutions for high and predictable performance within power and area budgets in current and future technology generations are provided. Third, the PI is  developing a domain specific NoC design for CMP memory systems. As the last objective, the PI  explores new opportunities and challenges posed by future applications of next-generation CMP. The research is integrated into the education curriculum, through existing and new graduate courses, and in undergraduate research programs.</docText>
    <division>CCF</division>
    <directorate>CSE</directorate>
    <organization>Texas Engineering Experiment Station</organization>
    <state>TX</state>
    <programreferencecode>HPCC</programreferencecode>
    <award-instr>Continuing grant</award-instr>
    <keyword>network</keyword>
    <keyword>architecture</keyword>
    <programreferencecode>9218</programreferencecode>
    <progmgr>Almadena Y. Chtchelkanova</progmgr>
    <fieldofapplication>0000912 Computer Science</fieldofapplication>
    <programreferencecode>1187</programreferencecode>
    <programreferencecode>1045</programreferencecode>
    <keyword>simulation</keyword>
    <keyword>education</keyword>
    <pi>Kim, Eun Jung</pi>
    <program>COMPUTER ARCHITECTURE</program>
    <programelementcode>7941</programelementcode>
    <amount>76262</amount>
  </document>
  <document>
    <docID>0845983</docID>
    <docDate>August 1, 2009</docDate>
    <docSource></docSource>
    <docText>CAREER: Wireless Network-on-Chip: A New Communication Paradigm for Heterogeneous Gigascale MPSoCs

   Proposal ID: 0845983    Title: CAREER: Wireless Network-on-Chip: A New Communication Paradigm for Heterogeneous Gigascale MPSoCs  PI name: Zhao, Danella       Institution: University of Louisiana at Lafayette     ABSTRACT  Many-core System-on-Chip (MCSoC) designs are rapidly emerging, where hundreds or even thousands of IP cores are integrated on a single die. Such MCSoC devices allow superior performance gains while side-stepping the power and heat dissipation limitations of clock frequency scaling. Consequently, the on-chip communication fabric becomes the performance determinant. This project aims at developing a new on-chip communication system, dubbed Wireless Network-on-Chip (WNoC) to sustain the exponential growth of computing performance in the next generation gigascale heterogeneous MCSoCs. The PI lays out the research directions of WNoC from various crucial aspects. The UWB physical layer will be explored to accomplish high data-rate, high bandwidth and low-power wireless on-chip communication. The system architecture will be designed in a way that decouples communication from computation, and a reconfigurable RF infrastructure will be developed to address the heterogeneity of MCSoC. The layered protocol will be specially designed to tackle distinct features of WNoC from conventional wireless networks and to simplify the hardware implementation. Highly compact and configurable RF nodes will be designed to support heterogeneous architecture and customization for specific application mapping. A suite of development and prototyping activities will be carried out to demonstrate the applicability and feasibility of WNoC. Some breakthroughs could be forthcoming in the area of intra-chip RF/wireless interconnect network for high performance computing in the upcoming nanoscale MCSoC paradigm.       Boarder Impact: This project will have a very broad impact on the on-going and future research in Nanodevices for high performance computation. Innovative pedagogical methods for classroom instruction will be explored. Research opportunities will be offered for minority and female students. It will foster the partnerships with industry and government laboratories.</docText>
    <division>CCF</division>
    <directorate>CSE</directorate>
    <award-instr>Standard Grant</award-instr>
    <programreferencecode>HPCC</programreferencecode>
    <keyword>network</keyword>
    <keyword>wireless</keyword>
    <keyword>architecture</keyword>
    <programreferencecode>9218</programreferencecode>
    <fieldofapplication>0000912 Com