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August 28, 2006
(August 28, 2006)--College of Computing Assistant Professor Pete Manolios lectured at the 6th International School on Formal Methods for the Design of Computer Communication and Software Systems in Bertinoro, Italy.
The School is targeted towards graduate students and young researchers in the field, and brings together an international collection of leading academic and industrial experts in the area of hardware verification. Held at an Episcopal fortress dating back to the 10th century, Professor Manolios lectured on the use of refinement and theorem proving in hardware verification. This is a timely problem because functional verification is often a bottleneck in the microprocessor design cycle. As the complexity of microprocessor designs are ever-increasing, along with the potentially devastating economic consequences of shipping defective products, large amounts of time, human effort, and resources are required. For example the 1994 Pentium FDIV bug cost Intel $475 million, and it is estimated that a similar bug in the current generation Pentium processor would cost Intel $12 billion.
Manolios is part of the College's Computing Science & Systems (CSS) division, as well as the Center for Experimental Research in Computer Systems (CERCS) and the Georgia Tech Information Security Center (GTISC). He is also an Adjunct in the School of Electrical and Computer Engineering, and his current research focuses on developing and applying formal verification techniques to help build computing systems that society can depend on.
For more information on the 6th International School, click here.
For the compilation of this year’s lectures, click here.