CS 4803/8803 AIC: Advanced Issues in Computer Architecture

Spring 2007, TuTh noon-1:30, Whittaker 1103

(Class will move to Klaus after a few lectures)

Description

This post-4290/6290 course is an in-depth exploration of several key topics in computer architecture. The major topics covered in the class will be multi-core and multi-threaded processors, hardware reliability issues (soft errors, error budgets, detection and recovery), support for software debugging and monitoring, and programmability of parallel machines (consistency models, thread-level speculation, transactional memory).

Discussion of each topic will consist of an introductory lecture and paper discussions. In each introductory lecture, the instructor will explain the key issues, concepts, and approaches for the topic at hand. Each paper discussion lecture will include presentation of one or two papers by a student and class discussion. Students will be expected to write a single-page summary and critique of each paper and submit it at the beginning of the class in which the paper is discussed.

Students in the class are also expected to select and complete a substantial project related to one of the topics discussed in the class. Students can choose to work individually or in pairs on their projects and present their project at the end of the class.

Prerequisites

Students should have taken CS4290/6290 or an equivalent course.

Textbook and Schedule

There is no textbook for this class. Instead, the class is based on research papers. The schedule of introductory lectures, papers for discussion, and important dates can bee found here.

Instructor

Milos Prvulovic, KACB 2406

Grading

Project 40% Midterm Exam 20% (This will be a take-home exam) Paper critiques 20% Discussion 10% Presentation 10%

Midterm Exam

For each of the following two papers, fill out the review form and submit your reviews as attachments in an e-mail sent to Milos. These reviews are due befor noon on Thursday, February 15th.

Evan Speight, Hazim Shafi, Lixin Zhang, and Ram Rajamony, "Adaptive Mechanisms and Policies for Managing Cache Hierarchies in Chip Multiprocessors", ISCA 2005.

Andreas Moshovos, "RegionScout: Exploiting Coarse Grain Sharing in Snoop-Based Coherence", ISCA 2005.

To help you with your reviews, you can take a look at these slides that try to explain the review process.

Also, you can take a look at the following sample reviews, which were written by a real student that got top grades for these reviews in a previous offering of this class. The first sample review is for the paper by Shubhendu S. Mukherjee and Mark D. Hill, "Using Prediction to Accelerate Coherence Protocols", in ISCA 1998. The second sample review is for the paper by Rakesh Kumar, Victor Zyuban, and Dean M. Tullsen, "Interconnections in Multi-Core Architectures - Understanding Mechanisms, Overheads, and Scaling", in ISCA 2005.

Past Offerings

This class has previously been offered in Spring 2006. Click here to see the archived web site.