This post-4290/6290 course is an in-depth exploration of several key topics in computer architecture. The major topics covered in the class will be multi-core and multi-threaded processors, hardware reliability issues (soft errors, error budgets, detection and recovery), support for software debugging and monitoring, and programmability of parallel machines (consistency models, thread-level speculation, transactional memory).
Discussion of each topic will consist of an introductory lecture and paper discussions. In each introductory lecture, the instructor will explain the key issues, concepts, and approaches for the topic at hand. Each paper discussion lecture will include presentation of one or two papers by a student and class discussion. Students will be expected to write a single-page summary and critique of each paper and submit it at the beginning of the class in which the paper is discussed.
Students in the class are also expected to select and complete a substantial project related to one of the topics discussed in the class. Students can choose to work individually or in pairs on their projects and present their project at the end of the class.
Shubhendu S. Mukherjee and Mark D. Hill, "Using Prediction to Accelerate Coherence Protocols", ISCA 1998.
Rakesh Kumar, Victor Zyuban, Dean M. Tullsen, "Interconnections in Multi-Core Architectures - Understanding Mechanisms, Overheads, and Scaling", ISCA 2005.