Date Day Comment
1/9 Tue Begin Class Intro 1
1/11 Thu   Class Intro 2
1/16 Tue   Shared Memory Machines: Introductory Lecture
Papamarcos and Patel: "A Low-Overhead Coherence Solution for Multiprocessors with Private Cache Memories", ISCA 1984
1/18 Thu   Adve and Gharachorloo, "Shared Memory Consistency Models: A Tutorial", IEEE Computer, December 1996
Ranganathan, Pai, Adve, "Using Speculative Retirement and Larger Instruction Windows to Narrow the Performance Gap between Memory Consistency Models", SPAA 1997
1/23 Tue   Martin, Hill, and Wood, "Token Coherence: Decoupling Performance and Correctness", ISCA 2003. (Ioannis)
Martin, Harper, Sorin, Hill, and Wood, "Using Destination-Set Prediction to Improve the Latency/Bandwidth Tradeoff in Shared Memory Multiprocessors", ISCA 2003
1/25 Thu   Cain and Lipasti, "Memory Ordering: A Value-Based Approach", ISCA 2005
Arwind, Maessen, "Memory Model = Instruction Reordering + Store Atomicity", ISCA 2006
1/30 Tue   Eggers, Emer, Levy, Lo, Stamm, and Tullsen, "Simultaneous Multithreading: A Paltform for Next-Generation Processors", IEEE Micro, September 1997
Luo, Gummaraju, and Franklin, "Balancing Throughput and Fairness in SMT Processors", ISPASS 2001
2/1 Thu   Laudon and Lenoski, "The SGI Origin: A ccNUMA Highly Scalable Server", ISCA 1997
Hammond, Nayfeh, Olukotun, "A Single-Chip Multiprocessor", IEEE Computer, September 1997. (Brian)
2/6 Tue   Huh, Kim, Shafi, Zhang, Burger, and Keckler, "A NUCA Substrate for Flexible CMP Cache Sharing", ICS 2005. (Min)
Zhang, Asanovic, "Victim Replication: Maximizing Capacity while Hiding Wire Delay in Tiled Chip Multiprocessors", ISCA 2005. (Minjang)
2/8 Thu   Kumar, Zyuban, Tullsen, "Interconnections in Multi-Core Architectures: Understanding Mechanisms, Overheads and Scaling", ISCA 2005. (Adit)
Li, Nicopoulos, Richardson, Xie, Vijaykrishnan, and Kandemir, "Design and Management of 3D Chip Multiprocessors using Network-in-Memory", ISCA 2006. (Bharat)
2/13 Tue Midterm Two papers will be assigned on Thursday the 8th at the end of class. Each student will write a full review  (up to 3 pages) of each paper. The reviews will be due Thursday the 15th at the start of class. The class will not meet on Tuesday the 13th.
2/15 Thu   Reliability and Recovery: Introductory Lecture
2/20 Tue   Austin, "DIVA: A Reliable Substrate for Deep Submicron Microarchitecture Design", MICRO 1999
2/22 Thu Prject Proposals Due Wu, Fuchs, and Patel, "Error Recovery in Shared Memory Multiprocessors Using Private Caches", IEEE Transactions on Parallel and Distributed Systems, April 1990
Sundaramoorthy, Purser, and Rotenberg, "Slipstream Processors: Improving both Performance and Fault Tolerance", ASPLOS 2000
2/27 Tue   Mukherjee, Weaver, Emer, Reinhardt, Austin, "A Systematic Methodology to Compute the Architectural Vulnerability Factors for a High-Performance Microprocessor", MICRO 2003
Weaver, Emer, Mukherjee, and Reinhardt, "Techniques to Reduce the Soft Error Rate of a High-Performance Microprocessor", ISCA 2004
3/1 Thu   Biswas, Cheveresan, Emer, Mukherjee, Racunas, Rangan, "Computing Architectural Vulnerability Factors for Address-Based Structures", ISCA 2005.
Reis, Chang, Vachharajani, Rangan, August, Mukherjee, "Design and Evaluation of Hybrid Fault-Detection Systems", ISCA 2005.
3/6 Tue   Srinivasan, Adve, Bose, and Rivers, "Exploiting Structural Duplication for Lifetime Reliability Enhancement", ISCA 2005. (Adit)
Sarangi, Tiwari, Torrellas, "Phoenix: Detecting and Recovering from Permanent Processor Design Bugs with Programmable Hardware ", MICRO 2006. (Ioannis)
3/8 Thu   Support for Software Monitoring and Debugging: Introductory Lecture
3/13 Tue   Dean, Hicks, Waldspurger, Weihl, and Chrysos, "ProfileMe: Hardware Support for Instruction-Level Profiling on Out-of-Order Processors", MICRO 1997. (Chaitanya)
Zilles and Sohi, "A Programmable Co-processor for Profiling", HPCA 2001. (Brian)
3/15 Thu   Witchel, Cates, Asanovic, "Mondrian Memory Protection" ASPLOS 2002. (Minjang)
Venkataramani, Roemer, Solihin, and Prvulovic, "MemTracker: Efficient and Programmable Support for Memory Access Monitoring and Debugging", HPCA 2007. (Min)
3/20 Tue Spring Break  
3/22 Thu
3/27 Tue   Qin, Lu, Zhou, SafeMem: Exploiting ECC-Memory for Detecting Memory Leaks and Memory Corruption During Production Runs, HPCA 2004. (Minjang)
Bond, McKinley, " Bell: Bit-Encoding Online Memory Leak Detection", ASPLOS 2006.
3/29 Thu   Xu, Bodík, and Hill, "A "Flight Data Recorder" for Enabling Full-System Multiprocessor Deterministic Replay", ISCA 2003. (Chaitanya)
Xu, Bodik, Hill, "A Regulated Transitive Reduction (RTR) for Longer Memory Race Recording", ASPLOS 2006."
4/3 Tue   Prvulovic, "CORD: Cost-effective (and nearly overhead-free) Order-Recording and Data race detection", HPCA 2006. (Bharat)
Lu, Tucek, Qin, Zhou, "AVIO: Detecting Atomicity Violations via Access Interleaving Invariants", ASPLOS 2006. (Ioannis)
4/5 Thu   Emerging Programming Models for Multi-Core
Moore, Bobba, Moravan, Hill, Wood, "LogTM: Log-based Transactional Memory", HPCA 2006.
4/10 Tue   McDonald, Chung, Carlstrom, Minh, Chafi, Kozyrakis, Olukotun,"Architectural Semantics for Practical Transactional Memory", ISCA 2006. (Rahul)
Ceze, Montesinos, von Praun, Torrellas, "Colorama: Architectural Support for Data-Centric Synchronization", HPCA 2007. (Bharat)
4/12 Thu   Security and Virtualization
Crandall and Chong, "Minos: Control Data Attack Prevention Orthogonal to Memory Model", MICRO 2004.
4/17 Tue   Suh, O'Donnell, Sachdev, Devadas, "Design and Implementation of the AEGIS Single-Chip Secure Processor Using Physical Random Functions", ISCA 2005. (Adit)
Crandall, Wassermann, de Oliveira, Wu, Chong, "Temporal Search: Detecting Hidden Malware Timebombs with Virtual Machines", ASPLOS 2006.
4/19 Thu   Adams, Agesen, "A Comparison of Software and Hardware Techniques for x86 Virtualization", ASPLOS 2006. (Min)
Willmann, Shafer, Carr, Menon, Rixner, Cox, Zwaenepoel, "Concurrent Direct Network Access for Virtual Machine Monitors", HPCA 2007. (Chaitanya)
4/24 Tue Dead Week Project Presentations
4/26 Thu
5/1 Tue Finals Week Hawaii
5/3 Thu