Samantika Subramaniam
samantika.subramaniam@intel.com
samantik@cc.gatech.edu
samantika@gmail.com




I have recently joined VSSAD, a research and advanced development group, at Intel, MA.
I received my Masters degree in Computer Science in December 2006 and will graduate with a PhD in Computer Science in Spring 2009. My area of research is Computer Architecture and my advisor is Dr. Gabriel Loh.
My research has focused on exploring predictable behavior patterns in memory instructions to improve the efficiency of modern processors. During my years at Tech, I have worked on memory dependence prediction,speculative commit of stores and scalable store-load forwarding. I have also worked on designing efficient fetch policies for SMT based machines and load instruction criticality. The papers listed below describe these techniques in detail. Apart from my core area of Computer Architecture I have worked on various systems oriented projects such as dynamic cluster resource monitoring and developing a new database interface to the 'deep web'. As part of my undergraduate studies I have done extensive research in wireless networks.
For more information refer to my CV. I also have a keen interest in Finance and Marketing and have completed my Minor from the College of Management at Georgia Tech.
For Spring 2008 I was the TA for CS 6290 High-Performance Computer Architecture.
Contrary to how it might seem I do have a life apart from work. I love volunteering with Association for India's Development (AID) and enjoy dancing and cooking. I also manage the LinkedIn group for Anita Borg Institute for Women in Computing. Please do join! (ABI-LinkedIn for Good).
Here is a link to my LinkedIn profile Sam.


  Publications 

Samantika Subramaniam, Anne Bracy, Hong Wang, Gabriel H. Loh
Criticality-Based Optimizations for Efficient Load Processing (pdf)
In the International Symposium on High-Performance Computer Architecture(HPCA),February 14-18, 2009,NC,USA.
(ppt)

Rahul Garde, Samantika Subramaniam, Gabriel H. Loh
Deconstructing the Inefficacy of Global Cache Replacement Policies(pdf)
In the 7th Workshop on Duplicating, Deconstructing, and Debunking (WDDD), June 22, 2008, Beijing, China. (Held in conjunction with ISCA-35.)

Samantika Subramaniam, Milos Prvulovic, Gabriel H. Loh
PEEP: Exploting Predictability of Memory Dependences in SMT Processors (pdf)
In the International Symposium on High-Performance Computer Architecture (HPCA), February 16-20, 2008, Utah, USA.
(ppt)

Samantika Subramaniam, Gabriel H. Loh
Exploting Predictability in Memory Dependences to mitigate load latencies
In the Grace Hopper Celebration for Women in Computing Conference (GHC), October 16-20, 2007, Orlando, USA.
Selected poster

Samantika Subramaniam, Gabriel H. Loh
Fire-and-Forget: Load/Store Scheduling with No Store Queue at All (pdf)
In the International Symposium on Microarchitecture (MICRO), December 11-13, 2006, Orlando, FL, USA.
Best student presentation award (ppt)

Samantika Subramaniam, Gabriel H. Loh
Store Vectors for Scalable Memory Dependence Prediction and Scheduling (pdf)
In the International Symposium on High-Performance Computer Architecture (HPCA), February 13-15, 2006, Austin, TX, USA.
Best student presentation award (ppt)