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Parallel Simulation Systems - GTW

Georgia Tech Time Warp

Georgia Tech Time Warp (GTW) is a general purpose parallel discrete event simulation executive using optimistic synchronization techniques. GTW utilizes a number of optimizations to maximize performance including direct cancellation, fast GVT algorithms, on-the-fly fossil collection, and memory-based control of optimism. Versions of GTW currently exist for shared memory multiprocessors such as the SparcStation and SGI PowerChallenge, and heterogeneous networks of workstations (including multiprocessor workstations). Early versions of GTW for shared-memory machines were used as the basis for other Time Warp systems including the University of Calgary's WarpKit system and SAIC's Tempo system.

Principal applications using GTW are simulations of telecommunication networks, commercial air traffic (developed by MITRE), and battle management simulations.

Currently, the shared-memory version of GTW is distributed without cost for internal research and development purposes. Such use does not include use of the software in commercial products. A seperate license agreement must be negotiated with the Georgia Tech Research Corporation to use GTW within a commercial product.

PUBLICATIONS

  • S. Das, R. M. Fujimoto, K. Panesar, D. Allison, and M. Hybinette, ``GTW: A Time Warp System for Shared Memory Multiprocessors,'' 1994 Winter Simulation Conference, December 1994, pp. 1332-1339.
  • R. M. Fujimoto and M. Hybinette, ``Computing Global Virtual Time in Shared-Memory Multiprocessors,'' to appear in ACM Transactions on Modeling and Computer Simulation.
  • K. Ghosh, K. Panesar, R. M. Fujimoto, and K. Schwan. ``PORTS: A Parallel, Optimistic, Real-Time Simulator,'' 1994 Workshop on Parallel and Distributed Simulation, July 1994, pp.24-31.
  • C. Carothers, R. M. Fujimoto, and P. England. ``The Effect of Communication Overheads on Time Warp Performance,'' 1994 Workshop on Parallel and Distributed Simulation, July 1994, pp. 118-125.
  • R. M. Fujimoto ``Time Warp on a Shared Memory Multiprocessor,'' Transactions of the Society for Computer Simulation, Vol. 6, No. 3, pp. 211-239, July 1989.