The Superscalar Technology INnovation Group (STING) is primarily
concerned with researching new microarchitecture techniques for future
processor designs. Our research covers near-term processor trends
(5-year timescale) to those further in the future (10+ years). We study how
emerging trends in fabrication technology (such as 3D processing and
heterogeneous integration) and new design constraints (such as achieving high
performance in a given power/thermal/battery-life envelope) affect processor
The Research Projects section describes our major research
projects in greater detail. In brief, our major projects are:
In addition to these projects, there is ongoing research in a variety of
traditional processor design areas such as branch prediction, cache
organizations, data prefetching, dynamic scheduling algorithms and hardware,
processor-compiler interaction, and other topics. There is collaboration with
other faculty and groups within the CoC and the ECE department.
- 3D-Microarchitectures: this project considers the ramifactions of
emergent vertically integrated (3D) VLSI fabrication processes and how
processor designs will change to exploit the new transistor density and
wiring characteristics of this new technology. See also the GT 3D Integration Research website.
- Multi-Core Resource Management: this project explores the impact
of integrating multiple cores on a single chip, where many resources such as
caches, bus bandwidth and power must be shared between the cores. Careful
management of all of these resources is critical to maintaining the highest
possible performance/throughput while balancing other constraints such as
fairness/quality of service and thermal limitations.
- High-Performance High-Efficiency Microarchitectures:
this project studies future high-performance processors where unbounded
power and thermal budgets no longer exist. In this realm, the
power:performance tradeoffs are very different and new microarchitectures
are required to continue to provide increasing performance while doing so in
a power-efficient manner.