Computer

Bobin Deng


Biography

I am a PhD candidate (Expected to graduate: May 8th, 2021) in the School of Computer Science at Georgia Institute of Technology. I am currently working with Prof. Tom Conte.

Research Interest

Computer architecture with special interests in error-tolerant processors, energy-efficient microarchitecture and hierarchical cache coherence protocols; Mbed Projects (ARM microcontroller with C/C++ Cloud Compiler); High performance computing; Multithreading; Parallel programming; Machine learning; Artificial neural network (ANN);

Recent projects

[1] Prime Grant Extending Moore's Law
[2] An Energy-Efficient Resilient Technique for Asynchronous Many-Task (AMT) Programming Models
[3] Improve the Reliability and Energy-efficient of Artificial Neural Networks
[4] Directory-based Cache Coherence systems
[5] The GPS/AGPS Over-the-Air (OTA) Testing Module for Mobile Terminal Antennae

Publications:

[12] B. Deng,S. R. Paul, A. Jain, T. M. Conte, V. Sarkar and J. Cook, "ETF: Energy-efficient Thread-level Fault-tolerance for Exascale Computing," (Under review).

[11] B. Deng, S. Srikanth, A. Jain, T. M. Conte, E. Debenedictis and J. Cook, "Scalable Energy-Efficient Microarchitectures with Computational Error Tolerance via Redundant Residue Number Systems," IEEE Transactions on Computers, 2021 (TC 2021) (accepted).

[10] B. Deng, S. Srikanth, E. R. Hein, T. M. Conte, E. Debenedictis, J. Cook, and M. P. Frank, "Extending Moore's Law via Computationally Error-Tolerant Computing," ACM Transactions on Architecture and Code Optimization (TACO 2018). 15, 1, Article 8, 27 pages, 2018.

[9] S. Srikanth, P. G. Rabbat, E. R. Hein, B. Deng, T. M. Conte, E. DeBenedictis, J. Cook, M. P. Frank, "Memory System Design for Ultra Low Power, Computationally Error Resilient Processor Microarchitectures," 2018 IEEE International Symposium on High Performance Computer Architecture (HPCA 2018), Vienna, 2018.

[8] S. Agarwal, J. Cook, E. DeBenedictis, M. P. Frank, G. Cauwenberghs, S. Srikanth, B. Deng, E. R. Hein, P. G. Rabbat, T. M. Conte, "Energy efficiency limits of logic and memory," 2016 IEEE International Conference on Rebooting Computing (ICRC 2016), San Diego, CA, 2016.

[7] B. Deng , S. Srikanth, E. R. Hein, P. G. Rabbat, T. M. Conte, E. DeBenedictis, J. Cook, "Computationally-redundant energy-efficient processing for y'all (CREEPY)," 2016 IEEE International Conference on Rebooting Computing (ICRC 2016), San Diego, CA, 2016.

[6] G. Li, H. An, Q. Li, B. Deng and W. Dai, "Efficient execution of speculative threads and transactions with hardware transactional memory," Future Generation Computer Systems (FGCS 2014), Volume 30, 2014, Pages 242-253.

[5] G. Li, H. An, Q. Li, B. Deng and W. Dai, "SeTM: Efficient Execution of Speculative Threads with Hardware Transactional Memory," IEEE 18th International Conference on Parallel and Distributed Systems (ICPADS 2012), Singapore, 2012, pp. 522-531.

[4] M. Mao, H. An, B. Deng, T. Sun, X. Wei, W. Zhou, and W. Han, "Distributed replay protocol for distributed uniprocessors," 2012 26th ACM international conference on Supercomputing (ICS 2012).

[3] B. Deng, H. An, Q. Li, G. Li and M. Mao, "Value Predicted LogSPoTM: Improve the Parallesim of Thread Level System by Using a Value Predictor," IEEE/ACIS 11th International Conference on Computer and Information Science (ICIS 2012), Shanghai, 2012, pp. 130-135.

[2] M. Mao, H. An, T. Sun, Q. Li, B. Deng, X. Wei and J. Zhou, "Distributed Control Independence for Composable Multi-processors," IEEE/ACIS 11th International Conference on Computer and Information Science (ICIS 2012), Shanghai, 2012, pp. 124-129.

[1] W. Dai, H. An, Q. Li, G. Li, B. Deng, S. Wu, X. Li and Y. Liu, "A Priority-Aware NoC to Reduce Squashes in Thread Level Speculation for Chip Multiprocessors," IEEE Ninth International Symposium on Parallel and Distributed Processing with Applications (ISPA 2011), Busan, 2011, pp. 87-92.

Patents:

[2] H. An, Q. Li, W. Dai, G. Li, B. Deng and S. Wu, A methodology to improve thread-level speculation, China Patent No. 102799414B, 2015.

[1] H. An, B. Deng, Q. Li, G. Li and M. Mao, A restricted data forwarding methodology for thread-level speculation , China Patent No. 102681890B, 2015.


Professional Services:

Reviewer Journal of Supercomputing (SUPE)

Reviewer SciTechnol- Computer Engineering and Information Technology

Reviewer* MICRO 2016 (* on behalf of my advisor)

Student Volunteer PACT 2020


Research-level courses:

CS6505 Computability & Algorithms
CS7260 Internet Architectures & Protocols
CS7290 Advanced Microarchitecture
CS7496 Computer Animation
CS8803 Special Topics-Mobile Apps and Services
ECE6100 Advanced Computing Architectures
ECE6101 Parallel& Distribute Computing Architectures
ECE6122 Advanced Programming Techniques
ECE6130 Advanced VLSI Systems
ECE6601 Random Processes
ECE6613 Broadband Access Network

Teaching

Spring 2020 Guest Instructor of CS 4290/CS 6290 - Advanced/High Performance Computer Architecture - at Georgia Tech
Spring 2020 Teaching Assistant of CS 4290/CS 6290 - Advanced/High Performance Computer Architecture - at Georgia Tech
Spring 2017 Teaching Assistant of CS 4290/CS 6290 - Advanced/High Performance Computer Architecture - at Georgia Tech
Summer 2015 Teaching Assistant of ECE 2036 - Engineering Software Design - at Georgia Tech
Spring 2015 Teaching Assistant of ECE 2036 - Engineering Software Design - at Georgia Tech
Fall 2014 Teaching Assistant of ECE 2036 - Engineering Software Design - at Georgia Tech
Fall 2010 Teaching Assistant of CS 05162 - High Performance Processor Architecture - at USTC

Contact Information:

Email: bdeng@gatech.edu
Phone: 404-863-7711
Office: Room 2337, Klaus Advanced Computing Building
School of Computer Science
Georgia Institute of Technology
Atlanta, Georgia

Last Modified: January, 2021