Rethinking Operating System Structure with Heterogeneous Main Memory

Principal Investigators:

Graduate Students:


Project Summary:

For several decades, DRAM has been used as the main memory of a CPU due to its low latency and long endurance. However, considerations of cost, power consumption, and heat dissipation limit the amount of DRAM that can be provisioned for a single CPU. These considerations are even more severe in a datacenter used for giant-scale services both due to the large number of server machines involved and the large datasets of applications running on such server farms. Flash Memory, a non-volatile memory technology, has been a great success in the past decade. Flash memory is denser, cheaper, and more power-efficient than DRAM. It is used in most mobile devices such as smartphones and tablets. In addition, it is finding increasing adoption in enterprise class infrastructure as well. However, since its access granularity and latency properties are more akin to that of the hard disk, thus far it has been typically used as a replacement for the hard disk and not for the main memory. Phase Change Memory (PCM) is a new non-volatile memory technology that is on the horizon for mass production. Different from Flash, it is byte addressable, and its latency properties are closer to that of the DRAM. Moreover, it has better endurance properties than Flash. In this proposal, we would like to explore an alternate model for the memory system architecture of a compute node in a datacenter and its implication for system software. In this model all three memory technologies appear at the same level so far as the CPU is concerned. While the DRAM is volatile, the other two are not. Each technology has its unique characteristics in terms of access granularity, access times, lifetime, and cost per bit. Therefore we can use each of them in a different role from the point of view of system software. Using each technology for a different role could lead to a revolutionary approach to the design of the system software. Our proposed research comprises two parts: (a) rethink the subsystems of the entire system software stack such as the virtual memory manager, the file system, the scheduler, the programming interfaces, and the execution model in light of this structure; and (b) rethink the memory architecture in support of the system software stack.

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